/openbmc/linux/drivers/pci/pcie/ |
H A D | edr.c | 23 * _DSM wrapper function to enable/disable DPC 55 pci_err(pdev, FW_BUG "Enable DPC _DSM returned non integer\n"); in acpi_enable_dpc() 60 pci_err(pdev, "Enable DPC _DSM failed to enable DPC\n"); in acpi_enable_dpc() 70 * _DSM wrapper function to locate DPC port 113 * Firmware returns DPC port BDF details in following format: in acpi_dpc_port_get() 162 * has triggered a containment event, e.g., DPC, so its child in edr_handle_event() 174 pci_err(pdev, "Firmware failed to locate DPC port\n"); in edr_handle_event() 180 /* If port does not support DPC, just send the OST */ in edr_handle_event() 182 pci_err(edev, FW_BUG "This device doesn't support DPC\n"); in edr_handle_event() 186 /* Check if there is a valid DPC trigger */ in edr_handle_event() [all …]
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H A D | dpc.c | 9 #define dev_fmt(fmt) "DPC: " fmt 93 * pci_dpc_recovered - whether DPC triggered and has recovered successfully 96 * Return true if DPC was triggered for @pdev and has recovered successfully. 98 * driver to recognize and ignore Link Down/Up events caused by DPC. 108 * Synchronization between hotplug and DPC is not supported in pci_dpc_recovered() 109 * if DPC is owned by firmware and EDR is not enabled. in pci_dpc_recovered() 116 * Need a timeout in case DPC never completes due to failure of in pci_dpc_recovered() 118 * but reports indicate that DPC completes within 4 seconds. in pci_dpc_recovered() 153 * DPC disables the Link automatically in hardware, so it has in dpc_reset_link() 159 * Wait until the Link is inactive, then clear DPC Trigger Status in dpc_reset_link() [all …]
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H A D | Kconfig | 125 This enables PCI Express Downstream Port Containment (DPC) 126 driver support. DPC events from Root and Downstream ports 127 will be handled by the DPC driver. If your system doesn't 147 support hybrid DPC model which uses both firmware and OS to 148 implement DPC.
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H A D | portdrv.c | 52 * Fill in *pme, *aer, *dpc with the relevant Interrupt Message Numbers if 57 u32 *pme, u32 *aer, u32 *dpc) in pcie_message_numbers() argument 95 *dpc = reg16 & PCI_EXP_DPC_IRQ; in pcie_message_numbers() 96 nvec = max(nvec, *dpc + 1); in pcie_message_numbers() 115 u32 pme = 0, aer = 0, dpc = 0; in pcie_port_enable_irq_vec() local 124 nvec = pcie_message_numbers(dev, mask, &pme, &aer, &dpc); in pcie_port_enable_irq_vec() 163 irqs[PCIE_PORT_SERVICE_DPC_SHIFT] = pci_irq_vector(dev, dpc); in pcie_port_enable_irq_vec() 259 * With dpc-native, allow Linux to use DPC even if it doesn't have in get_port_device_capability() 611 * If the user specified "pcie_ports=dpc-native", use the Linux DPC PCIe 622 else if (!strncmp(str, "dpc-native", 10)) in pcie_port_setup()
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H A D | Makefile | 13 obj-$(CONFIG_PCIE_DPC) += dpc.o
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/openbmc/u-boot/drivers/nvme/ |
H A D | nvme_show.c | 80 static void print_data_protect_cap(u8 dpc, int devnum) in print_data_protect_cap() argument 85 dpc & 0x10 ? "yes" : "No"); in print_data_protect_cap() 87 dpc & 0x08 ? "yes" : "No"); in print_data_protect_cap() 89 dpc & 0x04 ? "yes" : "No"); in print_data_protect_cap() 91 dpc & 0x02 ? "yes" : "No"); in print_data_protect_cap() 93 dpc & 0x01 ? "yes" : "No"); in print_data_protect_cap() 125 print_data_protect_cap(id->dpc, ns->devnum); in nvme_print_info()
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/openbmc/linux/drivers/staging/media/atomisp/pci/ |
H A D | sh_css_params.h | 68 /*----- DPC configuration -----*/ 69 /* The default DPC configuration is retained and currently set 71 * uses this configuration to set the DPC parameters per stage but this 74 /* ------ pipe specific DPC configuration ------ */ 127 /* ------ pipe specific DPC configuration ------ */
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/openbmc/linux/drivers/staging/media/atomisp/pci/isp/kernels/dp/dp_1.0/ |
H A D | ia_css_dp_types.h | 20 * CSS-API header file for Defect Pixel Correction (DPC) parameters. 25 * ISP block: DPC1 (DPC after WB) 26 * DPC2 (DPC before WB)
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H A D | ia_css_dp.host.c | 23 /* We use a different set of DPC configuration parameters when 24 * DPC is used before OBC and NORM. Currently these parameters 25 * are used in usecases which selects both BDS and DPC.
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/openbmc/linux/drivers/media/platform/microchip/ |
H A D | microchip-isc-regs.h | 94 /* ISC DPC Control Register */ 101 /* ISC DPC Config Register */ 122 /* ISC DPC Threshold Median Register */ 125 /* ISC DPC Threshold Closest Register */ 128 /* ISC DPC Threshold Average Register */ 131 /* ISC DPC STatus Register */
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/openbmc/linux/drivers/staging/media/deprecated/atmel/ |
H A D | atmel-isc-regs.h | 94 /* ISC DPC Control Register */ 101 /* ISC DPC Config Register */ 122 /* ISC DPC Threshold Median Register */ 125 /* ISC DPC Threshold Closest Register */ 128 /* ISC DPC Threshold Average Register */ 131 /* ISC DPC STatus Register */
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/openbmc/linux/Documentation/devicetree/bindings/iio/dac/ |
H A D | adi,ad5758.yaml | 26 Dynamic Power Control (DPC) 40 * 1: DPC current mode 41 * 2: DPC voltage mode
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/openbmc/linux/drivers/staging/media/atomisp/pci/isp/kernels/dpc2/ |
H A D | ia_css_dpc2_types.h | 40 * ISP block: DPC1 (DPC after WB) 41 * DPC2 (DPC before WB)
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/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
H A D | README.lsch3 | 79 | MC DPC Blob (1M) | | 101 | MC DPC Blob (1M) | | 128 during U-boot booting.However the MC, DPC and DPL can be applied from 133 using NOR Flash i.e. MC, DPL, and DPC is stored in the NOR flash: 146 MC binary, DPC binary and DPL binary are stored and 0x580300000, 0x580800000 328 Please note Management complex Firmware(MC), DPL and DPC are no 342 Assumption: MC firmware, DPL and DPC dtb is already programmed 356 Assumption: MC firmware, DPL and DPC dtb is already programmed 374 Assumption: MC firmware, DPL, DPC dtb and AIOP firmware is already
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/openbmc/linux/drivers/acpi/ |
H A D | osl.c | 848 struct acpi_os_dpc *dpc = container_of(work, struct acpi_os_dpc, work); in acpi_os_execute_deferred() local 850 dpc->function(dpc->context); in acpi_os_execute_deferred() 851 kfree(dpc); in acpi_os_execute_deferred() 1067 struct acpi_os_dpc *dpc; in acpi_os_execute() local 1084 * Allocate/initialize DPC structure. Note that this memory will be in acpi_os_execute() 1092 dpc = kzalloc(sizeof(struct acpi_os_dpc), GFP_ATOMIC); in acpi_os_execute() 1093 if (!dpc) in acpi_os_execute() 1096 dpc->function = function; in acpi_os_execute() 1097 dpc->context = context; in acpi_os_execute() 1106 INIT_WORK(&dpc->work, acpi_os_execute_deferred); in acpi_os_execute() [all …]
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_gmbus.c | 82 [GMBUS_PIN_DPC] = { "dpc", GPIOD }, 89 [GMBUS_PIN_DPC] = { "dpc", GPIOD }, 95 [GMBUS_PIN_DPC] = { "dpc", GPIOD }, 102 [GMBUS_PIN_2_BXT] = { "dpc", GPIOC }, 108 [GMBUS_PIN_2_BXT] = { "dpc", GPIOC }, 116 [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, 128 [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, 135 [GMBUS_PIN_3_BXT] = { "dpc", GPIOD }, 143 [GMBUS_PIN_3_BXT] = { "dpc", GPIOD },
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/openbmc/u-boot/arch/arm/include/asm/arch-fsl-layerscape/ |
H A D | stream_id_lsch3.h | 38 * Complex for containers and will set these values in the MC DPC image. 97 /* DPAA2 - set in MC DPC and alloced by MC */
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/openbmc/linux/drivers/net/wireless/broadcom/brcm80211/brcmsmac/ |
H A D | mac80211_if.h | 80 struct tasklet_struct tasklet; /* dpc tasklet */ 81 bool resched; /* dpc needs to be and is rescheduled */
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/openbmc/linux/drivers/staging/vt6655/ |
H A D | dpc.c | 6 * Purpose: handle dpc rx functions 21 #include "dpc.h"
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H A D | Makefile | 9 dpc.o \
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/openbmc/u-boot/drivers/net/fsl-mc/ |
H A D | mc.c | 410 printf("\nfsl-mc: ERROR: DPC is missing /resources\n"); in mc_fixup_dpc() 454 * Load the MC DPC blob in the MC private DRAM block: in load_mc_dpc() 457 printf("MC DPC is preloaded to %#llx\n", mc_ram_addr + mc_dpc_offset); in load_mc_dpc() 460 * Get address and size of the DPC blob stored in flash: in load_mc_dpc() 468 * still boot without a DPC in load_mc_dpc() 470 printf("\nfsl-mc: WARNING: No DPC image found"); in load_mc_dpc() 476 printf("\nfsl-mc: ERROR: Bad DPC image (too large: %d)\n", in load_mc_dpc() 481 mc_copy_image("MC DPC blob", in load_mc_dpc() 488 dump_ram_words("DPC", (void *)(mc_ram_addr + mc_dpc_offset)); in load_mc_dpc() 1658 * can not properly initialize the DPC. in mc_env_boot()
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/openbmc/qemu/include/block/ |
H A D | nvme.h | 1382 uint8_t dpc; member 1519 #define NVME_ID_NS_DPC_LAST_EIGHT(dpc) ((dpc >> 4) & 0x1) argument 1520 #define NVME_ID_NS_DPC_FIRST_EIGHT(dpc) ((dpc >> 3) & 0x1) argument 1521 #define NVME_ID_NS_DPC_TYPE_3(dpc) ((dpc >> 2) & 0x1) argument 1522 #define NVME_ID_NS_DPC_TYPE_2(dpc) ((dpc >> 1) & 0x1) argument 1523 #define NVME_ID_NS_DPC_TYPE_1(dpc) ((dpc & 0x1)) argument
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/openbmc/linux/drivers/scsi/aacraid/ |
H A D | dpcsup.c | 16 * Abstract: All DPC processing routines for the cyclone board occur here. 33 * This DPC routine will be run when the adapter interrupts us to let us 152 * This DPC routine will be queued when the adapter interrupts us to 266 * This DPC routine will be run when the adapter interrupts us to let us
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/openbmc/ipmitool/src/plugins/imb/ |
H A D | imbapi.c | 695 //to identify the correct DPC session to send the mesage to. */ in SendTimedEmpMessageResponse_Ex() 696 BYTE channelNumber /*There are 3 different channels on which DPC communication goes on in SendTimedEmpMessageResponse_Ex() 762 /*after the cmd the data ,which is sent by DPC & is retrived using the get message earlier in SendTimedEmpMessageResponse_Ex() 763 // is sent back to DPC. */ in SendTimedEmpMessageResponse_Ex() 825 // Purpose: This function sends a response message to the DPC Over Lan 858 // even though the DPC over Lan firmware EPS states that the lun should be 1 for DPC in SendTimedLanMessageResponse() 928 // Purpose: This function sends a response message to the DPC Over Lan 944 //to identify the correct DPC session to send the mesage to. */ in SendTimedLanMessageResponse_Ex() 945 BYTE channelNumber /*There are 3 different channels on which DPC communication goes on in SendTimedLanMessageResponse_Ex() 966 // even though the DPC over Lan firmware EPS states that the lun should be 1 for DPC in SendTimedLanMessageResponse_Ex() [all …]
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/openbmc/u-boot/board/freescale/ls2080ardb/ |
H A D | README | 99 DPAA2 DPC 0x00E00000 123 DPAA2 DPC 0x00E00000
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