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/openbmc/linux/Documentation/devicetree/bindings/arm/omap/
H A Dcrossbar.txt5 In such places a interrupt controllers are preceded by an CROSSBAR
10 - compatible : Should be "ti,irq-crossbar"
11 - reg: Base address and the size of the crossbar registers.
14 - ti,max-crossbar-sources: Maximum number of crossbar sources that can be routed.
18 crossbar. These interrupt lines are reserved in the soc,
19 so crossbar bar driver should not consider them as free
25 crossbar. These irqs have a crossbar register, but still cannot be used.
31 crossbar_mpu: crossbar@4a002a48 {
32 compatible = "ti,irq-crossbar";
35 ti,max-crossbar-sources = <400>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
23 When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request
24 the DMA event number as crossbar ID (input to the DMA crossbar).
26 For ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients:
28 the event should be assigned and <1> is the mux selection for in the crossbar.
46 /* DMA crossbar */
[all …]
H A Ddma-router.yaml46 compatible = "ti,dra7-dma-crossbar";
/openbmc/linux/drivers/irqchip/
H A Dirq-crossbar.c3 * drivers/irqchip/irq-crossbar.c
22 * struct crossbar_device - crossbar device description
25 * @safe_map: safe default value to initialize the crossbar
26 * @max_crossbar_sources: Maximum number of crossbar sources
27 * @irq_map: array of interrupts to crossbar number mapping
28 * @crossbar_base: crossbar base address
141 * crossbar_domain_free - unmap/free a crossbar<->irq connection
211 of_property_read_u32(node, "ti,max-crossbar-sources", in crossbar_of_init()
214 pr_err("missing 'ti,max-crossbar-sources' property\n"); in crossbar_of_init()
252 /* Skip irqs hardwired to bypass the crossbar */ in crossbar_of_init()
[all …]
H A DKconfig317 Support for a CROSSBAR ip that precedes the main interrupt controller.
318 The primary irqchip invokes the crossbar's callback which inturn allocates
/openbmc/linux/drivers/media/platform/nxp/imx8-isi/
H A Dimx8-isi-core.c57 struct media_pad *pad = &isi->crossbar.pads[masd->port]; in mxc_isi_async_notifier_bound()
60 dev_dbg(isi->dev, "Bound subdev %s to crossbar input %u\n", sd->name, in mxc_isi_async_notifier_bound()
142 /* Register the crossbar switch subdev. */ in mxc_isi_v4l2_init()
143 ret = mxc_isi_crossbar_register(&isi->crossbar); in mxc_isi_v4l2_init()
145 dev_err(isi->dev, "Failed to register crossbar: %d\n", ret); in mxc_isi_v4l2_init()
149 /* Register the pipeline subdevs and link them to the crossbar switch. */ in mxc_isi_v4l2_init()
160 ret = media_create_pad_link(&isi->crossbar.sd.entity, in mxc_isi_v4l2_init()
161 isi->crossbar.num_sinks + i, in mxc_isi_v4l2_init()
237 mxc_isi_crossbar_unregister(&isi->crossbar); in mxc_isi_v4l2_cleanup()
481 dev_err(dev, "Failed to initialize crossbar: %d\n", ret); in mxc_isi_probe()
[all …]
H A Dimx8-isi-crossbar.c3 * i.MX8 ISI - Input crossbar switch
166 "no entity connected to crossbar input %u\n", in mxc_isi_crossbar_xlate_streams()
431 struct mxc_isi_crossbar *xbar = &isi->crossbar; in mxc_isi_crossbar_init()
441 strscpy(sd->name, "crossbar", sizeof(sd->name)); in mxc_isi_crossbar_init()
H A DMakefile3 imx8-isi-y := imx8-isi-core.o imx8-isi-crossbar.o imx8-isi-gasket.o \
H A Dimx8-isi-core.h77 /* Inputs from the crossbar switch range from 0 to 15 */
287 struct mxc_isi_crossbar crossbar; member
H A Dimx8-isi-pipe.c237 struct mxc_isi_crossbar *xbar = &pipe->isi->crossbar; in mxc_isi_pipe_enable()
251 * Find the connected input by inspecting the crossbar switch routing in mxc_isi_pipe_enable()
289 /* Enable streams on the crossbar switch. */ in mxc_isi_pipe_enable()
304 struct mxc_isi_crossbar *xbar = &pipe->isi->crossbar; in mxc_isi_pipe_disable()
/openbmc/linux/drivers/dma/ti/
H A Ddma-crossbar.c25 .compatible = "ti,dra7-dma-crossbar",
29 .compatible = "ti,am335x-edma-crossbar",
35 /* Crossbar on AM335x/AM437x family */
187 /* Reset the crossbar */ in ti_am335x_xbar_probe()
197 /* Crossbar on DRA7xx family */
208 u16 safe_val; /* Value to rest the crossbar lines */
422 /* Reset the crossbar */ in ti_dra7_xbar_probe()
431 /* Restore the defaults for the crossbar */ in ti_dra7_xbar_probe()
458 dev_err(&pdev->dev, "Unsupported crossbar\n"); in ti_dma_xbar_probe()
468 .name = "ti-dma-crossbar",
H A DMakefile17 obj-$(CONFIG_TI_DMA_CROSSBAR) += dma-crossbar.o
/openbmc/linux/include/dt-bindings/memory/
H A Dtegra194-mc.h167 /* ISP read client for Crossbar A */
169 /* ISP read client 1 for Crossbar A */
171 /* ISP Write client for Crossbar A */
173 /* ISP Write client Crossbar B */
367 /* ISP read client 1 for Crossbar A */
389 /* ISP read client for Crossbar A */
H A Dtegra234-mc.h265 /* ISP read client for Crossbar A */
267 /* ISP read client 1 for Crossbar A */
269 /* ISP Write client for Crossbar A */
271 /* ISP Write client Crossbar B */
504 /* ISP read client 1 for Crossbar A */
521 /* ISP read client for Crossbar A */
H A Dtegra186-mc.h137 /* ISP Read client for Crossbar A */
139 /* ISP Write client for Crossbar A */
141 /* ISP Write client Crossbar B */
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-mc.yaml25 Memory Crossbar, which routes request and responses between Arbitration
27 Memory Crossbar is just a pass through between a single Arbitration Domain
/openbmc/u-boot/board/freescale/b4860qds/
H A Db4860qds.c368 debug("Configuring crossbar to use onboard SGMII PHYs:" in configure_vsc3316_3308()
371 /* Configure VSC3316 crossbar switch */ in configure_vsc3316_3308()
418 debug("Configuring crossbar for Aurora, SGMII 3 and 4," in configure_vsc3316_3308()
421 /* Configure VSC3316 crossbar switch */ in configure_vsc3316_3308()
448 debug("Configuring crossbar to use onboard SGMII PHYs:" in configure_vsc3316_3308()
451 /* Configure VSC3316 crossbar switch */ in configure_vsc3316_3308()
473 /* Configure VSC3316 crossbar switch */ in configure_vsc3316_3308()
495 /* Configure VSC3308 crossbar switch */ in configure_vsc3316_3308()
1071 /* Configure VSC3316 and VSC3308 crossbar switches */ in board_early_init_r()
/openbmc/openbmc/meta-openembedded/meta-python/recipes-devtools/python/
H A Dpython3-autobahn_24.4.2.bb2 HOMEPAGE = "http://crossbar.io/autobahn"
/openbmc/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra124-sor.yaml92 description: 5 cells containing the crossbar configuration.
94 mapped via the crossbar to the pad specified by the cell's
/openbmc/linux/arch/powerpc/platforms/44x/
H A Dfsp2.h10 #define DCRN_PLB4_PCBI 0x010 /* PLB Crossbar ID/Rev Register */
18 #define DCRN_PLB4_PCBC 0x018 /* PLB Crossbar Control Register */
/openbmc/u-boot/board/freescale/m52277evb/
H A DREADME32 - include/asm-m68k/crossbar.h CrossBar structure and definition
/openbmc/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml24 into the SoC (excluding the SoCs that have an Interrupt Crossbar or an
36 are routed through the Crossbar, a kind of interrupt router/multiplexer. The
/openbmc/u-boot/arch/arm/lib/
H A Dasm-offsets.c52 /* Multi-Layer AHB Crossbar Switch */ in main()
118 /* Multi-Layer AHB Crossbar Switch */ in main()
/openbmc/u-boot/arch/arm/include/asm/arch-mx25/
H A Dmacro.h39 * MAX (Multi-Layer AHB Crossbar Switch) setup
/openbmc/linux/drivers/net/fddi/skfp/h/
H A Dsupern_2.h745 #define QELM_XBAR_W 0x80 /* Crossbar Control ELM W */
746 #define QELM_XBAR_X 0x81 /* Crossbar Control ELM X */
747 #define QELM_XBAR_Y 0x82 /* Crossbar Control ELM Y */
748 #define QELM_XBAR_Z 0x83 /* Crossbar Control ELM Z */
749 #define QELM_XBAR_P 0x84 /* Crossbar Control Bus P */
750 #define QELM_XBAR_S 0x85 /* Crossbar Control Bus S */
751 #define QELM_XBAR_R 0x86 /* Crossbar Control Bus R */
752 #define QELM_WR_XBAR 0x87 /* Write the Crossbar now (write) */

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