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/openbmc/obmc-ikvm/
H A Dikvm_server.cpp99 rfbClientPtr cl; in sendFrame() local
109 while ((cl = rfbClientIteratorNext(it))) in sendFrame()
111 ClientData* cd = (ClientData*)cl->clientData; in sendFrame()
112 rfbFramebufferUpdateMsg* fu = (rfbFramebufferUpdateMsg*)cl->updateBuf; in sendFrame()
151 if (cl->enableLastRectEncoding) in sendFrame()
170 cl->ublen = sz_rfbFramebufferUpdateMsg; in sendFrame()
171 rfbSendUpdateBuf(cl); in sendFrame()
172 cl->tightEncoding = rfbEncodingTight; in sendFrame()
173 rfbSendTightHeader(cl, 0, 0, video.getWidth(), in sendFrame()
175 cl->updateBuf[cl->ublen++] = (char)(rfbTightJpeg << 4); in sendFrame()
[all …]
H A Dikvm_server.hpp92 * @param[in] cl - Handle to the client object
96 rfbClientPtr cl, rfbFramebufferUpdateRequestMsg* furMsg);
100 * @param[in] cl - Handle to the client object
102 static void clientGone(rfbClientPtr cl);
106 * @param[in] cl - Handle to the client object
108 static enum rfbNewClientAction newClient(rfbClientPtr cl);
H A Dikvm_input.hpp45 * @param[in] cl - Handle to the RFB client
47 static void keyEvent(rfbBool down, rfbKeySym key, rfbClientPtr cl);
55 * @param[in] cl - Handle to the RFB client
57 static void pointerEvent(int buttonMask, int x, int y, rfbClientPtr cl);
/openbmc/u-boot/drivers/net/fsl-mc/dpio/
H A Dqbman_portal.c200 uint32_t *cl = qb_cl(d); in qbman_eq_desc_set_no_orp() local
202 qb_attr_code_encode(&code_eq_orp_en, cl, 0); in qbman_eq_desc_set_no_orp()
203 qb_attr_code_encode(&code_eq_cmd, cl, in qbman_eq_desc_set_no_orp()
212 uint32_t *cl = qb_cl(d); in qbman_eq_desc_set_response() local
214 qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys); in qbman_eq_desc_set_response()
215 qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash); in qbman_eq_desc_set_response()
222 uint32_t *cl = qb_cl(d); in qbman_eq_desc_set_qd() local
224 qb_attr_code_encode(&code_eq_qd_en, cl, 1); in qbman_eq_desc_set_qd()
225 qb_attr_code_encode(&code_eq_tgt_id, cl, qdid); in qbman_eq_desc_set_qd()
226 qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin); in qbman_eq_desc_set_qd()
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/openbmc/qemu/backends/
H A Dcryptodev-hmp-cmds.c24 QCryptodevBackendClientList *cl; in hmp_info_cryptodev() local
45 for (cl = info->client; cl; cl = cl->next) { in hmp_info_cryptodev()
46 QCryptodevBackendClient *client = cl->value; in hmp_info_cryptodev()
/openbmc/u-boot/board/compulab/cl-som-imx7/
H A DMAINTAINERS1 CL-SOM-IMX7 BOARD
4 F: board/compulab/cl-som-imx7
5 F: include/configs/cl-som-imx7.h
6 F: configs/cl-som-imx7_defconfig
H A DKconfig4 default "cl-som-imx7"
10 default "cl-som-imx7"
/openbmc/u-boot/board/compulab/cl-som-am57x/
H A DMAINTAINERS1 CL-SOM-AM57x BOARD
4 F: board/compulab/cl-som-am57x/
5 F: include/configs/cl-som-am57x.h
6 F: configs/cl-som-am57x_defconfig
H A DKconfig4 default "cl-som-am57x"
10 default "cl-som-am57x"
H A Dcl-som-am57x.c23 "Board: CL-SOM-AM57x\n"
46 printf("cl-som-am57x: failed to initialize mmc0\n"); in board_mmc_init()
50 printf("cl-som-am57x: failed to initialize mmc1\n"); in board_mmc_init()
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-core/opencl/files/
H A D0001-Command-buffer-supported-queue-properties-265.patch12 CL/cl_ext.h | 4 ++--
15 diff --git a/CL/cl_ext.h b/CL/cl_ext.h
17 --- a/CL/cl_ext.h
18 +++ b/CL/cl_ext.h
/openbmc/libpldm/scripts/
H A Dchangelog.awk1 BEGIN { cl=0; api=0; abi=0; }
2 /^CHANGELOG.md$/ { cl=1 }
5 END { exit !(cl || !(api || abi)); }
/openbmc/qemu/target/alpha/
H A Dint_helper.c65 uint64_t al, ah, bl, bh, cl, ch; in helper_cmpbge() local
75 cl = ((al | test) - bl) & test; in helper_cmpbge()
80 /* cl=.......b...............d...............f...............h........ */ in helper_cmpbge()
81 cl += ch << 1; in helper_cmpbge()
82 /* cl=......ab..............cd..............ef..............gh........ */ in helper_cmpbge()
83 cl |= cl << 14; in helper_cmpbge()
84 /* cl=......abcd............cdef............efgh............gh........ */ in helper_cmpbge()
85 cl |= cl << 28; in helper_cmpbge()
86 /* cl=......abcdefgh........cdefgh..........efgh............gh........ */ in helper_cmpbge()
87 return cl >> 50; in helper_cmpbge()
/openbmc/qemu/tests/tcg/x86_64/
H A Dtest-2413.c11 "testb $0x20, %%cl\n\t" in test()
14 "shll %%cl, %%eax\n\t" in test()
15 "shll %%cl, %%edx\n\t" in test()
/openbmc/u-boot/include/
H A Dspd.h24 unsigned char clk_cycle; /* 9 SDRAM Cycle time at CL=X */
25 unsigned char clk_access; /* 10 SDRAM Access from Clock at CL=X */
38 unsigned char clk_cycle2; /* 23 Min SDRAM Cycle time at CL=X-1 */
39 unsigned char clk_access2; /* 24 SDRAM Access from Clock at CL=X-1 */
40 unsigned char clk_cycle3; /* 25 Min SDRAM Cycle time at CL=X-2 */
41 unsigned char clk_access3; /* 26 Max Access from Clock at CL=X-2 */
/openbmc/openbmc/poky/scripts/
H A Dcreate-pull-request205 CL="$(echo $ODIR/*0000-cover-letter.patch)"
222 sed -n "0,\#$REMOTE_URL# p" "$PM" | sed -i "/BLURB HERE/ r /dev/stdin" "$CL"
233 ) | sed -i "/BLURB HERE/ r /dev/stdin" "$CL"
238 echo " $WEB_URL" | sed -i "\#$REMOTE_URL# r /dev/stdin" "$CL"
245 sed -i "/BLURB HERE/ r $BODY" "$CL"
246 sed -i "/BLURB HERE/ d" "$CL"
257 sed -i -e "s\`\*\*\* SUBJECT HERE \*\*\*\`$SUBJECT\`" "$CL"
267 $CL
H A Dsend-pull-request105 CL="$PDIR/0000-cover-letter.patch"
107 grep -q "*** $TOKEN HERE ***" "$CL"
109 echo "ERROR: Please edit $CL and try again (Look for '*** $TOKEN HERE ***')."
157 …l "git send-email $GIT_TO $GIT_CC $GIT_EXTRA_CC --confirm=always --no-thread --suppress-cc=all $CL"
162 PATCHES=${PATCHES/"$CL"/}
/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A DKconfig24 bool "CL-SOM-iMX7"
68 source "board/compulab/cl-som-imx7/Kconfig"
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-daemons/ippool/ippool/
H A D0001-pppd-ippool.c-Fix-type-casting-issues-between-in_add.patch33 @@ -64,9 +64,9 @@ static int ippool_addr_alloc(CLIENT *cl,
45 @@ -85,14 +85,16 @@ static void ippool_addr_free(CLIENT *cl,
70 CLIENT *cl;
/openbmc/openbmc/poky/meta/recipes-sato/rxvt-unicode/rxvt-unicode/
H A Dxwc.patch20 if (XwcTextListToTextProperty (dpy, &cl, 1, (XICCEncodingStyle) style, &ct) >= 0)
26 ct.value = (unsigned char *)cl;
/openbmc/openbmc/poky/meta/recipes-devtools/gcc/gcc/
H A D0021-gentypes-genmodes-Do-not-use-__LINE__-for-maintainin.patch61 make_complex_modes (enum mode_class cl,
63 @@ -500,7 +500,7 @@ make_complex_modes (enum mode_class cl,
71 make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width,
72 @@ -553,7 +553,7 @@ make_vector_modes (enum mode_class cl, const char *prefix, unsigned int width,
90 @@ -588,7 +588,7 @@ make_special_mode (enum mode_class cl, const char *name,
118 /* Create a fixed-point mode by setting CL, NAME, BYTESIZE, IBIT, FBIT,
120 @@ -659,7 +659,7 @@ make_fixed_point_mode (enum mode_class cl,
/openbmc/u-boot/drivers/ddr/fsl/
H A Dlc_common_dimm_params.c141 debug("CL = %u ok on DIMM %u at tCK=%u ps with tCKmin_X_ps of %u\n", in compute_cas_latency()
154 debug("CL = %u ok on DIMM %u at tCK=%u ps with tckmin_x_minus_1_ps of %u\n", in compute_cas_latency()
167 debug("CL = %u ok on DIMM %u at tCK=%u ps with tckmin_x_minus_2_ps of %u\n", in compute_cas_latency()
482 * I. Because you are using CL=3 and need to do ODT on writes and in compute_lowest_common_dimm_parameters()
487 * 2. If so, is your lowest supported CL going to be 3? in compute_lowest_common_dimm_parameters()
491 * RL = AL + CL in compute_lowest_common_dimm_parameters()
494 * WL = AL + CL - 1 in compute_lowest_common_dimm_parameters()
495 * AL + CL - 1 >= 3 in compute_lowest_common_dimm_parameters()
496 * AL + CL >= 4 in compute_lowest_common_dimm_parameters()
500 * RL = AL + CL in compute_lowest_common_dimm_parameters()
[all …]
/openbmc/u-boot/board/Seagate/nas220/
H A Dkwbimage.cfg26 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
41 # bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
42 # bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
90 # bit6-4: 4, CL=5
/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_axp_training_static.h16 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
69 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
142 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
196 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
249 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
302 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
356 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
409 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
462 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
515 /*PUP RdSampleDly (+CL) Phase RL ADLL value */
[all …]
/openbmc/u-boot/board/LaCie/netspace_v2/
H A Dkwbimage.cfg22 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
37 # bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
38 # bit27-24: 8= CL+3, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
85 # bit6-4: 4, CL=5

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