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/openbmc/linux/Documentation/devicetree/bindings/x86/
H A Dce4100.txt1 CE4100 Device Tree Bindings
4 The CE4100 SoC uses for in core peripherals the following compatible
6 Many of the "generic" devices like HPET or IO APIC have the ce4100
19 compatible = "intel,ce4100";
25 compatible = "intel,ce4100";
45 compatible = "intel,ce4100-cp";
50 compatible = "intel,ce4100-pci", "pci";
H A Dtimer.txt6 compatible = "intel,ce4100-hpet";
/openbmc/linux/arch/x86/platform/ce4100/
H A Dfalconfalls.dts3 * CE4100 on Falcon Falls
20 compatible = "intel,ce4100";
29 compatible = "intel,ce4100-cp";
34 compatible = "intel,ce4100-ioapic";
40 compatible = "intel,ce4100-hpet";
45 compatible = "intel,ce4100-lapic";
52 compatible = "intel,ce4100-pci", "pci";
62 compatible = "intel,ce4100-ioapic";
71 compatible = "intel,ce4100-pci", "pci";
240 compatible = "intel,ce4100-i2c-controller";
[all …]
H A Dce4100.c3 * Intel CE4100 platform specific setup code
14 #include <asm/ce4100.h>
23 * The CE4100 platform has an internal 8051 Microcontroller which is
133 * CE4100 specific x86_init function overrides and early setup
148 * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue in x86_ce4100_early_setup()
H A DMakefile2 obj-$(CONFIG_X86_INTEL_CE) += ce4100.o
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dintel,ce4100-ioapic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-ioapic.yaml#
23 the ce4100 name in their compatible property names because they
24 first appeared in CE4100 SoC.
32 const: intel,ce4100-ioapic
56 compatible = "intel,ce4100-ioapic";
H A Dintel,ce4100-lapic.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/intel,ce4100-lapic.yaml#
23 the ce4100 name in their compatible property names because they
24 first appeared in CE4100 SoC.
32 const: intel,ce4100-lapic
66 compatible = "intel,ce4100-lapic";
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-pxa-pci-ce4100.txt1 CE4100 I2C
4 CE4100 has one PCI device which is described as the I2C-Controller. This
55 compatible = "intel,ce4100-i2c-controller";
68 compatible = "intel,ce4100-i2c-controller";
83 compatible = "intel,ce4100-i2c-controller";
/openbmc/linux/arch/x86/kernel/
H A Ddevicetree.c40 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
43 { .compatible = "intel,ce4100-cp", },
114 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet"); in dtb_setup_hpet()
150 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic"); in dtb_lapic_setup()
258 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic") in dtb_ioapic_setup()
/openbmc/linux/drivers/i2c/busses/
H A Di2c-pxa-pci.c3 * CE4100 PCI-I2C glue code for PXA's driver
6 * The CE4100's I2C device is more or less the same one as found on PXA.
72 pdev = platform_device_alloc("ce4100-i2c", devnum); in add_i2c_device()
H A Di2c-pxa.c217 { "ce4100-i2c", REGS_CE4100 },
/openbmc/linux/Documentation/devicetree/bindings/gpio/
H A Dsodaville.txt1 GPIO controller on CE4100 / Sodaville SoCs
4 The bindings for CE4100's GPIO controller match the generic description
/openbmc/linux/drivers/spi/
H A Dspi-pxa2xx-pci.c4 * CE4100's SPI device is more or less the same one as found on PXA.
326 { PCI_DEVICE_DATA(INTEL, CE4100, &ce4100_info_config) },
344 MODULE_DESCRIPTION("CE4100/LPSS PCI-SPI glue code for PXA's driver");
/openbmc/linux/arch/x86/platform/
H A DMakefile4 obj-y += ce4100/
/openbmc/linux/arch/x86/pci/
H A DMakefile11 obj-$(CONFIG_X86_INTEL_CE) += ce4100.o
H A Dce4100.c11 * the CE4100. Each register can be assigned a private init, read and
21 #include <asm/ce4100.h>
/openbmc/linux/Documentation/devicetree/bindings/serial/
H A Dmrvl,pxa-ssp.txt12 mrvl,ce4100-ssp
/openbmc/linux/arch/x86/include/uapi/asm/
H A Dbootparam.h270 * @X86_SUBARCH_CE4100: Used for Intel CE media processor (CE4100) SoC
271 * for settop boxes and media devices, the use of a subarch for CE4100
/openbmc/linux/drivers/soc/pxa/
H A Dssp.c105 { .compatible = "mrvl,ce4100-ssp", .data = (void *) CE4100_SSP },
/openbmc/qemu/hw/i386/
H A Dmicrovm-dt.c173 "compatible", "intel,ce4100-ioapic"); in dt_add_ioapic()
/openbmc/linux/arch/x86/
H A DKconfig598 bool "CE4100 TV platform"
608 Select for the Intel CE media processor (CE4100) SOC.
609 This option compiles in support for the CE4100 SOC for settop
/openbmc/linux/arch/x86/kernel/apic/
H A Dvector.c670 "intel,ce4100-ioapic"); in x86_fwspec_is_ioapic()
/openbmc/linux/Documentation/arch/x86/
H A Dboot.rst758 0x00000004 CE4100 TV Platform
/openbmc/linux/drivers/net/ethernet/intel/e1000/
H A De1000_hw.h806 /* Auxiliary Control Register. This register is CE4100 specific,
/openbmc/linux/drivers/tty/serial/8250/
H A D8250_pci.c5883 /* Intel CE4100 */

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