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/openbmc/linux/drivers/media/platform/ti/cal/
H A Dcal.c3 * TI Camera Access Layer (CAL) - Driver
30 #include "cal.h"
33 MODULE_DESCRIPTION("TI CAL driver");
243 void cal_quickdump_regs(struct cal_dev *cal) in cal_quickdump_regs() argument
247 cal_info(cal, "CAL Registers @ 0x%pa:\n", &cal->res->start); in cal_quickdump_regs()
249 (__force const void *)cal->base, in cal_quickdump_regs()
250 resource_size(cal->res), false); in cal_quickdump_regs()
252 for (i = 0; i < cal->data->num_csi2_phy; ++i) { in cal_quickdump_regs()
253 struct cal_camerarx *phy = cal->phy[i]; in cal_quickdump_regs()
255 cal_info(cal, "CSI2 Core %u Registers @ %pa:\n", i, in cal_quickdump_regs()
[all …]
H A Dcal.h3 * TI Camera Access Layer (CAL)
31 #define CAL_MODULE_NAME "cal"
149 * The Camera Adaptation Layer (CAL) module is paired with one or more complex
153 * The cal_dev structure represents the whole subsystem, including the CAL and
154 * the CAMERARX instances. Instances of struct cal_dev are named cal through the
170 struct cal_dev *cal; member
225 struct cal_dev *cal; member
257 #define cal_dbg(level, cal, fmt, arg...) \ argument
260 dev_printk(KERN_DEBUG, (cal)->dev, fmt, ##arg); \
262 #define cal_info(cal, fmt, arg...) \ argument
[all …]
H A Dcal-camerarx.c3 * TI Camera Access Layer (CAL) - CAMERARX
25 #include "cal.h"
82 u32 val = cal_read(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance)); in cal_camerarx_lane_config()
103 cal_write(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), val); in cal_camerarx_lane_config()
110 u32 num_lanes = phy->cal->data->camerarx[phy->instance].num_lanes; in cal_camerarx_enable()
176 cal_write_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_power()
182 current_state = cal_read_field(phy->cal, in cal_camerarx_power()
203 if (cal_read_field(phy->cal, in cal_camerarx_wait_reset()
211 if (cal_read_field(phy->cal, CAL_CSI2_COMPLEXIO_CFG(phy->instance), in cal_camerarx_wait_reset()
223 if (cal_read_field(phy->cal, in cal_camerarx_wait_stop_state()
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H A DMakefile2 obj-$(CONFIG_VIDEO_TI_CAL) += ti-cal.o
3 ti-cal-y := cal.o cal-camerarx.o cal-video.o
/openbmc/linux/drivers/media/tuners/
H A Dtda18218_priv.h53 #define R28_IRCAL1 0x28 /* IR CAL byte 1 */
54 #define R29_IRCAL2 0x29 /* IR CAL byte 2 */
55 #define R2A_IRCAL3 0x2a /* IR CAL byte 3 */
56 #define R2B_IRCAL4 0x2b /* IR CAL byte 4 */
57 #define R2C_RFCAL1 0x2c /* RF CAL byte 1 */
58 #define R2D_RFCAL2 0x2d /* RF CAL byte 2 */
59 #define R2E_RFCAL3 0x2e /* RF CAL byte 3 */
60 #define R2F_RFCAL4 0x2f /* RF CAL byte 4 */
61 #define R30_RFCAL5 0x30 /* RF CAL byte 5 */
62 #define R31_RFCAL6 0x31 /* RF CAL byte 6 */
[all …]
/openbmc/linux/drivers/net/wireless/broadcom/b43/
H A Dradio_2055.h44 #define B2055_CAL_MISC 0x24 /* CAL MISC */
45 #define B2055_CAL_COUT 0x25 /* CAL Counter out */
46 #define B2055_CAL_COUT2 0x26 /* CAL Counter out 2 */
47 #define B2055_CAL_CVARCTL 0x27 /* CAL CVAR Control */
48 #define B2055_CAL_RVARCTL 0x28 /* CAL RVAR Control */
49 #define B2055_CAL_LPOCTL 0x29 /* CAL LPO Control */
50 #define B2055_CAL_TS 0x2A /* CAL TS */
51 #define B2055_CAL_RCCALRTS 0x2B /* CAL RCCAL READ TS */
52 #define B2055_CAL_RCALRTS 0x2C /* CAL RCAL READ TS */
59 #define B2055_PLL_CALVTH 0x33 /* PLL CAL VTH */
[all …]
H A Dlo.c731 struct b43_lo_calib *cal; in b43_calibrate_lo_setting() local
769 cal = kmalloc(sizeof(*cal), GFP_KERNEL); in b43_calibrate_lo_setting()
770 if (!cal) { in b43_calibrate_lo_setting()
774 memcpy(&cal->bbatt, bbatt, sizeof(*bbatt)); in b43_calibrate_lo_setting()
775 memcpy(&cal->rfatt, rfatt, sizeof(*rfatt)); in b43_calibrate_lo_setting()
776 memcpy(&cal->ctl, &loctl, sizeof(loctl)); in b43_calibrate_lo_setting()
777 cal->calib_time = jiffies; in b43_calibrate_lo_setting()
778 INIT_LIST_HEAD(&cal->list); in b43_calibrate_lo_setting()
780 return cal; in b43_calibrate_lo_setting()
830 struct b43_lo_calib *cal; in b43_gphy_dc_lt_init() local
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/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Dphy.c35 s8 *gain_adj = dev->cal.rx.high_gain; in mt76x2_apply_gain_adj()
209 if (!dev->cal.tssi_cal_done) in mt76x2_phy_tssi_compensate()
212 if (!dev->cal.tssi_comp_pending) { in mt76x2_phy_tssi_compensate()
216 dev->cal.tssi_comp_pending = true; in mt76x2_phy_tssi_compensate()
221 dev->cal.tssi_comp_pending = false; in mt76x2_phy_tssi_compensate()
234 if (t.pa_mode || dev->cal.dpd_cal_done || dev->ed_tx_blocked) in mt76x2_phy_tssi_compensate()
239 dev->cal.dpd_cal_done = true; in mt76x2_phy_tssi_compensate()
250 gain_val[0] = dev->cal.agc_gain_cur[0] - dev->cal.agc_gain_adjust; in mt76x2_phy_set_gain_val()
251 gain_val[1] = dev->cal.agc_gain_cur[1] - dev->cal.agc_gain_adjust; in mt76x2_phy_set_gain_val()
276 u8 *gain = dev->cal.agc_gain_init; in mt76x2_phy_update_channel_gain()
[all …]
H A Dusb_phy.c16 if (dev->cal.channel_cal_done) in mt76x2u_phy_channel_calibrate()
39 dev->cal.channel_cal_done = true; in mt76x2u_phy_channel_calibrate()
90 dev->cal.channel_cal_done = false; in mt76x2u_phy_set_channel()
141 mt76x2_mcu_init_gain(dev, channel, dev->cal.rx.mcu_gain, true); in mt76x2u_phy_set_channel()
147 if (!dev->cal.init_cal_done) { in mt76x2u_phy_set_channel()
157 if (!dev->cal.init_cal_done) in mt76x2u_phy_set_channel()
159 dev->cal.init_cal_done = true; in mt76x2u_phy_set_channel()
194 dev->cal.tssi_cal_done = true; in mt76x2u_phy_set_channel()
H A Dpci_phy.c31 dev->cal.tssi_cal_done = true; in mt76x2_phy_tssi_init_cal()
41 if (dev->cal.channel_cal_done) in mt76x2_phy_channel_calibrate()
47 if (!dev->cal.tssi_cal_done) in mt76x2_phy_channel_calibrate()
68 dev->cal.channel_cal_done = true; in mt76x2_phy_channel_calibrate()
152 dev->cal.channel_cal_done = false; in mt76x2_phy_set_channel()
204 mt76x2_mcu_init_gain(dev, channel, dev->cal.rx.mcu_gain, true); in mt76x2_phy_set_channel()
212 if (!dev->cal.init_cal_done) { in mt76x2_phy_set_channel()
222 if (!dev->cal.init_cal_done) in mt76x2_phy_set_channel()
225 dev->cal.init_cal_done = true; in mt76x2_phy_set_channel()
265 dev->cal.temp = temp; in mt76x2_phy_temp_compensate()
/openbmc/linux/drivers/net/wireless/mediatek/mt76/
H A Dmt76x02_phy.c171 u8 limit = dev->cal.low_gain > 0 ? 16 : 4; in mt76x02_phy_adjust_vga_gain()
177 dev->cal.false_cca = false_cca; in mt76x02_phy_adjust_vga_gain()
178 if (false_cca > 800 && dev->cal.agc_gain_adjust < limit) { in mt76x02_phy_adjust_vga_gain()
179 dev->cal.agc_gain_adjust += 2; in mt76x02_phy_adjust_vga_gain()
181 } else if ((false_cca < 10 && dev->cal.agc_gain_adjust > 0) || in mt76x02_phy_adjust_vga_gain()
182 (dev->cal.agc_gain_adjust >= limit && false_cca < 500)) { in mt76x02_phy_adjust_vga_gain()
183 dev->cal.agc_gain_adjust -= 2; in mt76x02_phy_adjust_vga_gain()
187 dev->cal.agc_lowest_gain = dev->cal.agc_gain_adjust >= limit; in mt76x02_phy_adjust_vga_gain()
195 dev->cal.agc_gain_init[0] = mt76_get_field(dev, MT_BBP(AGC, 8), in mt76x02_init_agc_gain()
197 dev->cal.agc_gain_init[1] = mt76_get_field(dev, MT_BBP(AGC, 9), in mt76x02_init_agc_gain()
[all …]
H A Dmt76x02_debugfs.c79 seq_printf(file, "avg_rssi: %d\n", dev->cal.avg_rssi_all); in read_agc()
80 seq_printf(file, "low_gain: %d\n", dev->cal.low_gain); in read_agc()
81 seq_printf(file, "false_cca: %d\n", dev->cal.false_cca); in read_agc()
82 seq_printf(file, "agc_gain_adjust: %d\n", dev->cal.agc_gain_adjust); in read_agc()
142 debugfs_create_u8("temperature", 0400, dir, &dev->cal.temp); in mt76x02_init_debugfs()
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dti,cal.yaml4 $id: http://devicetree.org/schemas/media/ti,cal.yaml#
7 title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL)
13 The Camera Adaptation Layer (CAL) is a key component for image capture
18 CAL supports 2 camera port nodes on MIPI bus.
24 - ti,dra72-cal
26 - ti,dra72-pre-es2-cal
28 - ti,dra76-cal
30 - ti,am654-cal
35 - description: The CAL main register region
127 cal: cal@4845b000 {
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/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-jetson-tk1-emc.dtsi421 nvidia,emc-auto-cal-config = <0xa1430000>;
422 nvidia,emc-auto-cal-config2 = <0x00000000>;
423 nvidia,emc-auto-cal-config3 = <0x00000000>;
424 nvidia,emc-auto-cal-interval = <0x001fffff>;
589 nvidia,emc-auto-cal-config = <0xa1430000>;
590 nvidia,emc-auto-cal-config2 = <0x00000000>;
591 nvidia,emc-auto-cal-config3 = <0x00000000>;
592 nvidia,emc-auto-cal-interval = <0x001fffff>;
757 nvidia,emc-auto-cal-config = <0xa1430000>;
758 nvidia,emc-auto-cal-config2 = <0x00000000>;
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H A Dtegra124-apalis-emc.dtsi317 nvidia,emc-auto-cal-config = <0xa1430000>;
318 nvidia,emc-auto-cal-config2 = <0x00000000>;
319 nvidia,emc-auto-cal-config3 = <0x00000000>;
320 nvidia,emc-auto-cal-interval = <0x001fffff>;
414 nvidia,emc-auto-cal-config = <0xa1430000>;
415 nvidia,emc-auto-cal-config2 = <0x00000000>;
416 nvidia,emc-auto-cal-config3 = <0x00000000>;
417 nvidia,emc-auto-cal-interval = <0x001fffff>;
511 nvidia,emc-auto-cal-config = <0xa1430000>;
512 nvidia,emc-auto-cal-config2 = <0x00000000>;
[all …]
H A Dtegra124-nyan-blaze-emc.dtsi383 nvidia,emc-auto-cal-config = <0xa1430000>;
384 nvidia,emc-auto-cal-config2 = <0x00000000>;
385 nvidia,emc-auto-cal-config3 = <0x00000000>;
386 nvidia,emc-auto-cal-interval = <0x001fffff>;
551 nvidia,emc-auto-cal-config = <0xa1430000>;
552 nvidia,emc-auto-cal-config2 = <0x00000000>;
553 nvidia,emc-auto-cal-config3 = <0x00000000>;
554 nvidia,emc-auto-cal-interval = <0x001fffff>;
719 nvidia,emc-auto-cal-config = <0xa1430000>;
720 nvidia,emc-auto-cal-config2 = <0x00000000>;
[all …]
H A Dtegra124-nyan-big-emc.dtsi1134 nvidia,emc-auto-cal-config = <0xa1430000>;
1135 nvidia,emc-auto-cal-config2 = <0x00000000>;
1136 nvidia,emc-auto-cal-config3 = <0x00000000>;
1137 nvidia,emc-auto-cal-interval = <0x001fffff>;
1302 nvidia,emc-auto-cal-config = <0xa1430000>;
1303 nvidia,emc-auto-cal-config2 = <0x00000000>;
1304 nvidia,emc-auto-cal-config3 = <0x00000000>;
1305 nvidia,emc-auto-cal-interval = <0x001fffff>;
1470 nvidia,emc-auto-cal-config = <0xa1430000>;
1471 nvidia,emc-auto-cal-config2 = <0x00000000>;
[all …]
H A Dtegra30-asus-tf300t.dts350 nvidia,emc-auto-cal-interval = <0x001fffff>;
386 nvidia,emc-auto-cal-interval = <0x001fffff>;
422 nvidia,emc-auto-cal-interval = <0x001fffff>;
458 nvidia,emc-auto-cal-interval = <0x001fffff>;
494 nvidia,emc-auto-cal-interval = <0x001fffff>;
528 nvidia,emc-auto-cal-interval = <0x001fffff>;
568 nvidia,emc-auto-cal-interval = <0x001fffff>;
604 nvidia,emc-auto-cal-interval = <0x001fffff>;
640 nvidia,emc-auto-cal-interval = <0x001fffff>;
676 nvidia,emc-auto-cal-interval = <0x001fffff>;
[all …]
/openbmc/linux/drivers/input/gameport/
H A Dlightning.c104 static int l4_getcal(int port, int *cal) in l4_getcal() argument
127 cal[i] = inb(L4_PORT); in l4_getcal()
140 static int l4_setcal(int port, int *cal) in l4_setcal() argument
163 outb(cal[i], L4_PORT); in l4_setcal()
180 int cal[4]; in l4_calibrate() local
183 if (l4_getcal(l4->port, cal)) in l4_calibrate()
187 t = (max[i] * cal[i]) / 200; in l4_calibrate()
189 axes[i] = (axes[i] < 0) ? -1 : (axes[i] * cal[i]) / t; in l4_calibrate()
191 cal[i] = t; in l4_calibrate()
194 if (l4_setcal(l4->port, cal)) in l4_calibrate()
[all …]
/openbmc/linux/drivers/net/wireless/mediatek/mt76/mt76x0/
H A Dinitvals_init.h148 { MT_BBP(CAL, 47), 0x000010F0 },
149 { MT_BBP(CAL, 48), 0x00008080 },
150 { MT_BBP(CAL, 49), 0x00000F07 },
151 { MT_BBP(CAL, 50), 0x00000040 },
152 { MT_BBP(CAL, 51), 0x00000404 },
153 { MT_BBP(CAL, 52), 0x00080803 },
154 { MT_BBP(CAL, 53), 0x00000704 },
155 { MT_BBP(CAL, 54), 0x00002828 },
156 { MT_BBP(CAL, 55), 0x00005050 },
H A Dphy.c391 * For Ext A band, Disable Tx Inc dcoc Cal. in mt76x0_phy_set_chan_rf_params()
416 gain -= dev->cal.rx.lna_gain * 2; in mt76x0_phy_set_chan_bbp_params()
527 dev->cal.tssi_dc = mt76_rr(dev, MT_BBP(CORE, 35)) & 0xff; in mt76x0_phy_tssi_dc_calibrate()
776 tssi_db = mt76x0_phy_lin2db(ltssi - dev->cal.tssi_dc) * tssi_slope; in mt76x0_phy_get_delta_power()
789 ((ltssi - dev->cal.tssi_dc) < 1 && tssi_target < 0)) { in mt76x0_phy_get_delta_power()
794 if ((dev->cal.tssi_target ^ tssi_target) < 0 && in mt76x0_phy_get_delta_power()
795 dev->cal.tssi_target > -4096 && dev->cal.tssi_target < 4096 && in mt76x0_phy_get_delta_power()
798 tssi_target + dev->cal.tssi_target > 0) || in mt76x0_phy_get_delta_power()
800 tssi_target + dev->cal.tssi_target <= 0)) in mt76x0_phy_get_delta_power()
803 dev->cal.tssi_target = tssi_target; in mt76x0_phy_get_delta_power()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra124-emc.yaml71 nvidia,emc-auto-cal-config:
77 nvidia,emc-auto-cal-config2:
83 nvidia,emc-auto-cal-config3:
89 nvidia,emc-auto-cal-interval:
317 - nvidia,emc-auto-cal-config
318 - nvidia,emc-auto-cal-config2
319 - nvidia,emc-auto-cal-config3
320 - nvidia,emc-auto-cal-interval
385 nvidia,emc-auto-cal-config = <0xa1430000>;
386 nvidia,emc-auto-cal-config2 = <0x00000000>;
[all …]
/openbmc/linux/drivers/media/platform/ti/
H A DKconfig19 tristate "TI CAL (Camera Adaptation Layer) driver"
28 Support for the TI CAL (Camera Adaptation Layer) block
40 If set, CAL driver will start in Media Controller mode by
/openbmc/u-boot/arch/arm/cpu/armv7m/
H A Dsystick-timer.c59 u32 cal; in timer_init() local
65 cal = readl(&systick->calibration); in timer_init()
66 if (cal & SYSTICK_CAL_NOREF) in timer_init()
80 gd->arch.timer_rate_hz = (cal & SYSTICK_CAL_TENMS_MASK) * 100; in timer_init()
/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dcalib.c64 s16 calib_nf = ath9k_hw_get_nf_limits(ah, chan)->cal[chain]; in ath9k_hw_get_default_nf()
88 struct ath9k_hw_cal_data *cal, in ath9k_hw_update_nfcal_hist_buffer() argument
98 h = cal->nfCalHist; in ath9k_hw_update_nfcal_hist_buffer()
128 (test_bit(NFCAL_INTF, &cal->cal_flags) ? in ath9k_hw_update_nfcal_hist_buffer()
139 if (!test_bit(NFCAL_INTF, &cal->cal_flags)) in ath9k_hw_update_nfcal_hist_buffer()
150 clear_bit(NFCAL_INTF, &cal->cal_flags); in ath9k_hw_update_nfcal_hist_buffer()
215 ath_dbg(common, CALIBRATE, "Resetting Cal %d state for channel %u\n", in ath9k_hw_reset_calvalid()
274 ath9k_hw_get_nf_limits(ah, chan)->cal[i]; in ath9k_hw_loadnf()
285 * stop NF cal if ongoing to ensure NF load completes immediately in ath9k_hw_loadnf()
339 * here, the baseband nf cal will just be capped by our present in ath9k_hw_loadnf()

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