10e3d6777SRyder Lee // SPDX-License-Identifier: ISC
2b9f192b8SLorenzo Bianconi /*
3b9f192b8SLorenzo Bianconi * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4b9f192b8SLorenzo Bianconi * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
5b9f192b8SLorenzo Bianconi */
6b9f192b8SLorenzo Bianconi
7b9f192b8SLorenzo Bianconi #include <linux/kernel.h>
8b9f192b8SLorenzo Bianconi
9bfdff5d0SLorenzo Bianconi #include "mt76x02.h"
10b9f192b8SLorenzo Bianconi #include "mt76x02_phy.h"
11b9f192b8SLorenzo Bianconi
mt76x02_phy_set_rxpath(struct mt76x02_dev * dev)12bfdff5d0SLorenzo Bianconi void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev)
136034b2b0SLorenzo Bianconi {
146034b2b0SLorenzo Bianconi u32 val;
156034b2b0SLorenzo Bianconi
16bfdff5d0SLorenzo Bianconi val = mt76_rr(dev, MT_BBP(AGC, 0));
176034b2b0SLorenzo Bianconi val &= ~BIT(4);
186034b2b0SLorenzo Bianconi
19b9027e08SLorenzo Bianconi switch (dev->mphy.chainmask & 0xf) {
206034b2b0SLorenzo Bianconi case 2:
216034b2b0SLorenzo Bianconi val |= BIT(3);
226034b2b0SLorenzo Bianconi break;
236034b2b0SLorenzo Bianconi default:
246034b2b0SLorenzo Bianconi val &= ~BIT(3);
256034b2b0SLorenzo Bianconi break;
266034b2b0SLorenzo Bianconi }
276034b2b0SLorenzo Bianconi
28bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_BBP(AGC, 0), val);
296034b2b0SLorenzo Bianconi mb();
30bfdff5d0SLorenzo Bianconi val = mt76_rr(dev, MT_BBP(AGC, 0));
316034b2b0SLorenzo Bianconi }
326034b2b0SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_phy_set_rxpath);
336034b2b0SLorenzo Bianconi
mt76x02_phy_set_txdac(struct mt76x02_dev * dev)34bfdff5d0SLorenzo Bianconi void mt76x02_phy_set_txdac(struct mt76x02_dev *dev)
356034b2b0SLorenzo Bianconi {
366034b2b0SLorenzo Bianconi int txpath;
376034b2b0SLorenzo Bianconi
38b9027e08SLorenzo Bianconi txpath = (dev->mphy.chainmask >> 8) & 0xf;
396034b2b0SLorenzo Bianconi switch (txpath) {
406034b2b0SLorenzo Bianconi case 2:
41bfdff5d0SLorenzo Bianconi mt76_set(dev, MT_BBP(TXBE, 5), 0x3);
426034b2b0SLorenzo Bianconi break;
436034b2b0SLorenzo Bianconi default:
44bfdff5d0SLorenzo Bianconi mt76_clear(dev, MT_BBP(TXBE, 5), 0x3);
456034b2b0SLorenzo Bianconi break;
466034b2b0SLorenzo Bianconi }
476034b2b0SLorenzo Bianconi }
486034b2b0SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_phy_set_txdac);
496034b2b0SLorenzo Bianconi
50b9f192b8SLorenzo Bianconi static u32
mt76x02_tx_power_mask(u8 v1,u8 v2,u8 v3,u8 v4)51b9f192b8SLorenzo Bianconi mt76x02_tx_power_mask(u8 v1, u8 v2, u8 v3, u8 v4)
52b9f192b8SLorenzo Bianconi {
53b9f192b8SLorenzo Bianconi u32 val = 0;
54b9f192b8SLorenzo Bianconi
55b9f192b8SLorenzo Bianconi val |= (v1 & (BIT(6) - 1)) << 0;
56b9f192b8SLorenzo Bianconi val |= (v2 & (BIT(6) - 1)) << 8;
57b9f192b8SLorenzo Bianconi val |= (v3 & (BIT(6) - 1)) << 16;
58b9f192b8SLorenzo Bianconi val |= (v4 & (BIT(6) - 1)) << 24;
59b9f192b8SLorenzo Bianconi return val;
60b9f192b8SLorenzo Bianconi }
61b9f192b8SLorenzo Bianconi
mt76x02_get_max_rate_power(struct mt76x02_rate_power * r)62b376d963SFelix Fietkau int mt76x02_get_max_rate_power(struct mt76x02_rate_power *r)
63b9f192b8SLorenzo Bianconi {
64b9f192b8SLorenzo Bianconi s8 ret = 0;
65b9f192b8SLorenzo Bianconi int i;
66b9f192b8SLorenzo Bianconi
67b9f192b8SLorenzo Bianconi for (i = 0; i < sizeof(r->all); i++)
68b9f192b8SLorenzo Bianconi ret = max(ret, r->all[i]);
69b9f192b8SLorenzo Bianconi
70b9f192b8SLorenzo Bianconi return ret;
71b9f192b8SLorenzo Bianconi }
72b9f192b8SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_get_max_rate_power);
73b9f192b8SLorenzo Bianconi
mt76x02_limit_rate_power(struct mt76x02_rate_power * r,int limit)74b376d963SFelix Fietkau void mt76x02_limit_rate_power(struct mt76x02_rate_power *r, int limit)
75b9f192b8SLorenzo Bianconi {
76b9f192b8SLorenzo Bianconi int i;
77b9f192b8SLorenzo Bianconi
78b9f192b8SLorenzo Bianconi for (i = 0; i < sizeof(r->all); i++)
79b9f192b8SLorenzo Bianconi if (r->all[i] > limit)
80b9f192b8SLorenzo Bianconi r->all[i] = limit;
81b9f192b8SLorenzo Bianconi }
82b9f192b8SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_limit_rate_power);
83b9f192b8SLorenzo Bianconi
mt76x02_add_rate_power_offset(struct mt76x02_rate_power * r,int offset)84b376d963SFelix Fietkau void mt76x02_add_rate_power_offset(struct mt76x02_rate_power *r, int offset)
85b9f192b8SLorenzo Bianconi {
86b9f192b8SLorenzo Bianconi int i;
87b9f192b8SLorenzo Bianconi
88b9f192b8SLorenzo Bianconi for (i = 0; i < sizeof(r->all); i++)
89b9f192b8SLorenzo Bianconi r->all[i] += offset;
90b9f192b8SLorenzo Bianconi }
91b9f192b8SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_add_rate_power_offset);
92b9f192b8SLorenzo Bianconi
mt76x02_phy_set_txpower(struct mt76x02_dev * dev,int txp_0,int txp_1)93bfdff5d0SLorenzo Bianconi void mt76x02_phy_set_txpower(struct mt76x02_dev *dev, int txp_0, int txp_1)
94b9f192b8SLorenzo Bianconi {
95b376d963SFelix Fietkau struct mt76x02_rate_power *t = &dev->rate_power;
96b9f192b8SLorenzo Bianconi
97bfdff5d0SLorenzo Bianconi mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_0, txp_0);
98bfdff5d0SLorenzo Bianconi mt76_rmw_field(dev, MT_TX_ALC_CFG_0, MT_TX_ALC_CFG_0_CH_INIT_1, txp_1);
99b9f192b8SLorenzo Bianconi
100bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_0,
101b9f192b8SLorenzo Bianconi mt76x02_tx_power_mask(t->cck[0], t->cck[2], t->ofdm[0],
102b9f192b8SLorenzo Bianconi t->ofdm[2]));
103bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_1,
104b9f192b8SLorenzo Bianconi mt76x02_tx_power_mask(t->ofdm[4], t->ofdm[6], t->ht[0],
105b9f192b8SLorenzo Bianconi t->ht[2]));
106bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_2,
107b9f192b8SLorenzo Bianconi mt76x02_tx_power_mask(t->ht[4], t->ht[6], t->ht[8],
108b9f192b8SLorenzo Bianconi t->ht[10]));
109bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_3,
110*ba45841cSFelix Fietkau mt76x02_tx_power_mask(t->ht[12], t->ht[14], t->ht[0],
111*ba45841cSFelix Fietkau t->ht[2]));
112bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_4,
113*ba45841cSFelix Fietkau mt76x02_tx_power_mask(t->ht[4], t->ht[6], 0, 0));
114bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_7,
115*ba45841cSFelix Fietkau mt76x02_tx_power_mask(t->ofdm[7], t->vht[0], t->ht[7],
116*ba45841cSFelix Fietkau t->vht[1]));
117bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_8,
118*ba45841cSFelix Fietkau mt76x02_tx_power_mask(t->ht[14], 0, t->vht[0], t->vht[1]));
119bfdff5d0SLorenzo Bianconi mt76_wr(dev, MT_TX_PWR_CFG_9,
120*ba45841cSFelix Fietkau mt76x02_tx_power_mask(t->ht[7], 0, t->vht[0], t->vht[1]));
121b9f192b8SLorenzo Bianconi }
122b9f192b8SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_phy_set_txpower);
12350b9e8d5SLorenzo Bianconi
mt76x02_phy_set_bw(struct mt76x02_dev * dev,int width,u8 ctrl)124032c08f4SLorenzo Bianconi void mt76x02_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl)
125032c08f4SLorenzo Bianconi {
126032c08f4SLorenzo Bianconi int core_val, agc_val;
127032c08f4SLorenzo Bianconi
128032c08f4SLorenzo Bianconi switch (width) {
129032c08f4SLorenzo Bianconi case NL80211_CHAN_WIDTH_80:
130032c08f4SLorenzo Bianconi core_val = 3;
131032c08f4SLorenzo Bianconi agc_val = 7;
132032c08f4SLorenzo Bianconi break;
133032c08f4SLorenzo Bianconi case NL80211_CHAN_WIDTH_40:
134032c08f4SLorenzo Bianconi core_val = 2;
135032c08f4SLorenzo Bianconi agc_val = 3;
136032c08f4SLorenzo Bianconi break;
137032c08f4SLorenzo Bianconi default:
138032c08f4SLorenzo Bianconi core_val = 0;
139032c08f4SLorenzo Bianconi agc_val = 1;
140032c08f4SLorenzo Bianconi break;
141032c08f4SLorenzo Bianconi }
142032c08f4SLorenzo Bianconi
143032c08f4SLorenzo Bianconi mt76_rmw_field(dev, MT_BBP(CORE, 1), MT_BBP_CORE_R1_BW, core_val);
144032c08f4SLorenzo Bianconi mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_BW, agc_val);
145032c08f4SLorenzo Bianconi mt76_rmw_field(dev, MT_BBP(AGC, 0), MT_BBP_AGC_R0_CTRL_CHAN, ctrl);
146032c08f4SLorenzo Bianconi mt76_rmw_field(dev, MT_BBP(TXBE, 0), MT_BBP_TXBE_R0_CTRL_CHAN, ctrl);
147032c08f4SLorenzo Bianconi }
148032c08f4SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_phy_set_bw);
149370c6415SLorenzo Bianconi
mt76x02_phy_set_band(struct mt76x02_dev * dev,int band,bool primary_upper)150370c6415SLorenzo Bianconi void mt76x02_phy_set_band(struct mt76x02_dev *dev, int band,
151370c6415SLorenzo Bianconi bool primary_upper)
152370c6415SLorenzo Bianconi {
153370c6415SLorenzo Bianconi switch (band) {
154370c6415SLorenzo Bianconi case NL80211_BAND_2GHZ:
155370c6415SLorenzo Bianconi mt76_set(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_2G);
156370c6415SLorenzo Bianconi mt76_clear(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_5G);
157370c6415SLorenzo Bianconi break;
158370c6415SLorenzo Bianconi case NL80211_BAND_5GHZ:
159370c6415SLorenzo Bianconi mt76_clear(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_2G);
160370c6415SLorenzo Bianconi mt76_set(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_5G);
161370c6415SLorenzo Bianconi break;
162370c6415SLorenzo Bianconi }
163370c6415SLorenzo Bianconi
164370c6415SLorenzo Bianconi mt76_rmw_field(dev, MT_TX_BAND_CFG, MT_TX_BAND_CFG_UPPER_40M,
165370c6415SLorenzo Bianconi primary_upper);
166370c6415SLorenzo Bianconi }
167370c6415SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_phy_set_band);
1689f884f0fSLorenzo Bianconi
mt76x02_phy_adjust_vga_gain(struct mt76x02_dev * dev)1699f884f0fSLorenzo Bianconi bool mt76x02_phy_adjust_vga_gain(struct mt76x02_dev *dev)
1709f884f0fSLorenzo Bianconi {
1719f884f0fSLorenzo Bianconi u8 limit = dev->cal.low_gain > 0 ? 16 : 4;
1729f884f0fSLorenzo Bianconi bool ret = false;
1739f884f0fSLorenzo Bianconi u32 false_cca;
1749f884f0fSLorenzo Bianconi
175ff97c52aSRyder Lee false_cca = FIELD_GET(MT_RX_STAT_1_CCA_ERRORS,
176ff97c52aSRyder Lee mt76_rr(dev, MT_RX_STAT_1));
1779f884f0fSLorenzo Bianconi dev->cal.false_cca = false_cca;
1789f884f0fSLorenzo Bianconi if (false_cca > 800 && dev->cal.agc_gain_adjust < limit) {
1799f884f0fSLorenzo Bianconi dev->cal.agc_gain_adjust += 2;
1809f884f0fSLorenzo Bianconi ret = true;
1819f884f0fSLorenzo Bianconi } else if ((false_cca < 10 && dev->cal.agc_gain_adjust > 0) ||
1829f884f0fSLorenzo Bianconi (dev->cal.agc_gain_adjust >= limit && false_cca < 500)) {
1839f884f0fSLorenzo Bianconi dev->cal.agc_gain_adjust -= 2;
1849f884f0fSLorenzo Bianconi ret = true;
1859f884f0fSLorenzo Bianconi }
1869f884f0fSLorenzo Bianconi
187a0ac8061SFelix Fietkau dev->cal.agc_lowest_gain = dev->cal.agc_gain_adjust >= limit;
188a0ac8061SFelix Fietkau
1899f884f0fSLorenzo Bianconi return ret;
1909f884f0fSLorenzo Bianconi }
1919f884f0fSLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_phy_adjust_vga_gain);
192e48797e9SLorenzo Bianconi
mt76x02_init_agc_gain(struct mt76x02_dev * dev)193e48797e9SLorenzo Bianconi void mt76x02_init_agc_gain(struct mt76x02_dev *dev)
194e48797e9SLorenzo Bianconi {
195e48797e9SLorenzo Bianconi dev->cal.agc_gain_init[0] = mt76_get_field(dev, MT_BBP(AGC, 8),
196e48797e9SLorenzo Bianconi MT_BBP_AGC_GAIN);
197e48797e9SLorenzo Bianconi dev->cal.agc_gain_init[1] = mt76_get_field(dev, MT_BBP(AGC, 9),
198e48797e9SLorenzo Bianconi MT_BBP_AGC_GAIN);
199e48797e9SLorenzo Bianconi memcpy(dev->cal.agc_gain_cur, dev->cal.agc_gain_init,
200e48797e9SLorenzo Bianconi sizeof(dev->cal.agc_gain_cur));
201e48797e9SLorenzo Bianconi dev->cal.low_gain = -1;
202f1b8ee35SStanislaw Gruszka dev->cal.gain_init_done = true;
203e48797e9SLorenzo Bianconi }
204e48797e9SLorenzo Bianconi EXPORT_SYMBOL_GPL(mt76x02_init_agc_gain);
205