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/openbmc/u-boot/drivers/fpga/
H A DKconfig7 bool "Enable Altera FPGA drivers"
10 Say Y here to enable the Altera FPGA driver
12 This provides basic infrastructure to support Altera FPGA devices.
13 Enable Altera FPGA specific functions which includes bitstream
25 bool "Enable Altera FPGA driver for Cyclone II"
28 Say Y here to enable the Altera Cyclone II FPGA specific driver
30 This provides common functionality for Altera Cyclone II devices.
32 on Altera Cyclone II device.
35 bool "Enable Altera FPGA driver for Stratix 10"
39 Say Y here to enable the Altera Stratix 10 FPGA specific driver
[all …]
/openbmc/linux/drivers/fpga/
H A DKconfig16 tristate "Altera SOCFPGA FPGA Manager"
19 FPGA manager driver support for Altera SOCFPGA.
22 tristate "Altera SoCFPGA Arria10"
26 FPGA manager driver support for Altera Arria10 SoCFPGA.
29 tristate "Altera Partial Reconfiguration IP Core"
31 Core driver support for Altera Partial Reconfiguration IP component
34 tristate "Platform support of Altera Partial Reconfiguration IP Core"
37 Platform driver support for Altera Partial Reconfiguration IP
41 tristate "Altera FPGA Passive Serial over SPI"
45 FPGA manager driver support for Altera Arria/Cyclone/Stratix
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H A DMakefile10 obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
11 obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
25 obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
26 obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
33 obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
34 obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
H A Daltera-pr-ip-core-plat.c3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
10 #include <linux/fpga/altera-pr-ip-core.h>
45 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Platform Driver");
H A Daltera-hps2fpga.c3 * FPGA to/from HPS Bridge Driver for Altera SoCFPGA Devices
5 * Copyright (C) 2013-2016 Altera Corporation, All Rights Reserved.
8 * fpga: altera-hps2fpga: fix HPS2FPGA bridge visibility to L3 masters
13 * This driver manages bridges on a Altera SOCFPGA between the ARM host
225 MODULE_DESCRIPTION("Altera SoCFPGA HPS to FPGA Bridge");
226 MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
H A Daltera-pr-ip-core.c3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
11 #include <linux/fpga/altera-pr-ip-core.h>
200 MODULE_DESCRIPTION("Altera Partial Reconfiguration IP Core");
/openbmc/linux/drivers/edac/
H A DKconfig402 bool "Altera SOCFPGA ECC"
406 Altera SOCs. This is the global enable for the
407 various Altera peripherals.
410 bool "Altera SDRAM ECC"
414 Altera SDRAM Memory for Altera SoCs. Note that the
419 bool "Altera L2 Cache ECC"
423 Altera L2 cache Memory for Altera SoCs. This option
427 bool "Altera On-Chip RAM ECC"
431 Altera On-Chip RAM Memory for Altera SoCs.
434 bool "Altera Ethernet FIFO ECC"
[all …]
/openbmc/linux/drivers/misc/altera-stapl/
H A DMakefile2 altera-stapl-y = altera-jtag.o altera-comp.o altera.o
3 altera-stapl-$(CONFIG_HAS_IOPORT) += altera-lpt.o
5 obj-$(CONFIG_ALTERA_STAPL) += altera-stapl.o
H A Daltera-lpt.c3 * altera-lpt.c
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
14 #include "altera-exprt.h"
H A DKconfig2 comment "Altera FPGA firmware download module (requires I2C)"
6 tristate "Altera FPGA firmware download module"
9 An Altera FPGA module. Say Y when you want to support this tool.
H A Daltera-exprt.h3 * altera-exprt.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
H A Daltera-comp.c3 * altera-comp.c
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
13 #include "altera-exprt.h"
/openbmc/u-boot/arch/arm/mach-socfpga/
H A DKconfig41 prompt "Altera SOCFPGA board select"
45 bool "Altera SOCFPGA SoCDK (Arria 10)"
49 bool "Altera SOCFPGA SoCDK (Arria V)"
53 bool "Altera SOCFPGA SoCDK (Cyclone V)"
115 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
116 default "altera" if TARGET_SOCFPGA_ARRIA10_SOCDK
117 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
118 default "altera" if TARGET_SOCFPGA_STRATIX10_SOCDK
H A Dmisc_gen5.c3 * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
11 #include <altera.h>
95 printf("FPGA: Not Altera chip ID\n"); in socfpga_fpga_id()
104 printf("FPGA: Unknown Altera chip, ID 0x%08x\n", id); in socfpga_fpga_id()
109 printf("FPGA: Altera %s, version 0x%01x\n", in socfpga_fpga_id()
123 puts("CPU: Altera SoCFPGA Platform\n"); in print_cpuinfo()
/openbmc/linux/Documentation/networking/device_drivers/ethernet/altera/
H A Daltera_tse.rst6 Altera Triple-Speed Ethernet MAC driver
9 Copyright |copy| 2008-2014 Altera Corporation
11 This is the driver for the Altera Triple-Speed Ethernet (TSE) controllers
19 For more information visit www.altera.com and www.rocketboards.org. Support
25 components that can be assembled and built into an FPGA using the Altera
44 visit www.altera.com for known, documented SGDMA errata.
61 Altera Triple-Speed Ethernet MAC support (ALTERA_TSE)
147 RFC defined statistics, and driver or Altera defined statistics. The four
154 - Altera Triple Speed Ethernet User Guide, found at http://www.altera.com
274 Altera TSE. This statistics counts the number of received good and errored
[all …]
/openbmc/linux/drivers/gpio/
H A Dgpio-altera-a10sr.c5 * GPIO driver for Altera Arria10 MAX5 System Resource Chip
11 #include <linux/mfd/altera-a10sr.h>
17 * struct altr_a10sr_gpio - Altera Max5 GPIO device private data structure
114 MODULE_AUTHOR("Thor Thayer <tthayer@opensource.altera.com>");
115 MODULE_DESCRIPTION("Altera Arria10 System Resource Chip GPIO");
/openbmc/linux/include/linux/fpga/
H A Daltera-pr-ip-core.h3 * Driver for Altera Partial Reconfiguration IP Core
7 * Based on socfpga-a10.c Copyright (C) 2015-2016 Altera Corporation
8 * by Alan Tull <atull@opensource.altera.com>
/openbmc/linux/drivers/dma/
H A Daltera-msgdma.c3 * DMA driver for Altera mSGDMA IP core
206 * @mdev: Pointer to the Altera mSGDMA device structure
227 * @mdev: Pointer to the Altera mSGDMA device structure
245 * @mdev: Pointer to the Altera mSGDMA device structure
531 * @mdev: Pointer to the Altera mSGDMA device structure
547 * @mdev: Pointer to the Altera mSGDMA device structure
581 * @mdev: Pointer to the Altera mSGDMA device structure
605 * @mdev: Pointer to the Altera mSGDMA device structure
622 * @mdev: Pointer to the Altera mSGDMA device structure
679 * @t: Pointer to the Altera sSGDMA channel structure
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/openbmc/u-boot/drivers/mtd/
H A DKconfig75 bool "Altera Generic Quad SPI Controller"
78 This enables access to Altera EPCQ/EPCS flash chips using the
79 Altera Generic Quad SPI Controller. The controller converts SPI
81 "Embedded Peripherals IP User Guide" of Altera.
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dfpga_manager.h3 * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
10 #include <altera.h>
/openbmc/linux/include/misc/
H A Daltera.h3 * altera.h
5 * altera FPGA driver
7 * Copyright (C) Altera Corporation 1998-2001
/openbmc/linux/Documentation/devicetree/bindings/fpga/
H A Daltera-passive-serial.txt1 Altera Passive Serial SPI FPGA Manager
3 Altera FPGAs support a method of loading the bitstream over what is
8 See https://www.altera.com/literature/hb/cyc/cyc_c51013.pdf
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Di2c-altera.txt1 * Altera I2C Controller
2 * This is Altera's synthesizable logic block I2C Controller for use
3 * in Altera's FPGAs.
/openbmc/linux/drivers/media/pci/cx23885/
H A DKconfig55 tristate "Altera FPGA based CI module"
59 An Altera FPGA CI module for NetUP Dual DVB-T/C RF CI card.
62 module will be called altera-ci
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_vt.dts3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
10 model = "Altera SOCFPGA VT";

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