Searched full:ar8031 (Results 1 – 18 of 18) sorted by relevance
| /openbmc/linux/Documentation/devicetree/bindings/net/ |
| H A D | qca,ar803x.yaml | 40 Only supported on the AR8031.
71 Only supported on the AR8031.
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| /openbmc/u-boot/board/k+p/kp_imx6q_tpc/ |
| H A D | kp_imx6q_tpc.c | 103 /* AR8031 PHY Reset */
109 /* Reset AR8031 PHY */ in eth_phy_reset()
139 /* To enable AR8031 output a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
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| /openbmc/u-boot/board/wandboard/ |
| H A D | wandboard.c | 109 /* AR8031 PHY Reset */
139 /* Reset AR8031 PHY */ in setup_iomux_enet()
213 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
222 mask = 0xffe3; /* AR8031 */ in ar8031_phy_fixup()
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| /openbmc/linux/arch/arm/boot/dts/nxp/ls/ |
| H A D | ls1021a-tsn.dts | 205 /* AR8031 */
212 /* AR8031 */
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| /openbmc/u-boot/board/compulab/cl-som-imx7/ |
| H A D | cl-som-imx7.c | 132 /* Ar8031 phy SmartEEE feature cause link status generates glitch, in cl_som_imx7_rgmii_rework()
142 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in cl_som_imx7_rgmii_rework()
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| /openbmc/u-boot/drivers/net/phy/ |
| H A D | atheros.c | 105 .name = "AR8031/AR8033",
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| /openbmc/linux/drivers/net/phy/ |
| H A D | at803x.c | 152 /* The AR8035 has another mask which is compatible with the AR8031/AR8033 mask
714 /* Only 1000Base-X is supported by AR8031/8033 as the downstream SerDes in at803x_sfp_insert()
828 /* Only supported on AR8031/AR8033, the AR8030/AR8035 use strapping in at803x_parse_dt()
846 /* Only AR8031/8033 support 1000Base-X for SFP modules */ in at803x_parse_dt()
915 /* AR8031/AR8033 have different status registers in at803x_get_features()
2091 /* Qualcomm Atheros AR8031/AR8033 */
2093 .name = "Qualcomm Atheros AR8031/AR8033",
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| H A D | Kconfig | 328 Currently supports the AR8030, AR8031, AR8033, AR8035 and internal
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| /openbmc/u-boot/board/freescale/mx6sxsabresd/ |
| H A D | mx6sxsabresd.c | 98 /* AR8031 PHY Reset */
127 /* Reset AR8031 PHY */ in setup_fec()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | fsl-imx8qxp-mek.dts | 222 fsl,ar8031-phy-fixup;
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| /openbmc/u-boot/board/freescale/mx6qarm2/ |
| H A D | mx6qarm2.c | 177 * We need enable AR8031 ouput a 125MHz clk from CLK_25M in fecmxc_mii_postcall()
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| /openbmc/u-boot/board/compulab/cm_fx6/ |
| H A D | cm_fx6.c | 369 /* Ar8031 phy SmartEEE feature cause link status generates glitch, in mx6_rgmii_rework()
379 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in mx6_rgmii_rework()
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| /openbmc/linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mp-data-modul-edm-sbc.dts | 158 /* Atheros AR8031 PHY */
198 /* Atheros AR8031 PHY */
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| H A D | imx8mm-data-modul-edm-sbc.dts | 180 /* Atheros AR8031 PHY */
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| /openbmc/u-boot/board/logicpd/imx6/ |
| H A D | imx6logic.c | 97 /* To enable AR8031 output a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
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| /openbmc/linux/drivers/net/ethernet/oki-semi/pch_gbe/ |
| H A D | pch_gbe_phy.c | 65 /* AR8031 PHY Debug Registers */
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| /openbmc/u-boot/board/freescale/mx6sabresd/ |
| H A D | mx6sabresd.c | 90 /* AR8031 PHY Reset */
374 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
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| /openbmc/u-boot/board/freescale/mx6sabreauto/ |
| H A D | mx6sabreauto.c | 372 /* To enable AR8031 ouput a 125MHz clk from CLK_25M */ in ar8031_phy_fixup()
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