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/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4212.dtsi98 opp-900000000 {
99 opp-hz = /bits/ 64 <900000000>;
H A Dexynos5800.dtsi63 opp-900000000 {
117 opp-900000000 {
H A Dexynos4412.dtsi124 opp-900000000 {
125 opp-hz = /bits/ 64 <900000000>;
H A Dexynos5420.dtsi202 opp-900000000 {
203 opp-hz = /bits/ 64 <900000000>;
243 opp-900000000 {
244 opp-hz = /bits/ 64 <900000000>;
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8dxl.dtsi71 opp-900000000 {
72 opp-hz = /bits/ 64 <900000000>;
H A Dimx8qxp.dtsi140 opp-900000000 {
141 opp-hz = /bits/ 64 <900000000>;
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dapple,nco.yaml54 clock-frequency = <900000000>;
/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt8112-jxxx.dtsi80 clock-frequency = <900000000>;
H A Dt8103-jxxx.dtsi91 clock-frequency = <900000000>;
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ull.dtsi15 clock-frequency = <900000000>;
/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dnvidia,tegra30-mc.yaml80 maximum: 900000000
H A Dnvidia,tegra30-emc.yaml69 maximum: 900000000
/openbmc/u-boot/arch/arm/mach-socfpga/include/mach/
H A Dclock_manager_arria10.h211 #define CLKMGR_PLL_RAMP_MPUCLK_THRESHOLD_HZ 900000000
/openbmc/linux/drivers/clk/
H A Dclk-si5351.h15 #define SI5351_PLL_VCO_MAX 900000000
/openbmc/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2.yaml371 opp-900000000 {
379 opp-hz = /bits/ 64 <900000000>;
/openbmc/linux/drivers/cpufreq/
H A Dimx6q-cpufreq.c319 * 2b'11: 900000000Hz on i.MX6ULL only; in imx6ul_opp_check_speed_grading()
334 imx6x_disable_freq_in_opp(dev, 900000000); in imx6ul_opp_check_speed_grading()
/openbmc/qemu/tests/qtest/libqos/
H A Digb.c74 qtest_clock_step(d->pci_dev.bus->qts, 900000000); in igb_pci_start_hw()
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8186.dtsi731 opp-900000000-3 {
732 opp-hz = /bits/ 64 <900000000>;
737 opp-900000000-4 {
738 opp-hz = /bits/ 64 <900000000>;
743 opp-900000000-5 {
744 opp-hz = /bits/ 64 <900000000>;
/openbmc/u-boot/arch/arm/dts/
H A Dexynos5800-peach-pi.dts57 arm-frequency = <900000000>;
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-asus-tf201.dts615 /delete-node/ opp-900000000;
625 /delete-node/ opp-900000000-1350;
H A Dtegra30-peripherals-opp.dtsi381 opp-900000000-1350 {
383 opp-hz = /bits/ 64 <900000000>;
513 opp-900000000 {
514 opp-hz = /bits/ 64 <900000000>;
H A Dtegra30-asus-tf700t.dts805 /delete-node/ opp-900000000;
809 /delete-node/ opp-900000000-1350;
/openbmc/u-boot/arch/arm/include/asm/arch-imx8/sci/
H A Dtypes.h67 #define SC_900MHZ 900000000U /* 900MHz */
/openbmc/linux/drivers/media/tuners/
H A Dmxl5005s.c2384 if (state->RF_LO > 650000000UL && state->RF_LO <= 900000000UL) { in MXL_TuneRF()
2391 if (state->RF_LO > 900000000UL) in MXL_TuneRF()
2456 if (state->RF_LO > 850000000UL && state->RF_LO <= 900000000UL) { in MXL_TuneRF()
2605 FmaxBin = 900000000UL ; in MXL_TuneRF()
2735 FmaxBin = 900000000UL ; in MXL_TuneRF()
2866 if (state->RF_IN >= 760000000 && state->RF_IN <= 900000000) { in MXL_TuneRF()
2928 if (state->RF_IN >= 760000000 && state->RF_IN <= 900000000) { in MXL_TuneRF()
2976 if (state->RF_IN >= 640000000 && state->RF_IN <= 900000000) { in MXL_TuneRF()
3058 state->RF_IN <= 900000000) { in MXL_TuneRF()
3107 if (state->RF_IN >= 640000000 && state->RF_IN <= 900000000) { in MXL_TuneRF()
[all …]
/openbmc/linux/drivers/clk/qcom/
H A Dgpucc-sm6125.c151 F(900000000, P_GPU_CC_PLL0_OUT_AUX2, 2, 0, 0),

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