| /openbmc/linux/tools/testing/selftests/bpf/prog_tests/ |
| H A D | xdp_adjust_tail.c | 101 /* Test case-64 */ in test_xdp_adjust_tail_grow2()
103 tattr.data_size_in = 64; /* Determine test case via pkt size */ in test_xdp_adjust_tail_grow2()
108 ASSERT_EQ(errno, ENOSPC, "case-64 errno"); /* Due limit copy_size in bpf_test_finish */ in test_xdp_adjust_tail_grow2()
109 ASSERT_EQ(tattr.retval, XDP_TX, "case-64 retval"); in test_xdp_adjust_tail_grow2()
110 ASSERT_EQ(tattr.data_size_out, 192, "case-64 data_size_out"); /* Expected grow size */ in test_xdp_adjust_tail_grow2()
113 ASSERT_EQ(buf[0], 1, "case-64-data buf[0]"); /* 0-63 memset to 1 */ in test_xdp_adjust_tail_grow2()
114 ASSERT_EQ(buf[63], 1, "case-64-data buf[63]"); in test_xdp_adjust_tail_grow2()
115 ASSERT_EQ(buf[64], 0, "case-64-data buf[64]"); /* 64-127 memset to 0 */ in test_xdp_adjust_tail_grow2()
116 ASSERT_EQ(buf[127], 0, "case-64-data buf[127]"); in test_xdp_adjust_tail_grow2()
117 ASSERT_EQ(buf[128], 1, "case-64-data buf[128]"); /* 128-191 memset to 1 */ in test_xdp_adjust_tail_grow2()
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| /openbmc/u-boot/board/freescale/t102xrdb/ |
| H A D | README | 4 combines two or one 64-bit Power Architecture e5500 core respectively with high
14 - two e5500 cores, each with a private 256 KB L2 cache
15 - Up to 1.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
19 - 256 KB shared L3 CoreNet platform cache (CPC)
24 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
71 DDR: 64-bit 32-bit
82 - Supports 64-bit 4GB DDR3L DIMM
96 - On-board 64MB SPI flash
104 - T1023 SoC integrating two 64-bit e5500 cores up to 1.4GHz
117 - eSPI: 64MB S25FL512SAGMFI010 Spansion SPI flash.
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| /openbmc/u-boot/board/freescale/t1040qds/ |
| H A D | README | 8 The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
14 - Four e5500 cores, each with a private 256 KB L2 cache
15 - 256 KB shared L3 CoreNet platform cache (CPC)
17 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
99 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
100 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
102 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
103 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
104 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
105 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
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| /openbmc/u-boot/board/freescale/t208xrdb/ |
| H A D | README | 12 - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
15 - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
80 - On-board 64MB SPI flash
89 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
90 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
92 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
93 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
94 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
95 0xF_F800_0000 0xF_F800_FFFF PCI Express 1 I/O Space 64KB
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| /openbmc/linux/arch/ia64/ |
| H A D | Kconfig | 72 The Itanium Processor Family is Intel's 64-bit successor to
73 the 32-bit X86 line. The IA-64 Linux project has a home
77 config 64BIT
129 Select your IA-64 processor type. The default is Itanium.
130 This choice is safe for all IA-64 systems, but may not perform
145 bool "4KB"
147 This lets you select the page size of the kernel. For best IA-64
148 performance, a page size of 8KB or 16KB is recommended. For best
149 IA-32 compatibility, a page size of 4KB should be selected (the vast
151 size). For Itanium 2 or newer systems, a page size of 64KB can also
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| /openbmc/linux/arch/x86/pci/ |
| H A D | ce4100.c | 45 #define KB (1024) macro
106 DEFINE_REG(2, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
107 DEFINE_REG(3, 0, 0x10, (64*KB), reg_init, reg_read, reg_write)
108 DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
109 DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
110 DEFINE_REG(6, 0, 0x10, (512*KB), reg_init, reg_read, reg_write)
111 DEFINE_REG(6, 1, 0x10, (512*KB), reg_init, reg_read, reg_write)
112 DEFINE_REG(6, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
114 DEFINE_REG(8, 1, 0x10, (64*KB), reg_init, reg_read, reg_write)
115 DEFINE_REG(8, 2, 0x10, (64*KB), reg_init, reg_read, reg_write)
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| /openbmc/linux/arch/parisc/ |
| H A D | Kconfig | 5 select ARCH_32BIT_OFF_T if !64BIT
17 select ARCH_SPLIT_ARG64 if !64BIT
37 select GENERIC_ATOMIC64 if !64BIT
86 select HAVE_FUNCTION_DESCRIPTORS if 64BIT
120 select GENERIC_BUG_RELATIVE_POINTERS if 64BIT
139 default 18 if 64BIT
146 default 18 if 64BIT
173 default 3 if 64BIT && PARISC_PAGE_SIZE_4KB
190 Specifying "PA8000" here will allow you to select a 64-bit kernel
197 712, 715/64, 715/80, 715/100, 715/100XC, 725/100, 743, 748,
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| /openbmc/u-boot/board/freescale/t104xrdb/ |
| H A D | README | 39 The QorIQ T1040/T1042 processor support four integrated 64-bit e5500 PA
45 - Four e5500 cores, each with a private 256 KB L2 cache
46 - 256 KB shared L3 CoreNet platform cache (CPC)
48 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
124 - On-board 64MB SPI flash
158 - On-board 64MB SPI flash
168 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
169 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
171 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
172 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
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| /openbmc/u-boot/board/freescale/t208xqds/ |
| H A D | README | 12 - Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
13 - 2MB L2 cache and 512KB CoreNet platform cache (CPC)
15 - One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
52 - T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
69 - Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
124 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - CPLD 4KB
125 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
127 0xF_F803_0000 0xF_F803_FFFF PCI Express 4 I/O Space 64KB
128 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
129 0xF_F801_0000 0xF_F801_FFFF PCI Express 2 I/O Space 64KB
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| /openbmc/linux/Documentation/admin-guide/cgroup-v1/ |
| H A D | hugetlb.rst | 34 For a system supporting three hugepage sizes (64k, 32M and 1G), the control
46 hugetlb.64KB.limit_in_bytes
47 hugetlb.64KB.max_usage_in_bytes
48 hugetlb.64KB.numa_stat
49 hugetlb.64KB.usage_in_bytes
50 hugetlb.64KB.failcnt
51 hugetlb.64KB.rsvd.limit_in_bytes
52 hugetlb.64KB.rsvd.max_usage_in_bytes
53 hugetlb.64KB.rsvd.usage_in_bytes
54 hugetlb.64KB.rsvd.failcnt
|
| /openbmc/u-boot/board/freescale/t102xqds/ |
| H A D | README | 4 combines two or one 64-bit Power Architecture e5500 core respectively with high
14 - two e5500 cores, each with a private 256 KB L2 cache
15 - Up to 1.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
19 - 256 KB shared L3 CoreNet platform cache (CPC)
24 - 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving support
71 DDR: 64-bit 32-bit
114 - Switch selectable to one of 16 common settings in the interval of 64 MHz-166 MHz.
155 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4KB
156 0xF_FF80_0000 0xF_FF80_FFFF IFC - NAND Flash 64KB
158 0xF_F802_0000 0xF_F802_FFFF PCI Express 3 I/O Space 64KB
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| /openbmc/u-boot/doc/ |
| H A D | README.N1213 | 11 - 32/64/128/256 BTB.
23 - 32/64/128-entry 4-way set-associati.ve main TLB.
27 - 4KB & 1MB.
28 - 8KB & 1MB.
33 - Cache size: 8KB/16KB/32KB/64KB.
38 - Size: 4KB to 1MB.
|
| H A D | README.b4860qds | 90 - 2 KB internal memory space including
173 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
175 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
179 0xF_F800_0000 0xF_F800_FFFF PCIe I/O Space 64 KB
182 0xF_F000_0000 0xF_F3FF_FFFF Free 64 MB
203 0xF_FFDF_0000 0xF_FFDF_0FFF IFC - FPGA 4 KB
205 0xF_FF80_0000 0xF_FF80_FFFF IFC NAND Flash 64 KB
209 0xF_F800_0000 0xF_F800_FFFF PCIe I/O Space 64 KB
212 0xF_F000_0000 0xF_F3FF_FFFF Free 64 MB
230 0xEFF40000 0xEFFFFFFF U-Boot (current bank) 768KB
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| /openbmc/linux/arch/sh/mm/ |
| H A D | Kconfig | 35 The page size is not necessarily 4KB. Keep this in mind when
155 bool "4kB"
160 bool "8kB"
163 This enables 8kB pages as supported by SH-X2 and later MMUs.
166 bool "16kB"
169 This enables 16kB pages on MMU-less SH systems.
172 bool "64kB"
175 This enables support for 64kB pages, possible on all SH-4
187 bool "64kB"
191 bool "256kB"
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| /openbmc/u-boot/board/freescale/ls1046ardb/ |
| H A D | README | 27 - 8GB 64bits DDR4 SDRAM. Support rates of up to 2133MT/s
34 - DSPI: 64 MB high-speed flash Memory for boot code and storage (up to 108MHz)
46 0x00_1000_0000 - 0x00_1000_FFFF OCRAM0 64KB
47 0x00_1001_0000 - 0x00_1001_FFFF OCRAM1 64KB
49 0x00_7E80_0000 - 0x00_7E80_FFFF IFC - NAND Flash 64KB
50 0x00_7FB0_0000 - 0x00_7FB0_0FFF IFC - CPLD 4KB
67 0x00_4090_0000 - 0x00_4093_FFFF FMan ucode 256KB
68 0x00_4094_0000 - 0x00_4097_FFFF QE/uQE firmware 256KB
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| /openbmc/linux/arch/loongarch/ |
| H A D | Kconfig | 181 config 64BIT
220 def_bool 64BIT
275 default 16KB_3LEVEL if 64BIT
282 bool "4KB with 3 levels"
286 This option selects 4KB page size with 3 level page tables, which
290 bool "4KB with 4 levels"
294 This option selects 4KB page size with 4 level page tables, which
298 bool "16KB with 2 levels"
302 This option selects 16KB page size with 2 level page tables, which
306 bool "16KB with 3 levels"
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| /openbmc/qemu/block/ |
| H A D | vhdx.h | 28 * each block is 64KB:
31 * | File Id. | Header 1 | Header 2 | Region Table | Reserved (768KB) |
34 * 0.........64KB...........128KB........192KB..........256KB................1MB
37 #define VHDX_HEADER_BLOCK_SIZE (64 * KiB)
88 the header is the first 4KB of the 64KB
91 /* The full header is 4KB, although the actual header data is much smaller.
92 * But for the checksum calculation, it is over the entire 4KB structure,
138 uint32_t checksum; /* CRC-32C hash of the 64KB table */
164 #define VHDX_LOG_HDR_SIZE 64
168 uint32_t checksum; /* CRC-32C hash of the 64KB table */
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| /openbmc/u-boot/board/qualcomm/dragonboard820c/ |
| H A D | readme.txt | 203 S - Flash Throughput, 94000 KB/s (2959024 Bytes, 31250 us)
337 [ 0.000000] software IO TLB [mem 0xd3fff000-0xd7fff000] (64MB) mapped at [ffff800053fff000-ffff8…
343 [ 0.000000] .text : 0xffff000008080000 - 0xffff000008b70000 ( 11200 KB)
344 [ 0.000000] .rodata : 0xffff000008b70000 - 0xffff000009080000 ( 5184 KB)
345 [ 0.000000] .init : 0xffff000009080000 - 0xffff000009190000 ( 1088 KB)
346 [ 0.000000] .data : 0xffff000009190000 - 0xffff0000092ffa00 ( 1471 KB)
347 [ 0.000000] .bss : 0xffff0000092ffa00 - 0xffff00000937014c ( 450 KB)
348 [ 0.000000] fixed : 0xffff7dfffe7fd000 - 0xffff7dfffec00000 ( 4108 KB)
355 [ 0.000000] Build-time adjustment of leaf fanout to 64.
356 [ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=4.
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| /openbmc/qemu/tests/qemu-iotests/ |
| H A D | 125 | 81 # Assuming there is no FS with a block size greater than 64k
100 # With a cluster size of 512 B, one L2 table covers 64 * 512 B = 32 kB.
101 # One cluster of the L1 table covers 64 * 32 kB = 2 MB.
106 # Therefore, we create an image that is 48 kB below 2 MB. Then:
107 # (1) We resize it to 2 MB - 32 kB. (+ 16 kB)
108 # (2) We resize it to 2 MB. (+ 48 kB)
109 # (3) We resize it to 2 MB + 32 kB. (+ 80 kB)
114 # 512 is the actual test -- but it's good to test 64k as well, just to be sure.
115 for cluster_size in 512 64k; do
116 # in kB
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| /openbmc/linux/drivers/w1/slaves/ |
| H A D | Kconfig | 15 tristate "Simple 64bit memory family implementation"
18 simple 64bit memory rom(ds2401/ds2411/ds1990*) to your wire.
74 organized as 7 pages of 16 bytes each with 64bit
86 tristate "1kb EEPROM family support (DS2431)"
89 1kb EEPROM family device (DS2431)
92 tristate "4kb EEPROM family support (DS2433)"
95 4kb EEPROM family device (DS2433).
113 tristate "512b/1kb/16kb EPROM family support"
117 512b/1kb/16kb EPROM family device (DS250x).
151 4kb EEPROM with PIO family device (DS28E04).
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| /openbmc/linux/arch/powerpc/include/asm/book3s/64/ |
| H A D | hash-4k.h | 5 #define H_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 4KB = 2MB
6 #define H_PMD_INDEX_SIZE 7 // size: 8B << 7 = 1KB, maps: 2^7 x 2MB = 256MB
7 #define H_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 256MB = 128GB
8 #define H_PGD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 128GB = 64TB
11 * Each context is 512TB. But on 4k we restrict our max TASK size to 64TB
12 * Hence also limit max EA bits to 64TB.
18 * Our page table limit us to 64TB. For 64TB physical memory, we only need 64GB
93 * 4K PTE format is different from 64K PTE format. Saving the hash_slot is just
94 * a matter of returning the PTE bits that need to be modified. On 64K PTE,
|
| /openbmc/u-boot/include/configs/ |
| H A D | xtfpga.h | 44 * LX60 0x04000000 64 MB
61 /* Lx60 can only map 128kb memory (instead of 256kb) when running under OCD */
63 # define CONFIG_SYS_MONITOR_LEN 0x00020000 /* 128KB */
65 # define CONFIG_SYS_MONITOR_LEN 0x00040000 /* 256KB */
68 #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* heap 256KB */
71 #define CONFIG_SYS_BOOTPARAMS_LEN (64 << 10)
156 * Bit 7 maps the first 128KB of ROM address space at CONFIG_SYS_ROM_BASE to
201 # define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* block size 64KB */
202 # define CONFIG_SYS_FLASH_PARMSECT_SZ 0x2000 /* param size 8KB */
207 # define CONFIG_SYS_FLASH_SECT_SZ 0x20000 /* block size 128KB */
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| /openbmc/u-boot/arch/x86/ |
| H A D | Kconfig | 8 prompt "Run U-Boot in 32/64-bit mode"
12 even on 64-bit machines. In this case SPL is not used, and U-Boot
15 Alternatively it can be run as a 64-bit binary, thus requiring a
16 64-bit machine. In this case SPL runs in 32-bit mode (via 16-bit
17 start-up) then jumps to U-Boot in 64-bit mode.
19 For now, 32-bit mode is recommended, as 64-bit is still
27 64-bit machines. When booting a 64-bit kernel, U-Boot will switch
28 to 64-bit just before starting the kernel. Only the bottom 4GB of
33 bool "64-bit"
39 Build U-Boot as a 64-bit binary with a 32-bit SPL. This is
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| /openbmc/linux/Documentation/translations/zh_CN/arch/arm64/ |
| H A D | memory.txt | 33 页大小为 4KB 的 4 级转换表和页大小为 64KB 的 3 级转换表。
35 AArch64 Linux 使用 3 级或 4 级转换表，其页大小配置为 4KB，对于用户和内核
37 对于页大小为 64KB的配置，仅使用 2 级转换表，有 42-bit (4TB) 的虚拟地址空间，但内存布局相同。
45 AArch64 Linux 在页大小为 4KB，并使用 3 级转换表时的内存布局：
53 AArch64 Linux 在页大小为 4KB，并使用 4 级转换表时的内存布局：
61 AArch64 Linux 在页大小为 64KB，并使用 2 级转换表时的内存布局：
69 AArch64 Linux 在页大小为 64KB，并使用 3 级转换表时的内存布局：
80 4KB 页大小的转换表查找：
95 64KB 页大小的转换表查找：
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| /openbmc/linux/Documentation/translations/zh_TW/arch/arm64/ |
| H A D | memory.txt | 37 頁大小爲 4KB 的 4 級轉換表和頁大小爲 64KB 的 3 級轉換表。
39 AArch64 Linux 使用 3 級或 4 級轉換表，其頁大小配置爲 4KB，對於用戶和內核
41 對於頁大小爲 64KB的配置，僅使用 2 級轉換表，有 42-bit (4TB) 的虛擬地址空間，但內存布局相同。
49 AArch64 Linux 在頁大小爲 4KB，並使用 3 級轉換表時的內存布局：
57 AArch64 Linux 在頁大小爲 4KB，並使用 4 級轉換表時的內存布局：
65 AArch64 Linux 在頁大小爲 64KB，並使用 2 級轉換表時的內存布局：
73 AArch64 Linux 在頁大小爲 64KB，並使用 3 級轉換表時的內存布局：
84 4KB 頁大小的轉換表查找：
99 64KB 頁大小的轉換表查找：
|