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/openbmc/u-boot/include/bedbug/
H A Dtables.h25 { O_d, "O_d", 15, 0, OH_OFFSET }, /* 16-31 */
31 { O_LK, "O_LK", 1, 0, OH_SILENT }, /* 31 */
38 { O_Rc, "O_Rc", 1, 0, OH_SILENT }, /* 31 */
42 { O_SIMM, "O_SIMM", 16, 0, 0 }, /* 16-31 */
45 { O_UIMM, "O_UIMM", 16, 0, 0 }, /* 16-31 */
157 { X_OPCODE(31,0,0), X_MASK, {O_crfD, O_L, O_rA, O_rB, 0},
159 { X_OPCODE(31,4,0), X_MASK, {O_TO, O_rA, O_rB, 0},
161 { XO_OPCODE(31,8,0,0), XO_MASK, {O_rD, O_rA, O_rB, O_OE, O_Rc, 0},
163 { XO_OPCODE(31,8,0,1), XO_MASK, {O_rD, O_rA, O_rB, O_OE, O_Rc, 0},
165 { XO_OPCODE(31,10,0,0), XO_MASK, {O_rD, O_rA, O_rB, O_OE, O_Rc, 0},
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-clk-ccf.dtsi108 clocks = <&clkc 63>, <&clkc 31>;
112 clocks = <&clkc 64>, <&clkc 31>;
120 clocks = <&clkc 19>, <&clkc 31>;
124 clocks = <&clkc 19>, <&clkc 31>;
128 clocks = <&clkc 19>, <&clkc 31>;
132 clocks = <&clkc 19>, <&clkc 31>;
136 clocks = <&clkc 19>, <&clkc 31>;
140 clocks = <&clkc 19>, <&clkc 31>;
144 clocks = <&clkc 19>, <&clkc 31>;
148 clocks = <&clkc 19>, <&clkc 31>;
[all …]
/openbmc/openbmc/poky/bitbake/lib/bb/tests/fetch-testdata/pub/linux/utils/util-linux/v2.31/
H A Dindex.html2 <head><title>Index of /pub/linux/utils/util-linux/v2.31/</title></head>
4 <h1>Index of /pub/linux/utils/util-linux/v2.31/</h1><hr><pre><a href="../">../</a>
22 <a href="v2.31-ChangeLog">v2.31-ChangeLog</a> 19-Oct-2017 11:27 …
23 <a href="v2.31-ChangeLog.sign">v2.31-ChangeLog.sign</a> 19-Oct-2017 1…
24 <a href="v2.31-ReleaseNotes">v2.31-ReleaseNotes</a> 19-Oct-2017 11:…
25 <a href="v2.31-ReleaseNotes.sign">v2.31-ReleaseNotes.sign</a> 19-Oct-201…
26 <a href="v2.31-rc1-ChangeLog">v2.31-rc1-ChangeLog</a> 22-Sep-2017 10…
27 <a href="v2.31-rc1-ChangeLog.sign">v2.31-rc1-ChangeLog.sign</a> 22-Sep-20…
28 <a href="v2.31-rc2-ChangeLog">v2.31-rc2-ChangeLog</a> 03-Oct-2017 16…
29 <a href="v2.31-rc2-ChangeLog.sign">v2.31-rc2-ChangeLog.sign</a> 03-Oct-20…
/openbmc/openbmc/poky/meta/recipes-devtools/binutils/binutils/
H A D0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch21 {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
22 {"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, EXT, {0}},
23 {"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, EXT, {0}},
24 -{"wait", X(31,30), XWCPL_MASK, POWER10, 0, {WC, PL}},
25 -{"wait", X(31,30), XWC_MASK, POWER9, POWER10, {WC}},
27 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
31 {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
32 {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
33 -{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}},
34 +{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9|POWER10, 0, {WC}},
[all …]
/openbmc/u-boot/include/linux/
H A Dtime.h32 int tm_mday; /* Day. [1-31] */
75 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31},
76 {31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31}
/openbmc/qemu/include/hw/ppc/
H A Dxive2_regs.h24 #define TM2_QW0W2_LOGIC_SERV PPC_BITMASK32(4, 31)
27 #define TM2_QW1W2_OS_CAM PPC_BITMASK32(4, 31)
30 #define TM2_QW2W2_POOL_CAM PPC_BITMASK32(4, 31)
46 #define EAS2_END_INDEX PPC_BITMASK(8, 31) /* Destination EQ index */
77 #define END2_W0_EQ_VG_PREDICT PPC_BITMASK32(24, 31) /* Owned by HW */
87 #define END2_W1_PAGE_OFF PPC_BITMASK32(10, 31)
90 #define END2_W2_EQ_ADDR_HI PPC_BITMASK32(8, 31)
94 #define END2_W3_QSIZE PPC_BITMASK32(28, 31)
97 #define END2_W4_ESC_END_INDEX PPC_BITMASK32(8, 31)
99 #define END2_W4_ESC_ESB_INDEX PPC_BITMASK32(4, 31)
[all …]
/openbmc/u-boot/post/drivers/
H A Drtc.c75 { 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; in rtc_post_test()
77 { 31, 29, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 }; in rtc_post_test()
/openbmc/u-boot/drivers/ram/
H A Dmpc83xx_sdram.c30 static const uint TIMING_CFG3_EXT_REFREC_SHIFT = (31 - 15);
33 static const uint TIMING_CFG0_RWT_SHIFT = (31 - 1);
34 static const uint TIMING_CFG0_WRT_SHIFT = (31 - 3);
35 static const uint TIMING_CFG0_RRT_SHIFT = (31 - 5);
36 static const uint TIMING_CFG0_WWT_SHIFT = (31 - 7);
37 static const uint TIMING_CFG0_ACT_PD_EXIT_SHIFT = (31 - 11);
38 static const uint TIMING_CFG0_PRE_PD_EXIT_SHIFT = (31 - 15);
39 static const uint TIMING_CFG0_ODT_PD_EXIT_SHIFT = (31 - 23);
40 static const uint TIMING_CFG0_MRS_CYC_SHIFT = (31 - 31);
43 static const uint TIMING_CFG1_PRETOACT_SHIFT = (31 - 3);
[all …]
/openbmc/qemu/hw/nvram/
H A Dxlnx-zynqmp-efuse.c74 FIELD(EFUSE_ISR, APB_SLVERR, 31, 1)
81 FIELD(EFUSE_IMR, APB_SLVERR, 31, 1)
88 FIELD(EFUSE_IER, APB_SLVERR, 31, 1)
95 FIELD(EFUSE_IDR, APB_SLVERR, 31, 1)
144 FIELD(PUF_MISC, REGISTER_DIS, 31, 1)
223 #define EFUSE_PPK1_INVLD_1 BIT_POS(22, 31)
229 #define EFUSE_DNA_END BIT_POS(5, 31)
231 #define EFUSE_AES_END BIT_POS(31, 31)
233 #define EFUSE_ROM_END BIT_POS(17, 31)
235 #define EFUSE_IPDIS_END BIT_POS(6, 31)
[all …]
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage_256M8_1.cfg27 # bit 31-28: 0, MPPSel7 GPO[7]
37 # bit 31-28: 0, MPPSel15 GPIO[16] BOOT_FL_SEL (SPI-MUX Signal)
47 # bit 31-28: 0, MPPSel23 GPIO[23]
60 # bit 31-16 0x1B1B, Reserved
77 # bit 31-30: 1, Data RAM WTC RAM4
83 # bit 31-20: ?,Reserved
100 # bit 31-30: 1, reserved
116 # bit 31: 0, no additional STARTBURST delay
127 # bit 31-28: 0x2, TRTP = 7,5ns -> 3 clk cycles
134 # bit 31-13: 0, reserved
[all …]
H A Dkwbimage_128M16_1.cfg27 # bit 31-28: 0, MPPSel7 GPO[7]
37 # bit 31-28: 0, MPPSel15 GPIO[15]
47 # bit 31-28: 0, MPPSel23 GPIO[23]
60 # bit 31-16 0x1B1B, Reserved
77 # bit 31-30: 1, Data RAM WTC RAM4
83 # bit 31-20: ???,Reserve
100 # bit 31-30: 1, reserved
116 # bit 31: 0,no additional STARTBURST delay
127 # bit 31-28: 0x2, TRTP, 3 clk (7.5 ns)
134 # bit 31-13: 0, reserved
[all …]
/openbmc/u-boot/arch/arm/mach-rmobile/
H A Dpfc-r8a7790.h17 PORT_1(fn, pfx##31, sfx)
27 /* GP_0_0_DATA -> GP_5_31_DATA (except for GP1[30],GP1[31],GP2[30],GP2[31]) */
45 * (except for GP1[26],GP1[27],GP1[28],GP1[29]),GP1[30]),GP1[31]
46 * GP7[26],GP7[27],GP7[28],GP7[29]),GP7[30]),GP7[31])
61 * (except for GP0[29..31],GP1[23..31],GP3[28..31],GP4[17..31],GP5[17..31]
62 * GP6[17..31],GP7[17..31],GP8[17..31],GP9[17..31],GP11[30..31])
128 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
/openbmc/qemu/tests/tcg/alpha/system/
H A Dboot.S93 stb $31, com1Dlm($1) /* outb(0, com1Dlm); */
232 mov $31, quotient
258 ret $31, ($23), 1
288 ret $31, ($23), 1
311 subq $31, $24, $28
313 subq $31, $25, $28
322 subq $31, $27, $23
328 ret $31, ($23), 1
351 subq $31, $24, $28
353 subq $31, $25, $28
[all …]
/openbmc/u-boot/drivers/rtc/
H A Drtc-lib.c18 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
H A Dmcfrtc.c57 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31 in rtc_set()
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_lbc.h288 #define LBCR_LDIS_SHIFT 31
303 #define LCRR_DBYP_SHIFT 31
427 #define LSDMR_RFEN (1 << (31 - 1))
428 #define LSDMR_BSMA1516 (3 << (31 - 10))
429 #define LSDMR_BSMA1617 (4 << (31 - 10))
430 #define LSDMR_RFCR5 (3 << (31 - 16))
431 #define LSDMR_RFCR16 (7 << (31 - 16))
432 #define LSDMR_PRETOACT3 (3 << (31 - 19))
433 #define LSDMR_PRETOACT7 (7 << (31 - 19))
434 #define LSDMR_ACTTORW3 (3 << (31 - 22))
[all …]
/openbmc/u-boot/arch/arm/include/asm/arch-mxs/
H A Dregs-clkctrl-mx23.h67 #define CLKCTRL_PLL0CTRL1_LOCK (1 << 31)
104 #define CLKCTRL_XBUS_BUSY (1 << 31)
109 #define CLKCTRL_XTAL_UART_CLK_GATE (1 << 31)
118 #define CLKCTRL_PIX_CLKGATE (1 << 31)
124 #define CLKCTRL_SSP_CLKGATE (1 << 31)
130 #define CLKCTRL_GPMI_CLKGATE (1 << 31)
136 #define CLKCTRL_SPDIF_CLKGATE (1 << 31)
138 #define CLKCTRL_EMI_CLKGATE (1 << 31)
151 #define CLKCTRL_IR_CLKGATE (1 << 31)
160 #define CLKCTRL_SAIF0_CLKGATE (1 << 31)
[all …]
H A Dregs-clkctrl-mx28.h77 #define CLKCTRL_PLL0CTRL1_LOCK (1 << 31)
82 #define CLKCTRL_PLL1CTRL0_CLKGATEEMI (1 << 31)
104 #define CLKCTRL_PLL1CTRL1_LOCK (1 << 31)
109 #define CLKCTRL_PLL2CTRL0_CLKGATE (1 << 31)
127 #define CLKCTRL_HBUS_ASM_BUSY (1 << 31)
151 #define CLKCTRL_XBUS_BUSY (1 << 31)
157 #define CLKCTRL_XTAL_UART_CLK_GATE (1 << 31)
163 #define CLKCTRL_SSP_CLKGATE (1 << 31)
169 #define CLKCTRL_GPMI_CLKGATE (1 << 31)
175 #define CLKCTRL_SPDIF_CLKGATE (1 << 31)
[all …]
/openbmc/u-boot/drivers/gpio/
H A Dkw_gpio.c30 u |= 1 << (pin & 31); in __set_direction()
32 u &= ~(1 << (pin & 31)); in __set_direction()
44 u |= 1 << (pin & 31); in __set_level()
46 u &= ~(1 << (pin & 31)); in __set_level()
56 u |= 1 << (pin & 31); in __set_blinking()
58 u &= ~(1 << (pin & 31)); in __set_blinking()
128 if (readl(GPIO_IO_CONF(pin)) & (1 << (pin & 31))) in kw_gpio_get_value()
133 return (val >> (pin & 31)) & 1; in kw_gpio_get_value()
/openbmc/qemu/hw/intc/
H A Dpnv_xive_regs.h46 #define CQ_TAR_TSEL_INDEX PPC_BITMASK(26, 31)
50 #define CQ_TDR_VDT_INDEX PPC_BITMASK(28, 31)
56 #define CQ_TDR_EDT_INDEX PPC_BITMASK(26, 31)
78 #define PC_TCTXT_INIT_AGE PPC_BITMASK(30, 31)
101 #define PC_AT_KILL_BLOCK_ID PPC_BITMASK(27, 31)
107 #define PC_VPC_CACHE_EN_MASK PPC_BITMASK(0, 31)
113 #define PC_SCRUB_BLOCK_ID PPC_BITMASK(27, 31)
118 #define PC_VPC_CWATCH_BLOCKID PPC_BITMASK(27, 31)
155 #define VC_KILL_BLOCK_ID PPC_BITMASK(27, 31)
177 #define VC_EQC_CWATCH_BLOCKID PPC_BITMASK(28, 31)
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D271183 ### Write subcluster #31-#33 (cluster overlap) ###
184 alloc="$(seq 0 9) 16 31"; zero=""
185 _run_test sc=31 off=1 len=4k
190 alloc="0 $(seq 2 9) 16 31"; zero="1"
194 alloc=""; zero="$(seq 0 31)"
198 alloc="$(seq 0 31)"; zero=""
202 alloc="$(seq 16 31)"; zero="$(seq 0 15)"
206 alloc=""; zero="$(seq 0 31)"
210 alloc="1"; zero="0 $(seq 2 31)"
214 alloc="$(seq 0 31)"; zero=""
[all …]
H A D031.out29 length 31
57 length 31
90 length 31
125 length 31
158 length 31
196 length 31
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/pv/pv/
H A Dpv-test-system-version.patch7 diff -Naur pv-1.9.31.orig/tests/test-env.sh pv-1.9.31/tests/test-env.sh
8 --- pv-1.9.31.orig/tests/test-env.sh 2024-12-07 08:59:43.000000000 -0500
9 +++ pv-1.9.31/tests/test-env.sh 2025-03-26 14:11:30.987123378 -0400
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-connectivity/paho-mqtt-c/paho-mqtt-c/
H A D0001-Fix-build-error-due-to-bool-keyword-with-gcc-15.patch8 TOPDIR/tmp/work/core2-64-oe-linux/paho-mqtt-c/1.3.14/git/src/MQTTPacket.h:31:22: error: 'bool' cann…
9 31 | typedef unsigned int bool;
11 TOPDIR/tmp/work/core2-64-oe-linux/paho-mqtt-c/1.3.14/git/src/MQTTPacket.h:31:22: note: 'bool' is a …
12 TOPDIR/tmp/work/core2-64-oe-linux/paho-mqtt-c/1.3.14/git/src/MQTTPacket.h:31:1: warning: useless ty…
13 31 | typedef unsigned int bool;
/openbmc/qemu/target/tricore/
H A Dop_helper.c150 env->PSW_USB_V = (1 << 31); in ssov32()
151 env->PSW_USB_SV = (1 << 31); in ssov32()
155 env->PSW_USB_V = (1 << 31); in ssov32()
156 env->PSW_USB_SV = (1 << 31); in ssov32()
173 env->PSW_USB_V = (1 << 31); in suov32_pos()
174 env->PSW_USB_SV = (1 << 31); in suov32_pos()
190 env->PSW_USB_V = (1 << 31); in suov32_neg()
191 env->PSW_USB_SV = (1 << 31); in suov32_neg()
211 env->PSW_USB_V = (1 << 31); in ssov16()
214 env->PSW_USB_V = (1 << 31); in ssov16()
[all …]

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