Lines Matching full:31
77 #define CLKCTRL_PLL0CTRL1_LOCK (1 << 31)
82 #define CLKCTRL_PLL1CTRL0_CLKGATEEMI (1 << 31)
104 #define CLKCTRL_PLL1CTRL1_LOCK (1 << 31)
109 #define CLKCTRL_PLL2CTRL0_CLKGATE (1 << 31)
127 #define CLKCTRL_HBUS_ASM_BUSY (1 << 31)
151 #define CLKCTRL_XBUS_BUSY (1 << 31)
157 #define CLKCTRL_XTAL_UART_CLK_GATE (1 << 31)
163 #define CLKCTRL_SSP_CLKGATE (1 << 31)
169 #define CLKCTRL_GPMI_CLKGATE (1 << 31)
175 #define CLKCTRL_SPDIF_CLKGATE (1 << 31)
177 #define CLKCTRL_EMI_CLKGATE (1 << 31)
190 #define CLKCTRL_SAIF0_CLKGATE (1 << 31)
196 #define CLKCTRL_SAIF1_CLKGATE (1 << 31)
202 #define CLKCTRL_DIS_LCDIF_CLKGATE (1 << 31)
208 #define CLKCTRL_ETM_CLKGATE (1 << 31)
214 #define CLKCTRL_ENET_SLEEP (1 << 31)