Lines Matching full:31

30 static const uint TIMING_CFG3_EXT_REFREC_SHIFT = (31 - 15);
33 static const uint TIMING_CFG0_RWT_SHIFT = (31 - 1);
34 static const uint TIMING_CFG0_WRT_SHIFT = (31 - 3);
35 static const uint TIMING_CFG0_RRT_SHIFT = (31 - 5);
36 static const uint TIMING_CFG0_WWT_SHIFT = (31 - 7);
37 static const uint TIMING_CFG0_ACT_PD_EXIT_SHIFT = (31 - 11);
38 static const uint TIMING_CFG0_PRE_PD_EXIT_SHIFT = (31 - 15);
39 static const uint TIMING_CFG0_ODT_PD_EXIT_SHIFT = (31 - 23);
40 static const uint TIMING_CFG0_MRS_CYC_SHIFT = (31 - 31);
43 static const uint TIMING_CFG1_PRETOACT_SHIFT = (31 - 3);
44 static const uint TIMING_CFG1_ACTTOPRE_SHIFT = (31 - 7);
45 static const uint TIMING_CFG1_ACTTORW_SHIFT = (31 - 11);
46 static const uint TIMING_CFG1_CASLAT_SHIFT = (31 - 15);
47 static const uint TIMING_CFG1_REFREC_SHIFT = (31 - 19);
48 static const uint TIMING_CFG1_WRREC_SHIFT = (31 - 23);
49 static const uint TIMING_CFG1_ACTTOACT_SHIFT = (31 - 27);
50 static const uint TIMING_CFG1_WRTORD_SHIFT = (31 - 31);
53 static const uint TIMING_CFG2_CPO_SHIFT = (31 - 8);
54 static const uint TIMING_CFG2_WR_DATA_DELAY_SHIFT = (31 - 21);
55 static const uint TIMING_CFG2_ADD_LAT_SHIFT = (31 - 3);
56 static const uint TIMING_CFG2_WR_LAT_DELAY_SHIFT = (31 - 12);
57 static const uint TIMING_CFG2_RD_TO_PRE_SHIFT = (31 - 18);
58 static const uint TIMING_CFG2_CKE_PLS_SHIFT = (31 - 25);
62 static const uint SDRAM_CFG_SREN_SHIFT = (31 - 1);
63 static const uint SDRAM_CFG_ECC_EN_SHIFT = (31 - 2);
64 static const uint SDRAM_CFG_RD_EN_SHIFT = (31 - 3);
65 static const uint SDRAM_CFG_SDRAM_TYPE_SHIFT = (31 - 7);
66 static const uint SDRAM_CFG_DYN_PWR_SHIFT = (31 - 10);
67 static const uint SDRAM_CFG_DBW_SHIFT = (31 - 12);
68 static const uint SDRAM_CFG_NCAP_SHIFT = (31 - 14);
69 static const uint SDRAM_CFG_2T_EN_SHIFT = (31 - 16);
70 static const uint SDRAM_CFG_BA_INTLV_CTL_SHIFT = (31 - 23);
71 static const uint SDRAM_CFG_PCHB8_SHIFT = (31 - 27);
72 static const uint SDRAM_CFG_HSE_SHIFT = (31 - 28);
73 static const uint SDRAM_CFG_BI_SHIFT = (31 - 31);
76 static const uint SDRAM_CFG2_FRC_SR_SHIFT = (31 - 0);
77 static const uint SDRAM_CFG2_DLL_RST_DIS = (31 - 2);
78 static const uint SDRAM_CFG2_DQS_CFG = (31 - 5);
79 static const uint SDRAM_CFG2_ODT_CFG = (31 - 10);
80 static const uint SDRAM_CFG2_NUM_PR = (31 - 19);
83 static const uint SDRAM_MODE_ESD_SHIFT = (31 - 15);
84 static const uint SDRAM_MODE_SD_SHIFT = (31 - 31);
87 static const uint SDRAM_MODE2_ESD2_SHIFT = (31 - 15);
88 static const uint SDRAM_MODE2_ESD3_SHIFT = (31 - 31);
91 static const uint SDRAM_INTERVAL_REFINT_SHIFT = (31 - 15);
92 static const uint SDRAM_INTERVAL_BSTOPRE_SHIFT = (31 - 31);
430 ddrcdr = dso << (31 - 1) | in mpc83xx_sdram_probe()
431 pz_override << (31 - 5) | in mpc83xx_sdram_probe()
432 nz_override << (31 - 9) | in mpc83xx_sdram_probe()
433 odt_term << (31 - 12) | in mpc83xx_sdram_probe()
434 ddr_type << (31 - 13) | in mpc83xx_sdram_probe()
435 mvref_sel << (31 - 29) | in mpc83xx_sdram_probe()
436 m_odr << (31 - 30) | 1; in mpc83xx_sdram_probe()