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/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_clock_utils.c116 * "The PCU TSC counts 10ns increments; this timestamp in gen6_read_clock_frequency()
117 * reflects bits 38:3 of the TSC (i.e. 80ns granularity, in gen6_read_clock_frequency()
126 * 63:32 increments every 1000 ns in gen5_read_clock_frequency()
135 * 63:20 increments every 1/4 ns in g4x_read_clock_frequency()
138 * -> 63:32 increments every 1024 ns in g4x_read_clock_frequency()
219 u64 intel_gt_ns_to_clock_interval(const struct intel_gt *gt, u64 ns) in intel_gt_ns_to_clock_interval() argument
221 return div_u64_roundup(gt->clock_frequency * ns, NSEC_PER_SEC); in intel_gt_ns_to_clock_interval()
224 u64 intel_gt_ns_to_pm_interval(const struct intel_gt *gt, u64 ns) in intel_gt_ns_to_pm_interval() argument
229 * Make these a multiple of magic 25 to avoid SNB (eg. Dell XPS in intel_gt_ns_to_pm_interval()
235 val = div_u64_roundup(intel_gt_ns_to_clock_interval(gt, ns), 16); in intel_gt_ns_to_pm_interval()
[all …]
H A Dintel_rc6.c73 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen11_rc6_enable()
74 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen11_rc6_enable()
88 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we in gen11_rc6_enable()
166 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen9_rc6_enable()
167 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen9_rc6_enable()
178 * Bspec's guidance is to use 25us (really 25 * 1280ns) here. What we in gen9_rc6_enable()
224 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in gen8_rc6_enable()
225 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */ in gen8_rc6_enable()
251 intel_uncore_write_fw(uncore, GEN6_RC_IDLE_HYSTERSIS, 25); in gen6_rc6_enable()
375 intel_uncore_write_fw(uncore, GEN6_RC_EVALUATION_INTERVAL, 125000); /* 12500 * 1280ns */ in chv_rc6_enable()
[all …]
/openbmc/linux/tools/testing/selftests/net/forwarding/
H A Dfib_offload_lib.sh7 local ns=$1; shift
13 ip -n $ns -j -p -$family route show $route \
29 local ns=$1; shift
34 busywait 5000 __fib_trap_check $ns $family "$route" $should_fail
39 local ns=$1; shift
43 fib_trap_check $ns 4 "$route" $should_fail
48 local ns=$1; shift
52 fib_trap_check $ns 6 "$route" $should_fail
57 local ns=$1; shift
63 ip -n $ns link add name dummy$i type dummy
[all …]
/openbmc/u-boot/board/armadeus/apf27/
H A Dapf27.h77 #define ACFG_SDRAM_EXIT_PWD 25 /* ns exit power
83 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
90 #define ACFG_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
91 #define ACFG_SDRAM_RRD_DELAY 12 /* ns ACTIVE-to-ACTIVE delay */
92 #define ACFG_SDRAM_RCD_DELAY 18 /* ns Row to Column delay */
93 #define ACFG_SDRAM_RC_DELAY 70 /* ns Row cycle delay (tRFC
96 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1 0 /* ns clock cycle time
123 #define ACFG_SDRAM_EXIT_PWD 25 /* ns exit power
129 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY 18 /* ns */
136 #define ACFG_SDRAM_RAS_DELAY 42 /* ns ACTIVE-to-PRECHARGE delay */
[all …]
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-cm-t3x.dtsi229 interrupts = <25 0>; /* gpio_57 */
230 pendown-gpio = <&gpio2 25 GPIO_ACTIVE_LOW>;
279 gpmc,cs-on-ns = <0>;
280 gpmc,cs-rd-off-ns = <120>;
281 gpmc,cs-wr-off-ns = <120>;
283 gpmc,adv-on-ns = <0>;
284 gpmc,adv-rd-off-ns = <120>;
285 gpmc,adv-wr-off-ns = <120>;
287 gpmc,we-on-ns = <6>;
288 gpmc,we-off-ns = <90>;
[all …]
H A Dlogicpd-som-lv.dtsi59 gpmc,cs-on-ns = <0>;
60 gpmc,cs-rd-off-ns = <44>;
61 gpmc,cs-wr-off-ns = <44>;
62 gpmc,adv-on-ns = <6>;
63 gpmc,adv-rd-off-ns = <34>;
64 gpmc,adv-wr-off-ns = <44>;
65 gpmc,we-off-ns = <40>;
66 gpmc,oe-off-ns = <54>;
67 gpmc,access-ns = <64>;
68 gpmc,rd-cycle-ns = <82>;
[all …]
H A Domap4-duovero-parlor.dts35 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; /* gpio_121 */
146 gpmc,cs-on-ns = <10>;
147 gpmc,cs-rd-off-ns = <50>;
148 gpmc,cs-wr-off-ns = <50>;
149 gpmc,adv-on-ns = <0>;
150 gpmc,adv-rd-off-ns = <10>;
151 gpmc,adv-wr-off-ns = <10>;
152 gpmc,oe-on-ns = <15>;
153 gpmc,oe-off-ns = <50>;
154 gpmc,we-on-ns = <15>;
[all …]
H A Dlogicpd-torpedo-baseboard.dtsi123 gpmc,cs-on-ns = <0>;
124 gpmc,cs-rd-off-ns = <45>;
125 gpmc,cs-wr-off-ns = <45>;
126 gpmc,adv-on-ns = <0>;
127 gpmc,adv-rd-off-ns = <0>;
128 gpmc,adv-wr-off-ns = <0>;
129 gpmc,oe-on-ns = <0>;
130 gpmc,oe-off-ns = <45>;
131 gpmc,we-on-ns = <0>;
132 gpmc,we-off-ns = <25>;
[all …]
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3xcm.dtsi65 atmel,smc-ncs-rd-setup-ns = <0>;
66 atmel,smc-ncs-wr-setup-ns = <0>;
67 atmel,smc-nwe-setup-ns = <8>;
68 atmel,smc-nrd-setup-ns = <16>;
69 atmel,smc-ncs-rd-pulse-ns = <84>;
70 atmel,smc-ncs-wr-pulse-ns = <84>;
71 atmel,smc-nrd-pulse-ns = <76>;
72 atmel,smc-nwe-pulse-ns = <76>;
73 atmel,smc-nrd-cycle-ns = <107>;
74 atmel,smc-nwe-cycle-ns = <84>;
[all …]
/openbmc/u-boot/drivers/ddr/fsl/
H A Dddr1_dimm_params.c50 * This implements the tables for bytes 9, 23 and 25 for both
53 * (That is, cycle times of .25, .33, .66 and .75 ns are
123 * Bits 7:2 == whole ns
124 * Bits 1:0 == quarter ns
125 * 00 == 0.00 ns
126 * 01 == 0.25 ns
127 * 10 == 0.50 ns
128 * 11 == 0.75 ns
148 3900000, /* 1 Reduced .25x */ in determine_refresh_rate_ps()
/openbmc/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_cyclone5_socrates.dts69 gpios = <&portb 25 1>;
88 cdns,tshsl-ns = <50>;
89 cdns,tsd2d-ns = <50>;
90 cdns,tchsh-ns = <4>;
91 cdns,tslch-ns = <4>;
/openbmc/u-boot/arch/arm/include/asm/arch-s32v234/
H A Dlpddr2.h39 …CFG0_VALUE 0x464F61A5 /* tRFCab=70 (=130ns),tXSR=80 (=tRFCab+10ns),tXP=4 (=7.5ns),tXPDLL=n/a,tF…
40 …G1_VALUE 0x00180E63 /* tRCD=n/a,tRPpb=n/a,tRC=n/a ,tRAS=25 (=47ns),tRPA=n/a,tWR=8 (=15.0ns),tMR…
41 #define MMDC_MDCFG2_VALUE 0x000000DD /* tDLLK=n/a,tRTP=4 (=7.5ns),tWTR=4 (=7.5ns),tRRD=6 (=10ns)…
42 …LUE 0x001F099B /* RC_LP=tRAS+tRPab=32 (>60ns), tRCD_LP=10 (18ns) , tRPpb_LP=10 (18ns), tRPab_LP…
48 …C_MPZQLP2CTL_VALUE 0x1B5F0109 /* ZQ_LP2_HW_ZQCS=0x1B (90ns spec), ZQ_LP2_HW_ZQCL=0x5F (160ns spe…
/openbmc/u-boot/arch/arm/dts/
H A Dlogicpd-som-lv.dtsi61 gpmc,cs-on-ns = <0>;
62 gpmc,cs-rd-off-ns = <44>;
63 gpmc,cs-wr-off-ns = <44>;
64 gpmc,adv-on-ns = <6>;
65 gpmc,adv-rd-off-ns = <34>;
66 gpmc,adv-wr-off-ns = <44>;
67 gpmc,we-off-ns = <40>;
68 gpmc,oe-off-ns = <54>;
69 gpmc,access-ns = <64>;
70 gpmc,rd-cycle-ns = <82>;
[all …]
H A Dsocfpga_cyclone5_socrates.dts69 gpios = <&portb 25 1>;
89 cdns,tshsl-ns = <50>;
90 cdns,tsd2d-ns = <50>;
91 cdns,tchsh-ns = <4>;
92 cdns,tslch-ns = <4>;
H A Dam335x-pxm2.dtsi31 brightness-levels = <0 2 5 7 10 12 15 17 20 22 25 28 30 33 35
164 gpmc,cs-on-ns = <0>;
165 gpmc,cs-rd-off-ns = <44>;
166 gpmc,cs-wr-off-ns = <44>;
167 gpmc,adv-on-ns = <6>;
168 gpmc,adv-rd-off-ns = <34>;
169 gpmc,adv-wr-off-ns = <44>;
170 gpmc,we-on-ns = <0>;
171 gpmc,we-off-ns = <40>;
172 gpmc,oe-on-ns = <0>;
[all …]
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage_256M8_1.cfg14 # MT47H256M8EB-25EIT:C
74 # bit 25-24: 2, Data RAM RTC RAM2
98 # bit 25: 1, required
119 # bit 3-0: 0xe, TRAS = 45ns -> 15 clk cycles
120 # bit 7-4: 0x4, TRCD = 15ns -> 5 clk cycles
121 # bit 11-8: 0x4, TRP = 15ns -> 5 clk cycles
122 # bit 15-12: 0x4, TWR = 15ns -> 5 clk cycles
123 # bit 19-16: 0x2, TWTR = 7,5ns -> 3 clk cycles
126 # bit 27-24: 0x2, TRRD = 7,5ns -> 3 clk cycles
127 # bit 31-28: 0x2, TRTP = 7,5ns -> 3 clk cycles
[all …]
/openbmc/linux/arch/alpha/include/asm/
H A Djensen.h48 * EISA "Host Address Extension" address (bits 25-31 of the EISA address)
94 /* hae on the Jensen is bits 31:25 shifted right */ in jensen_set_hae()
95 addr >>= 25; in jensen_set_hae()
321 #define IOPORT(OS, NS) \ argument
322 __EXTERN_INLINE u##NS jensen_ioread##NS(const void __iomem *xaddr) \
329 __EXTERN_INLINE void jensen_iowrite##NS(u##NS b, void __iomem *xaddr) \
/openbmc/u-boot/board/xes/xpedite537x/
H A Dddr.c46 * Minimum chip delay (Ch 0): 1.372ns
47 * Maximum chip delay (Ch 0): 2.914ns
48 * Minimum chip delay (Ch 1): 1.220ns
49 * Maximum chip delay (Ch 1): 2.595ns
51 * CLK adjust = 5 (from simulations) = 5/8* 3.33ns = 2080ps
57 * = 3.808ns
63 * = 6.240ns
69 * = 3.288ns
75 * = 5.536ns
77 * Ch.0: 3.808ns to 6.240ns additional delay needed (pick 5ns as target)
[all …]
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa25x.dtsi40 interrupts = <25>;
100 clock-latency-ns = <20>;
105 clock-latency-ns = <20>;
110 clock-latency-ns = <20>;
115 clock-latency-ns = <20>;
H A Dpxa27x.dtsi14 interrupts = <25>;
155 clock-latency-ns = <20>;
160 clock-latency-ns = <20>;
165 clock-latency-ns = <20>;
170 clock-latency-ns = <20>;
175 clock-latency-ns = <20>;
180 clock-latency-ns = <20>;
185 clock-latency-ns = <20>;
/openbmc/linux/net/x25/
H A Dx25_in.c3 * X.25 Packet Layer release 002
12 * X.25 001 Jonathan Naylor Started coding.
13 * X.25 002 Jonathan Naylor Centralised disconnection code.
208 static int x25_state3_machine(struct sock *sk, struct sk_buff *skb, int frametype, int ns, int nr, … in x25_state3_machine() argument
261 if ((ns != x25->vr) || !x25_validate_nr(sk, nr)) { in x25_state3_machine()
274 if (ns == x25->vr) { in x25_state3_machine()
418 int queued = 0, frametype, ns, nr, q, d, m; in x25_process_rx_frame() local
423 frametype = x25_decode(sk, skb, &ns, &nr, &q, &d, &m); in x25_process_rx_frame()
433 queued = x25_state3_machine(sk, skb, frametype, ns, nr, q, d, m); in x25_process_rx_frame()
H A Dx25_subr.c3 * X.25 Packet Layer release 002
12 * X.25 001 Jonathan Naylor Started coding.
13 * X.25 002 Jonathan Naylor Centralised disconnection processing.
258 * Unpick the contents of the passed X.25 Packet Layer frame.
260 int x25_decode(struct sock *sk, struct sk_buff *skb, int *ns, int *nr, int *q, in x25_decode() argument
270 *ns = *nr = *q = *d = *m = 0; in x25_decode()
319 *ns = (frame[2] >> 1) & 0x7F; in x25_decode()
328 *ns = (frame[2] >> 1) & 0x07; in x25_decode()
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-meson8b.c35 /* TX clock delay in ns = "8ns / 4 * tx_dly_val" (where 8ns are exactly one
37 * 0ns = 0x0, 2ns = 0x1, 4ns = 0x2, 6ns = 0x3
67 * ...) can be configured to be 1 to compensate for a delay of about 1ns.
362 * 25MHz for 100Mbit/s and 2.5MHz for 10Mbit/s). in meson8b_init_prg_eth()
379 /* invert internal clk_rmii_i to generate 25/2.5 tx_rx_clk */ in meson8b_init_prg_eth()
432 /* use 2ns as fallback since this value was previously hardcoded */ in meson8b_dwmac_probe()
433 if (of_property_read_u32(pdev->dev.of_node, "amlogic,tx-delay-ns", in meson8b_dwmac_probe()
441 "amlogic,rx-delay-ns", in meson8b_dwmac_probe()
443 /* convert ns to ps */ in meson8b_dwmac_probe()
/openbmc/linux/drivers/ssb/
H A Ddriver_chipcommon.c423 case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ in ssb_chipco_get_clockcontrol()
435 unsigned long ns) in ssb_chipco_timing_init() argument
443 tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT; /* Waitcount-3 = 10ns */ in ssb_chipco_timing_init()
444 tmp |= DIV_ROUND_UP(40, ns) << SSB_PROG_WCNT_1_SHIFT; /* Waitcount-1 = 40ns */ in ssb_chipco_timing_init()
445 tmp |= DIV_ROUND_UP(240, ns); /* Waitcount-0 = 240ns */ in ssb_chipco_timing_init()
449 tmp = DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_3_SHIFT; /* Waitcount-3 = 10nS */ in ssb_chipco_timing_init()
450 tmp |= DIV_ROUND_UP(10, ns) << SSB_FLASH_WCNT_1_SHIFT; /* Waitcount-1 = 10nS */ in ssb_chipco_timing_init()
451 tmp |= DIV_ROUND_UP(120, ns); /* Waitcount-0 = 120nS */ in ssb_chipco_timing_init()
462 tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT; /* Waitcount-3 = 10ns */ in ssb_chipco_timing_init()
463 tmp |= DIV_ROUND_UP(20, ns) << SSB_PROG_WCNT_2_SHIFT; /* Waitcount-2 = 20ns */ in ssb_chipco_timing_init()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml24 i2c-scl-rising-time-ns:
25 default: 25
27 i2c-scl-falling-time-ns:
158 i2c-scl-rising-time-ns = <185>;
159 i2c-scl-falling-time-ns = <20>;

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