armadeus/apf27/apf27.h

77 #define ACFG_SDRAM_EXIT_PWD		25 /* ns exit power
83 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY	18 /* ns */
90 #define ACFG_SDRAM_RAS_DELAY		42 /* ns ACTIVE-to-PRECHARGE delay */
91 #define ACFG_SDRAM_RRD_DELAY		12 /* ns ACTIVE-to-ACTIVE delay */
92 #define ACFG_SDRAM_RCD_DELAY		18 /* ns Row to Column delay */
93 #define ACFG_SDRAM_RC_DELAY		70 /* ns Row cycle delay (tRFC
96 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1	0 /* ns clock cycle time
123 #define ACFG_SDRAM_EXIT_PWD		25 /* ns exit power
129 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY	18 /* ns */
136 #define ACFG_SDRAM_RAS_DELAY		42 /* ns ACTIVE-to-PRECHARGE delay */
137 #define ACFG_SDRAM_RRD_DELAY		12 /* ns ACTIVE-to-ACTIVE delay */
138 #define ACFG_SDRAM_RCD_DELAY		18 /* ns Row to Column delay */
139 #define ACFG_SDRAM_RC_DELAY		70 /* ns Row cycle delay (tRFC
142 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1	0 /* ns clock cycle time
169 #define ACFG_SDRAM_EXIT_PWD		25 /* ns exit power
175 #define ACFG_SDRAM_ROW_PRECHARGE_DELAY	18 /* ns */
182 #define ACFG_SDRAM_RAS_DELAY		42 /* ns ACTIVE-to-PRECHARGE delay */
183 #define ACFG_SDRAM_RRD_DELAY		12 /* ns ACTIVE-to-ACTIVE delay */
184 #define ACFG_SDRAM_RCD_DELAY		18 /* ns Row to Column delay */
185 #define ACFG_SDRAM_RC_DELAY		70 /* ns Row cycle delay (tRFC
188 #define ACFG_SDRAM_CLOCK_CYCLE_CL_1	0 /* ns clock cycle time
394 /* fixme none integer value (7.5ns) => 2*hclock = 15ns */
395 #define ACFG_2XHCLK_LGTH	(2000/CONFIG_HCLK_FREQ)	/* ns */
413 	|(((CONFIG_CLK0_EN)&0x01)<<25)\