/openbmc/linux/arch/arm64/tools/ |
H A D | sysreg | 77 Field 21 TDA 109 0b0000 NI 114 0b0000 NI 118 0b0000 NI 123 0b0000 UNDISCLOSED 128 0b0000 NI 132 0b0000 NI 137 0b0000 NI 142 0b0000 NI 150 0b0000 NI [all …]
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/openbmc/linux/drivers/staging/media/atomisp/pci/ |
H A D | input_system_ctrl_defs.h | 52 #define ISYS_CTRL_ACQ_FSM_STATE_INFO_REG_ID 21 112 InpSysCaptFramesAcq 1/0 [3:0] - 'b0000 114 CaptA-'b0000 120 'b0000 - CaptA 130 'b0000 - CaptA 138 'b0000 - CaptA 146 'b0000 - CaptA 156 InpSysAckCFA 1/0 [3:0] - 'b0000 158 CaptA-'b0000 164 'b0000 - CaptA [all …]
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/openbmc/u-boot/board/d-link/dns325/ |
H A D | kwbimage.cfg | 58 # bit23-21: 0 required 161 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM 162 # bit7-4: 0b0000, (read) M_ODT[1] is not asserted during read from DRAM 165 # bit23-20: 0b0000, (write) M_ODT[1] is not asserted during write to DRAM 175 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-4 182 # bit25-21: 0, Pad P channel driving strength for ODT
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/openbmc/u-boot/board/buffalo/lsxl/ |
H A D | kwbimage-lsxhl.cfg | 61 # bit23-21: 0 required 179 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM 180 # bit7-4: 0b0000, (read) M_ODT[1] is not asserted during read from DRAM 183 # bit23-20: 0b0000, (write) M_ODT[1] is not asserted during write to DRAM 195 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-3 202 # bit25-21: 0, Pad P channel driving strength for ODT
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H A D | kwbimage-lschl.cfg | 61 # bit23-21: 0 required 179 # bit3-0: 0b0000, (read) M_ODT[0] is not asserted during read from DRAM 180 # bit7-4: 0b0000, (read) M_ODT[1] is not asserted during read from DRAM 195 # bit7-4: 0b0000, internal ODT is not asserted during write to DRAM bank 0-3 202 # bit25-21: 0, Pad P channel driving strength for ODT
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/openbmc/linux/Documentation/devicetree/bindings/memory-controllers/fsl/ |
H A D | mmdc.yaml | 42 memory-controller@21b0000 { 48 memory-controller@21b4000 {
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/openbmc/u-boot/arch/arm/dts/ |
H A D | dragonboard410c.dts | 42 stdout-path = "/soc/serial@78b0000"; 80 serial@78b0000 { 177 gpios = <&soc_gpios 21 0>;
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H A D | exynos5.dtsi | 26 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>, 114 spi_4: spi@131b0000 { 147 dp: dp@145b0000 {
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H A D | fsl-ls1043a.dtsi | 109 i2c2: i2c@21a0000 { 120 i2c3: i2c@21b0000 { 131 duart0: serial@21c0500 { 138 duart1: serial@21c0600 { 145 duart2: serial@21d0500 { 152 duart3: serial@21d0600 {
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H A D | fsl-ls1046a.dtsi | 109 i2c2: i2c@21a0000 { 120 i2c3: i2c@21b0000 { 131 duart0: serial@21c0500 { 138 duart1: serial@21c0600 { 145 duart2: serial@21d0500 { 152 duart3: serial@21d0600 {
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H A D | imx6qdl.dtsi | 399 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; 469 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; 629 gpio6: gpio@20b0000 { 1081 i2c1: i2c@21a0000 { 1091 i2c2: i2c@21a4000 { 1101 i2c3: i2c@21a8000 { 1111 romcp@21ac000 { 1115 mmdc0: mmdc@21b0000 { /* MMDC0 */ 1120 mmdc1: mmdc@21b4000 { /* MMDC1 */ 1124 weim: weim@21b8000 { [all …]
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H A D | armada-ap806.dtsi | 125 gic_v2m3: v2m@2b0000 { 218 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
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/openbmc/linux/Documentation/trace/ |
H A D | hisi-ptt.rst | 189 - 4'b0000: inbound TLPs (P, NP, CPL) 197 - 4'b0000: reserved 214 - 4'b0000: 4DW length per TLP header 251 bits [31:30] [ 29:25 ][24][23][22][21][ 20:11 ][ 10:0 ]
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/openbmc/linux/arch/arm/kernel/ |
H A D | phys2virt.S | 41 mov r0, r3, lsr #21 @ constant for add/sub instructions 42 teq r3, r0, lsl #21 @ must be 2 MiB aligned 63 @ phys-to-virt: movw <reg>, #offset<31:21> 64 @ lsl <reg>, #21 67 @ virt-to-phys (non-LPAE): movw <reg>, #offset<31:21> 68 @ lsl <reg>, #21 71 @ virt-to-phys (LPAE): movw <reg>, #offset<31:21> 72 @ lsl <reg>, #21 93 @ of i:imm3 != 0b0000, but fortunately, we never need more than 8 lower 103 moveq r0, #0x200000 @ set bit 21, mov to mvn instruction [all …]
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/openbmc/u-boot/board/qualcomm/dragonboard820c/ |
H A D | readme.txt | 260 In: serial@75b0000 261 Out: serial@75b0000 262 Err: serial@75b0000 296 …(gcc version 6.3.1 20170404 (Linaro GCC 6.3-2017.05) ) #1 SMP PREEMPT Wed Oct 18 10:21:11 CEST 2017 408 Linux linaro-developer 4.11.3-30039-g5a922a1 #1 SMP PREEMPT Wed Oct 18 10:21:11 CEST 2017 aarch64 G…
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/openbmc/linux/arch/arm/boot/dts/nspire/ |
H A D | nspire.dtsi | 105 interrupts = <21>; 194 pwr: pwr@900b0000 {
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/openbmc/linux/arch/powerpc/boot/dts/fsl/ |
H A D | p1022rdk.dts | 67 zl6100@21 { 130 ethernet@b0000 {
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/openbmc/linux/arch/arm64/boot/dts/arm/ |
H A D | foundation-v8.dtsi | 158 <0 0 21 &gic 0 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 214 v2m_serial2: serial@b0000 {
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/openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6sll.dtsi | 407 <&iomuxc 21 6 11>; 423 <&iomuxc 20 142 1>, <&iomuxc 21 143 1>, 451 <&iomuxc 21 137 1>; 454 gpio6: gpio@20b0000 { 756 i2c1: i2c@21a0000 { 766 i2c2: i2c@21a4000 { 776 i2c3: i2c@21a8000 { 786 mmdc: memory-controller@21b0000 { 792 rngb: rng@21b4000 { 799 ocotp: efuse@21bc000 { [all …]
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H A D | imx6sx.dtsi | 352 dmas = <&sdma 23 21 0>, 353 <&sdma 24 21 0>; 418 <&sdma 21 23 1>, <&sdma 22 23 1>; 558 gpio6: gpio@20b0000 { 1057 i2c1: i2c@21a0000 { 1067 i2c2: i2c@21a4000 { 1077 i2c3: i2c@21a8000 { 1087 memory-controller@21b0000 { 1093 fec2: ethernet@21b4000 { 1110 weim: weim@21b8000 { [all …]
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H A D | imx6qdl.dtsi | 405 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>; 475 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>; 637 gpio6: gpio@20b0000 { 1115 i2c1: i2c@21a0000 { 1125 i2c2: i2c@21a4000 { 1135 i2c3: i2c@21a8000 { 1145 romcp@21ac000 { 1149 mmdc0: memory-controller@21b0000 { /* MMDC0 */ 1155 mmdc1: memory-controller@21b4000 { /* MMDC1 */ 1161 weim: weim@21b8000 { [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos5.dtsi | 75 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 199 dp: dp-controller@145b0000 {
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/openbmc/linux/Documentation/devicetree/bindings/dma/ |
H A D | ti-edma.txt | 95 /* Channel 20 and 21 is allocated for memcpy */ 96 ti,edma-memcpy-channels = <20 21>; 176 edma1_tptc0: tptc@27b0000 {
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/openbmc/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | samsung,pinctrl.yaml | 145 interrupts = <21>; 261 <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>, 362 pinctrl@114b0000 {
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/openbmc/u-boot/doc/ |
H A D | README.chromium | 95 U-Boot 2017.07-00637-g242eb42-dirty (May 22 2017 - 06:14:21 -0600) 109 C: sdhci@700b0000: 2, sdhci@700b0400: 1, sdhci@700b0600: 0
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