Home
last modified time | relevance | path

Searched +full:2020 +full:c000 (Results 1 – 25 of 34) sorted by relevance

12

/openbmc/linux/Documentation/devicetree/bindings/pwm/
H A Dpwm-sifive.yaml2 # Copyright (C) 2020 SiFive, Inc.
30 - sifive,fu540-c000-pwm
31 - sifive,fu740-c000-pwm
35 compatible strings are "sifive,fu540-c000-pwm" and
36 "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
53 Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
66 compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
H A Dpwm-bcm2835.yaml38 pwm@2020c000 {
/openbmc/linux/Documentation/devicetree/bindings/cache/
H A Dsifive,ccache0.yaml2 # Copyright (C) 2020 SiFive, Inc.
25 - sifive,fu540-c000-ccache
26 - sifive,fu740-c000-ccache
37 - sifive,fu540-c000-ccache
38 - sifive,fu740-c000-ccache
46 - const: sifive,fu540-c000-ccache
90 - sifive,fu740-c000-ccache
113 - sifive,fu740-c000-ccache
157 compatible = "sifive,fu540-c000-ccache", "cache";
/openbmc/linux/Documentation/devicetree/bindings/clock/sifive/
H A Dfu540-prci.yaml2 # Copyright (C) 2020 SiFive, Inc.
26 const: sifive,fu540-c000-prci
55 compatible = "sifive,fu540-c000-prci";
H A Dfu740-prci.yaml2 # Copyright (C) 2020 SiFive, Inc.
27 const: sifive,fu740-c000-prci
59 compatible = "sifive,fu740-c000-prci";
/openbmc/linux/drivers/clk/sifive/
H A Dfu540-prci.h6 * Copyright (C) 2020-2021 Zong Li
9 * FU540-C000 chip. This driver assumes that it has sole control
16 * - SiFive FU540-C000 manual v1p0, Chapter 7 "Clocking and Reset"
H A Dsifive-prci.c3 * Copyright (C) 2020 SiFive, Inc.
4 * Copyright (C) 2020 Zong Li
601 {.compatible = "sifive,fu540-c000-prci", .data = &prci_clk_fu540},
602 {.compatible = "sifive,fu740-c000-prci", .data = &prci_clk_fu740},
/openbmc/linux/arch/riscv/boot/dts/sifive/
H A Dfu740-c000.dtsi2 /* Copyright (c) 2020 SiFive, Inc */
11 compatible = "sifive,fu740-c000", "sifive,fu740";
170 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
182 compatible = "sifive,fu740-c000-prci";
189 compatible = "sifive,fu740-c000-uart", "sifive,uart0";
197 compatible = "sifive,fu740-c000-uart", "sifive,uart0";
205 compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
217 compatible = "sifive,fu740-c000-i2c", "sifive,i2c0";
229 compatible = "sifive,fu740-c000-spi", "sifive,spi0";
240 compatible = "sifive,fu740-c000-spi", "sifive,spi0";
[all …]
H A Dhifive-unmatched-a00.dts2 /* Copyright (c) 2020 SiFive, Inc */
4 #include "fu740-c000.dtsi"
15 compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dpm8009.dtsi4 * Copyright (c) 2020, Linaro Limited
21 pm8009_gpios: gpio@c000 {
H A Dpm660l.dtsi3 * Copyright (c) 2020, Konrad Dybcio
51 pm660l_gpios: gpio@c000 {
H A Dpm660.dtsi3 * Copyright (c) 2020, Konrad Dybcio
184 pm660_gpios: gpio@c000 {
H A Dsc8180x.dtsi4 * Copyright (c) 2020-2023, Linaro Limited
930 i2c3: i2c@88c000 {
945 spi3: spi@88c000 {
959 uart3: serial@88c000 {
1094 i2c7: i2c@89c000 {
1109 spi7: spi@89c000 {
1123 uart7: serial@89c000 {
H A Dsm8350.dtsi3 * Copyright (c) 2020, Linaro Limited
825 i2c17: i2c@88c000 {
841 spi17: spi@88c000 {
1051 uart2: serial@98c000 {
1066 spi3: spi@98c000 {
1191 i2c7: i2c@99c000 {
1207 spi7: spi@99c000 {
H A Dsm8250.dtsi3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
1111 i2c17: i2c@88c000 {
1127 spi17: spi@88c000 {
1143 uart17: serial@88c000 {
1378 i2c3: i2c@98c000 {
1394 spi3: spi@98c000 {
1519 i2c7: i2c@99c000 {
1535 spi7: spi@99c000 {
3018 tpdm@684c000 {
/openbmc/linux/arch/arm/boot/dts/qcom/
H A Dpmx55.dtsi4 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
5 * Copyright (c) 2020, Linaro Limited
68 pmx55_gpios: gpio@c000 {
H A Dqcom-sdx55.dtsi6 * Copyright (c) 2020, Linaro Ltd.
272 system_noc: interconnect@162c000 {
/openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dsifive,plic-1.0.0.yaml2 # Copyright (C) 2020 SiFive, Inc.
61 - sifive,fu540-c000-plic
162 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
/openbmc/linux/arch/arm/boot/dts/hisilicon/
H A Dsd5203.dts3 * Copyright (c) 2020 HiSilicon Limited.
86 uart1: serial@1600c000 {
/openbmc/linux/arch/riscv/boot/dts/microchip/
H A Dmpfs.dtsi2 /* Copyright (c) 2020-2021 Microchip Technology Inc */
188 compatible = "microchip,mpfs-ccache", "sifive,fu540-c000-ccache", "cache";
200 compatible = "sifive,fu540-c000-clint", "sifive,clint0";
210 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0";
224 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
400 can0: can@2010c000 {
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623n.dtsi3 * Copyright © 2017-2020 MediaTek Inc.
128 smi_common: smi@1000c000 {
185 dsi: dsi@1400c000 {
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-j7200-mcu-wakeup.dtsi5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
206 wkup_pmx0: pinctrl@4301c000 {
H A Dk3-j721e-mcu-wakeup.dtsi5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
56 wkup_pmx0: pinctrl@4301c000 {
H A Dk3-am64-main.dtsi5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/
1307 tx_pru0_1: txpru@c000 {
1448 tx_pru1_1: txpru@c000 {
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8192.dtsi3 * Copyright (C) 2020 MediaTek Inc.
693 apmixedsys: syscon@1000c000 {
1515 gamma0: gamma@1400c000 {

12