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/openbmc/linux/kernel/time/
H A Dtimeconst.bc43 define timeconst(hz) {
45 print "/* Time conversion constants for HZ == ", hz, " */\n"
54 print "#if HZ != ", hz, "\n"
55 print "#error \qinclude/generated/timeconst.h has the wrong HZ value!\q\n"
58 if (hz < 2) {
59 print "#error Totally bogus HZ value!\n"
61 s=fmuls(32,1000,hz)
63 print "#define HZ_TO_MSEC_MUL32\tU64_C(0x", fmul(s,1000,hz), ")\n"
64 print "#define HZ_TO_MSEC_ADJ32\tU64_C(0x", fadj(s,1000,hz), ")\n"
68 s=fmuls(32,hz,1000)
[all …]
H A Dclocksource-wdtest.c98 schedule_timeout_uninterruptible(HZ / 10); in wdtest_ktime_clocksource_reset()
99 clocksource_register_khz(&clocksource_wdtest_ktime, 1000 * 1000); in wdtest_ktime_clocksource_reset()
110 schedule_timeout_uninterruptible(holdoff * HZ); in wdtest_func()
121 schedule_timeout_uninterruptible(HZ); in wdtest_func()
132 clocksource_register_khz(&clocksource_wdtest_ktime, 1000 * 1000); in wdtest_func()
152 schedule_timeout_uninterruptible(2 * HZ); in wdtest_func()
162 schedule_timeout_uninterruptible(2 * HZ); in wdtest_func()
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-peripherals-opp.dtsi59 opp-hz = /bits/ 64 <12750000>;
64 opp-12750000-1000 {
66 opp-hz = /bits/ 64 <12750000>;
73 opp-hz = /bits/ 64 <12750000>;
80 opp-hz = /bits/ 64 <25500000>;
85 opp-25500000-1000 {
87 opp-hz = /bits/ 64 <25500000>;
94 opp-hz = /bits/ 64 <25500000>;
101 opp-hz = /bits/ 64 <27000000>;
106 opp-27000000-1000 {
[all …]
H A Dtegra20-peripherals-opp.dtsi49 opp-hz = /bits/ 64 <36000000>;
56 opp-hz = /bits/ 64 <47500000>;
63 opp-hz = /bits/ 64 <50000000>;
70 opp-hz = /bits/ 64 <54000000>;
77 opp-hz = /bits/ 64 <57000000>;
84 opp-hz = /bits/ 64 <100000000>;
91 opp-hz = /bits/ 64 <108000000>;
98 opp-hz = /bits/ 64 <126666000>;
105 opp-hz = /bits/ 64 <150000000>;
112 opp-hz = /bits/ 64 <190000000>;
[all …]
H A Dtegra20-cpu-opp.dtsi11 opp-hz = /bits/ 64 <216000000>;
18 opp-hz = /bits/ 64 <216000000>;
25 opp-hz = /bits/ 64 <312000000>;
31 opp-hz = /bits/ 64 <312000000>;
37 opp-hz = /bits/ 64 <456000000>;
44 opp-hz = /bits/ 64 <456000000>;
50 opp-hz = /bits/ 64 <456000000>;
56 opp-hz = /bits/ 64 <608000000>;
62 opp-hz = /bits/ 64 <608000000>;
68 opp-hz = /bits/ 64 <608000000>;
[all …]
H A Dtegra124-peripherals-opp.dtsi9 opp-hz = /bits/ 64 <12750000>;
15 opp-hz = /bits/ 64 <12750000>;
21 opp-hz = /bits/ 64 <12750000>;
27 opp-hz = /bits/ 64 <12750000>;
33 opp-hz = /bits/ 64 <20400000>;
39 opp-hz = /bits/ 64 <20400000>;
45 opp-hz = /bits/ 64 <20400000>;
51 opp-hz = /bits/ 64 <20400000>;
57 opp-hz = /bits/ 64 <40800000>;
63 opp-hz = /bits/ 64 <40800000>;
[all …]
H A Dtegra30-cpu-opp.dtsi11 opp-hz = /bits/ 64 <51000000>;
17 opp-hz = /bits/ 64 <51000000>;
23 opp-hz = /bits/ 64 <51000000>;
29 opp-hz = /bits/ 64 <102000000>;
35 opp-hz = /bits/ 64 <102000000>;
41 opp-hz = /bits/ 64 <102000000>;
47 opp-hz = /bits/ 64 <204000000>;
54 opp-hz = /bits/ 64 <204000000>;
61 opp-hz = /bits/ 64 <204000000>;
68 opp-hz = /bits/ 64 <312000000>;
[all …]
/openbmc/linux/kernel/
H A DKconfig.hz11 to have the timer interrupt run at 1000 Hz but 100 Hz may be more
16 environment leading to NR_CPUS * HZ number of timer interrupts
21 bool "100 HZ"
23 100 Hz is a typical choice for servers, SMP and NUMA systems
28 bool "250 HZ"
30 250 Hz is a good compromise choice allowing server performance
33 or multimedia, selected 300Hz instead.
36 bool "300 HZ"
38 300 Hz is a good compromise choice allowing server performance
44 bool "1000 HZ"
[all …]
/openbmc/linux/arch/arm/include/asm/
H A Ddelay.h11 #include <asm/param.h> /* HZ */
20 * jiffies_per_sec = HZ
23 * Therefore the constant part is HZ / 1000000 which is a small
32 * UDELAY_MULT = 2^31 * HZ / 1000000
33 * = (2^31 / 1000000) * HZ
34 * = 2147.483648 * HZ
35 * = 2147 * HZ + 483648 * HZ / 1000000
38 * delay_us * UDELAY_MULT assuming HZ <= 1000 and delay_us <= 2000.
41 #define UDELAY_MULT UL(2147 * HZ + 483648 * HZ / 1000000)
65 * of 2000us. Further limits: HZ<=1000
[all …]
/openbmc/u-boot/lib/
H A Dstrmhz.c8 char *strmhz (char *buf, unsigned long hz) in strmhz() argument
13 n = DIV_ROUND_CLOSEST(hz, 1000) / 1000L; in strmhz()
16 hz -= n * 1000000L; in strmhz()
17 m = DIV_ROUND_CLOSEST(hz, 1000L); in strmhz()
/openbmc/linux/arch/riscv/lib/
H A Ddelay.c24 * jiffies_per_sec = HZ
27 * Therefore the constant part is HZ / 1000000 which is a small
36 * UDELAY_MULT = 2^31 * HZ / 1000000
37 * = (2^31 / 1000000) * HZ
38 * = 2147.483648 * HZ
39 * = 2147 * HZ + 483648 * HZ / 1000000
42 * delay_us * UDELAY_MULT assuming HZ <= 1000 and delay_us <= 2000.
45 #define MAX_UDELAY_HZ 1000
46 #define UDELAY_MULT (2147UL * HZ + 483648UL * HZ / 1000000UL)
49 #if HZ > MAX_UDELAY_HZ
[all …]
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3128.c29 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
31 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
45 uint vco_hz = OSC_HZ / 1000 * div->fbdiv / div->refdiv * 1000; in rkclk_set_pll()
78 u32 ref_khz = OSC_HZ / 1000, refdiv, fbdiv = 0; in pll_para_config()
85 u32 freq_khz = freq_hz / 1000; in pll_para_config()
88 printf("%s: the frequency can't be 0 Hz\n", __func__); in pll_para_config()
92 postdiv1 = DIV_ROUND_UP(VCO_MIN_HZ / 1000, freq_khz); in pll_para_config()
100 if (vco_khz < (VCO_MIN_HZ / 1000) || vco_khz > (VCO_MAX_HZ / 1000) || in pll_para_config()
131 if (best_diff_khz > 4 * (1000)) { in pll_para_config()
132 printf("%s: Failed to match output frequency %u bestis %u Hz\n", in pll_para_config()
[all …]
H A Dclk_rk3368.c35 #define OSC_HZ (24 * 1000 * 1000)
36 #define APLL_L_HZ (800 * 1000 * 1000)
37 #define APLL_B_HZ (816 * 1000 * 1000)
38 #define GPLL_HZ (576 * 1000 * 1000)
39 #define CPLL_HZ (400 * 1000 * 1000)
43 #define PLL_DIVISORS(hz, _nr, _no) { \ argument
44 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
45 _Static_assert(((u64)hz * _nr * _no / OSC_HZ) * OSC_HZ /\
46 (_nr * _no) == hz, #hz "Hz cannot be hit with PLL " \
93 uint vco_hz = OSC_HZ / 1000 * div->nf / div->nr * 1000; in rkclk_set_pll()
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-peripherals-opp.dtsi10 opp-hz = /bits/ 64 <12750000>;
16 opp-hz = /bits/ 64 <12750000>;
22 opp-hz = /bits/ 64 <12750000>;
28 opp-hz = /bits/ 64 <12750000>;
34 opp-hz = /bits/ 64 <20400000>;
40 opp-hz = /bits/ 64 <20400000>;
46 opp-hz = /bits/ 64 <20400000>;
52 opp-hz = /bits/ 64 <20400000>;
58 opp-hz = /bits/ 64 <40800000>;
64 opp-hz = /bits/ 64 <40800000>;
[all …]
/openbmc/linux/drivers/cpufreq/
H A Dimx6q-cpufreq.c67 freq_hz = new_freq * 1000; in imx6q_set_target()
68 old_freq = clk_get_rate(clks[ARM].clk) / 1000; in imx6q_set_target()
82 old_freq / 1000, volt_old / 1000, in imx6q_set_target()
83 new_freq / 1000, volt / 1000); in imx6q_set_target()
127 clk_set_rate(clks[ARM].clk, (old_freq >> 1) * 1000); in imx6q_set_target()
138 clk_set_rate(clks[PLL1_SYS].clk, new_freq * 1000); in imx6q_set_target()
145 clk_set_rate(clks[PLL1_SYS].clk, new_freq * 1000); in imx6q_set_target()
155 ret = clk_set_rate(clks[ARM].clk, new_freq * 1000); in imx6q_set_target()
251 * 2b'11: 1200000000Hz; in imx6q_opp_check_speed_grading()
252 * 2b'10: 996000000Hz; in imx6q_opp_check_speed_grading()
[all …]
H A Dsh-cpufreq.c39 return (clk_get_rate(&per_cpu(sh_cpuclk, cpu)) + 500) / 1000; in sh_cpufreq_get()
57 /* Convert target_freq from kHz to Hz */ in __sh_cpufreq_target()
58 freq = clk_round_rate(cpuclk, target->freq * 1000); in __sh_cpufreq_target()
60 if (freq < (policy->min * 1000) || freq > (policy->max * 1000)) in __sh_cpufreq_target()
63 dev_dbg(dev, "requested frequency %u Hz\n", target->freq * 1000); in __sh_cpufreq_target()
66 freqs.new = (freq + 500) / 1000; in __sh_cpufreq_target()
73 dev_dbg(dev, "set frequency %lu Hz\n", freq); in __sh_cpufreq_target()
100 policy->min = (clk_round_rate(cpuclk, 1) + 500) / 1000; in sh_cpufreq_verify()
101 policy->max = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; in sh_cpufreq_verify()
130 (clk_round_rate(cpuclk, 1) + 500) / 1000; in sh_cpufreq_cpu_init()
[all …]
/openbmc/linux/drivers/video/fbdev/core/
H A Dfbmon.c333 tmp *= 1000; in get_chroma()
339 tmp *= 1000; in get_chroma()
345 tmp *= 1000; in get_chroma()
351 tmp *= 1000; in get_chroma()
357 tmp *= 1000; in get_chroma()
363 tmp *= 1000; in get_chroma()
369 tmp *= 1000; in get_chroma()
375 tmp *= 1000; in get_chroma()
418 DPRINTK(" 720x400@70Hz\n"); in get_est_timing()
423 DPRINTK(" 720x400@88Hz\n"); in get_est_timing()
[all …]
/openbmc/linux/arch/loongarch/include/asm/
H A Ddelay.h18 #if HZ >= 1000
20 #elif HZ <= 200
23 #define MAX_UDELAY_MS (1000 / HZ)
/openbmc/linux/arch/mips/include/asm/
H A Ddelay.h24 #if HZ >= 1000
26 #elif HZ <= 200
29 #define MAX_UDELAY_MS (1000 / HZ)
/openbmc/linux/include/linux/
H A Djiffies.h13 #include <asm/param.h> /* for HZ */
18 * model. The HZ variable establishes the timer interrupt frequency, 100 Hz
19 * for the SunOS kernel, 256 Hz for the Ultrix kernel and 1024 Hz for the
23 #if HZ >= 12 && HZ < 24
25 #elif HZ >= 24 && HZ < 48
27 #elif HZ >= 48 && HZ < 96
29 #elif HZ >= 96 && HZ < 192
31 #elif HZ >= 192 && HZ < 384
33 #elif HZ >= 384 && HZ < 768
35 #elif HZ >= 768 && HZ < 1536
[all …]
/openbmc/linux/Documentation/fb/
H A Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
14 # Scan Frequency 31.469 kHz 59.94 Hz
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
39 # Scan Frequency 37.500 kHz 75.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
60 # Scan Frequency 43.269 kHz 85.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsc8180x.dtsi323 opp-hz = /bits/ 64 <300000000>;
328 opp-hz = /bits/ 64 <422400000>;
333 opp-hz = /bits/ 64 <537600000>;
338 opp-hz = /bits/ 64 <652800000>;
343 opp-hz = /bits/ 64 <768000000>;
348 opp-hz = /bits/ 64 <883200000>;
353 opp-hz = /bits/ 64 <998400000>;
358 opp-hz = /bits/ 64 <1113600000>;
363 opp-hz = /bits/ 64 <1228800000>;
368 opp-hz = /bits/ 64 <1363200000>;
[all …]
H A Dsm8250.dtsi379 opp-hz = /bits/ 64 <300000000>;
384 opp-hz = /bits/ 64 <403200000>;
389 opp-hz = /bits/ 64 <518400000>;
394 opp-hz = /bits/ 64 <614400000>;
399 opp-hz = /bits/ 64 <691200000>;
404 opp-hz = /bits/ 64 <787200000>;
409 opp-hz = /bits/ 64 <883200000>;
414 opp-hz = /bits/ 64 <979200000>;
419 opp-hz = /bits/ 64 <1075200000>;
424 opp-hz = /bits/ 64 <1171200000>;
[all …]
H A Dsm8150.dtsi320 opp-hz = /bits/ 64 <300000000>;
325 opp-hz = /bits/ 64 <403200000>;
330 opp-hz = /bits/ 64 <499200000>;
335 opp-hz = /bits/ 64 <576000000>;
340 opp-hz = /bits/ 64 <672000000>;
345 opp-hz = /bits/ 64 <768000000>;
350 opp-hz = /bits/ 64 <844800000>;
355 opp-hz = /bits/ 64 <940800000>;
360 opp-hz = /bits/ 64 <1036800000>;
365 opp-hz = /bits/ 64 <1113600000>;
[all …]
/openbmc/linux/Documentation/scheduler/
H A Dsched-nice-design.rst14 units were driven by the HZ tick, so the smallest timeslice was 1/HZ.
44 HZ=1000 it caused 1 jiffy to be 1 msec, which meant 0.1% CPU usage which
51 So for HZ=1000 we changed nice +19 to 5msecs, because that felt like the
53 But the fundamental HZ-sensitive property for nice+19 still remained,
59 within the constraints of HZ and jiffies and their nasty design level
91 enough), the scheduler was decoupled from 'time slice' and HZ concepts
94 support: with the new scheduler nice +19 tasks get a HZ-independent

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