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/openbmc/linux/arch/powerpc/boot/dts/
H A Diss4xx-mpic.dts38 clock-frequency = <100000000>; // 100Mhz :-)
39 timebase-frequency = <100000000>;
52 clock-frequency = <100000000>; // 100Mhz :-)
53 timebase-frequency = <100000000>;
68 clock-frequency = <100000000>; // 100Mhz :-)
69 timebase-frequency = <100000000>;
84 clock-frequency = <100000000>; // 100Mhz :-)
85 timebase-frequency = <100000000>;
H A Dmicrowatt.dts28 clock-frequency = <100000000>;
79 clock-frequency = <100000000>;
80 timebase-frequency = <100000000>;
134 clock-frequency = <100000000>;
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos5433-bus.dtsi114 opp-100000000 {
115 opp-hz = /bits/ 64 <100000000>;
135 opp-100000000 {
136 opp-hz = /bits/ 64 <100000000>;
173 opp-100000000 {
174 opp-hz = /bits/ 64 <100000000>;
190 opp-100000000 {
191 opp-hz = /bits/ 64 <100000000>;
/openbmc/u-boot/board/altera/arria5-socdk/qts/
H A Dpll_config.h73 #define CONFIG_HPS_CLK_CAN0_HZ 100000000
74 #define CONFIG_HPS_CLK_CAN1_HZ 100000000
76 #define CONFIG_HPS_CLK_L4_MP_HZ 100000000
77 #define CONFIG_HPS_CLK_L4_SP_HZ 100000000
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dqcom-sata.txt26 100Mhz (100000000) for SATA_RXOOB_CLK
27 100Mhz (100000000) for SATA_PMALIVE_CLK
44 assigned-clock-rates = <100000000>, <100000000>;
/openbmc/linux/tools/testing/selftests/tc-testing/tc-tests/actions/
H A Dgate.json17 … "cmdUnderTest": "$TC action add action gate priority 1 sched-entry close 100000000ns index 100",
41 …est": "$TC action add action gate base-time 200000000000ns sched-entry close 100000000ns index 10",
65 …": "$TC action add action gate cycle-time 200000000000ns sched-entry close 100000000ns index 1000",
89 …"$TC action add action gate cycle-time-ext 20000000000ns sched-entry close 100000000ns index 1000",
204 … "$TC action add action gate cycle-time-ext 400000000000ns sched-entry close 100000000ns index 103"
231 … "$TC action add action gate cycle-time-ext 400000000000ns sched-entry close 100000000ns index 103"
282 … action add action gate cycle-time-ext 400000000000ns sched-entry close 100000000ns index 42949672…
306 … action add action gate cycle-time-ext 400000000000ns sched-entry close 100000000ns index 4294 coo…
/openbmc/linux/drivers/video/fbdev/via/
H A DtblDPASetting.c24 /* 70000000 < LCK/VCK < 100000000 will use this value */
27 /* 100000000 < LCK/VCK < 15000000 will use this value */
46 /* 70000000 < LCK/VCK < 100000000 will use this value */
48 /* 100000000 < LCK/VCK < 15000000 will use this value */
66 /* 70000000 < LCK/VCK < 100000000 will use this value */
68 /* 100000000 < LCK/VCK < 15000000 will use this value */
/openbmc/u-boot/board/ti/ks2_evm/
H A Dboard_k2e.c20 clk_freq = 100000000; in get_external_clk()
23 clk_freq = 100000000; in get_external_clk()
26 clk_freq = 100000000; in get_external_clk()
29 clk_freq = 100000000; in get_external_clk()
H A Dboard_k2hk.c19 [ddr3a_clk] = 100000000,
20 [ddr3b_clk] = 100000000,
41 clk_freq = 100000000; in get_external_clk()
44 clk_freq = 100000000; in get_external_clk()
/openbmc/linux/drivers/media/platform/qcom/camss/
H A Dcamss.c42 { 100000000, 200000000 } },
54 { 100000000, 200000000 } },
70 { 100000000, 200000000 },
87 { 100000000, 200000000 },
114 { 50000000, 80000000, 100000000, 160000000,
137 { 100000000, 200000000, 266666667 } },
149 { 100000000, 200000000, 266666667 } },
161 { 100000000, 200000000, 266666667 } },
177 { 100000000, 200000000, 266666667 },
194 { 100000000, 200000000, 266666667 },
[all …]
/openbmc/u-boot/board/ebv/socrates/qts/
H A Dpll_config.h73 #define CONFIG_HPS_CLK_CAN0_HZ 100000000
76 #define CONFIG_HPS_CLK_L4_MP_HZ 100000000
77 #define CONFIG_HPS_CLK_L4_SP_HZ 100000000
/openbmc/u-boot/board/altera/cyclone5-socdk/qts/
H A Dpll_config.h73 #define CONFIG_HPS_CLK_CAN0_HZ 100000000
76 #define CONFIG_HPS_CLK_L4_MP_HZ 100000000
77 #define CONFIG_HPS_CLK_L4_SP_HZ 100000000
/openbmc/linux/drivers/clk/axis/
H A Dclk-artpec6.c155 100000000); in artpec6_clkctrl_probe()
162 100000000); in artpec6_clkctrl_probe()
165 100000000); in artpec6_clkctrl_probe()
168 100000000); in artpec6_clkctrl_probe()
205 clk_register_fixed_rate(dev, "i2c", sys_refclk_name, 0, 100000000); in artpec6_clkctrl_probe()
209 100000000); in artpec6_clkctrl_probe()
/openbmc/linux/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-slc.txt35 nxp,whold = <100000000>;
36 nxp,wsetup = <100000000>;
40 nxp,rsetup = <100000000>;
/openbmc/linux/arch/mips/bcm47xx/
H A Dtime.c64 hz = 100000000; in plat_time_init()
70 hz = 100000000; in plat_time_init()
77 hz = 100000000; in plat_time_init()
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4x12.dtsi41 opp-100000000 {
42 opp-hz = /bits/ 64 <100000000>;
105 opp-100000000 {
106 opp-hz = /bits/ 64 <100000000>;
145 opp-100000000 {
146 opp-hz = /bits/ 64 <100000000>;
162 opp-100000000 {
163 opp-hz = /bits/ 64 <100000000>;
188 opp-100000000 {
189 opp-hz = /bits/ 64 <100000000>;
/openbmc/u-boot/arch/arm/dts/
H A Dsocfpga_cyclone5_de0_nano_soc-u-boot.dtsi28 clock-frequency = <100000000>;
33 clock-frequency = <100000000>;
H A Dsocfpga_cyclone5_sockit-u-boot.dtsi38 clock-frequency = <100000000>;
43 clock-frequency = <100000000>;
H A Dsocfpga_arria5_socdk-u-boot.dtsi38 clock-frequency = <100000000>;
43 clock-frequency = <100000000>;
H A Dsocfpga_cyclone5_socrates-u-boot.dtsi38 clock-frequency = <100000000>;
43 clock-frequency = <100000000>;
H A Dsocfpga_cyclone5_vining_fpga-u-boot.dtsi42 clock-frequency = <100000000>;
47 clock-frequency = <100000000>;
H A Dkeystone-k2e-evm.dts25 clock-frequency = <100000000>;
32 clock-frequency = <100000000>;
39 clock-frequency = <100000000>;
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-extended/sblim-sfcb/sblim-sfcb/
H A Dsblim-sfcb-1.3.16-maxMsgLen.patch12 +## Default is 100000000
13 +maxMsgLen: 100000000
/openbmc/u-boot/board/xes/common/
H A Dfsl_8xxx_clk.c25 return 100000000; in get_board_sys_clk()
48 return 100000000; in get_board_ddr_clk()
/openbmc/u-boot/board/terasic/de10-nano/qts/
H A Dpll_config.h76 #define CONFIG_HPS_CLK_L4_MP_HZ 100000000
77 #define CONFIG_HPS_CLK_L4_SP_HZ 100000000

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