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/openbmc/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra234.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2021-2023, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
1382 #define PINGROUP_REG_N(r) -1
1385 #define DRV_PINGROUP_N(r) -1
1388 .drv_reg = -1, \
1389 .drv_bank = -1, \
1390 .drvdn_bit = -1, \
1391 .drvup_bit = -1, \
1392 .slwr_bit = -1, \
[all …]
H A Dpinctrl-tegra194.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
23 #include "pinctrl-tegra.h"
1281 #define PINGROUP_REG_N(r) -1
1284 #define DRV_PINGROUP_N(r) -1
1287 .drv_reg = -1, \
1288 .drv_bank = -1, \
1289 .drvdn_bit = -1, \
1290 .drvup_bit = -1, \
1291 .slwr_bit = -1, \
[all …]
H A Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-tegra.h"
23 #define TEGRA_PIN_PEX_L0_CLKREQ_N_PA1 _GPIO(1)
27 #define TEGRA_PIN_SATA_LED_ACTIVE_PA5 _GPIO(5)
177 /* All non-GPIO pins follow */
178 #define NUM_GPIOS (TEGRA_PIN_QSPI_IO3_PEE5 + 1)
181 /* Non-GPIO pins */
183 #define TEGRA_PIN_CPU_PWR_REQ _PIN(1)
187 #define TEGRA_PIN_BATT_BCL _PIN(5)
1267 #define PINGROUP_REG_A 0x3000 /* bank 1 */
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dddr3_training_db.c1 // SPDX-License-Identifier: GPL-2.0
65 /* DDR3-800D */
66 { {6, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} },
67 /* DDR3-800E */
69 /* DDR3-1066E */
70 { {6, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 0, 5, 0, 5, 0} },
71 /* DDR3-1066F */
73 /* DDR3-1066G */
75 /* DDR3-1333F* */
76 { {6, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
[all …]
/openbmc/qemu/include/libdecnumber/
H A DdecDPD.h29 02110-1301, USA. */
31 /* ------------------------------------------------------------------------ */
33 /* [Automatically generated -- do not edit. 2007.05.05] */
34 /* ------------------------------------------------------------------------ */
35 /* ------------------------------------------------------------------------ */
41 /* uint16_t BCD2DPD[2458]; -- BCD -> DPD (0x999 => 2457) */
42 /* uint16_t BIN2DPD[1000]; -- Bin -> DPD (999 => 2457) */
43 /* uint8_t BIN2CHAR[4001]; -- Bin -> CHAR (999 => '\3' '9' '9' '9') */
44 /* uint8_t BIN2BCD8[4000]; -- Bin -> bytes (999 => 9 9 9 3) */
45 /* uint16_t DPD2BCD[1024]; -- DPD -> BCD (0x3FF => 0x999) */
[all …]
/openbmc/phosphor-webui/app/assets/images/
H A DDMTF_Redfish_logo_2017.svg1 …1b4298}</style><linearGradient id="SVGID_1_" gradientUnits="userSpaceOnUse" y1="612" x2=".7071" y2…
/openbmc/linux/Documentation/i2c/
H A Di2c_bus.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- Created with Inkscape (http://www.inkscape.org/) -->
7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 inkscape:version="0.92.3 (2405546, 2018-03-11)"
30 inkscape:connector-curvature="0"
32 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
33 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
47 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro…
48 …d="m -2.5,-1 c 0,2.76 -2.24,5 -5,5 -2.76,0 -5,-2.24 -5,-5 0,-2.76 2.24,-5 5,-5 2.76,0 5,2.24 5,5 z"
[all …]
/openbmc/qemu/target/hppa/
H A Dinsns.decode24 %assemble_sr3 13:1 14:2
25 %assemble_sr3x 13:1 14:2 !function=expand_sr3x
27 %assemble_11a 4:12 0:1 !function=expand_11a
28 %assemble_12 0:s1 2:1 3:10 !function=expand_shl2
29 %assemble_12a 3:13 0:1 !function=expand_12a
31 %assemble_17 0:s1 16:5 2:1 3:10 !function=expand_shl2
32 %assemble_22 0:s1 16:10 2:1 3:10 !function=expand_shl2
35 %assemble_21 0:s1 1:11 14:2 16:5 12:2 !function=expand_shl11
37 %lowsign_11 0:s1 1:10
41 %rm64 1:1 16:5
[all …]
/openbmc/linux/arch/m68k/lib/
H A Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
20 * (%1). Thanks to Roman Hodek for pointing this out.
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
46 "btst #1,%3\n\t" /* Check alignment */ in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
49 "jgt 1f\n\t" in csum_partial()
50 "addql #2,%1\n\t" /* len was == 2, treat only rest */ in csum_partial()
[all …]
/openbmc/linux/fs/exfat/
H A Dballoc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012-2013 Samsung Electronics Co., Ltd.
14 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2,/* 0 ~ 19*/
15 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2, 0, 1, 0, 3,/* 20 ~ 39*/
16 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/* 40 ~ 59*/
17 0, 1, 0, 6, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4,/* 60 ~ 79*/
18 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5, 0, 1, 0, 2,/* 80 ~ 99*/
19 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3,/*100 ~ 119*/
20 0, 1, 0, 2, 0, 1, 0, 7, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2,/*120 ~ 139*/
21 0, 1, 0, 4, 0, 1, 0, 2, 0, 1, 0, 3, 0, 1, 0, 2, 0, 1, 0, 5,/*140 ~ 159*/
[all …]
/openbmc/u-boot/lib/libavb/
H A Davb_sha256.c1 // SPDX-License-Identifier: BSD-3-Clause
6 * FIPS 180-2 SHA-224/256/384/512 implementation
14 #define ROTR(x, n) ((x >> n) | (x << ((sizeof(x) << 3) - n)))
15 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
28 *((str) + 1) = (uint8_t)((x) >> 16); \
35 ((uint32_t) * ((str) + 1) << 16) | \
42 { w[i] = SHA256_F4(w[i - 2]) + w[i - 7] + SHA256_F3(w[i - 15]) + w[i - 16]; }
75 /* SHA-256 implementation */
80 ctx->h[i] = sha256_h0[i]; in avb_sha256_init()
83 ctx->h[0] = sha256_h0[0]; in avb_sha256_init()
[all …]
/openbmc/linux/arch/powerpc/lib/
H A Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
19 or 1,1,1
26 or 1,1,1
31 or 1,1,1
36 or 1,1,1
43 or 1,1,1
51 or 1,1,1
[all …]
/openbmc/linux/arch/alpha/lib/
H A Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * This is hand-massaged output from the original memcpy.c. We defer to
22 .prologue 1
25 addq $17,$18,$5
26 cmpule $4,$17,$1 /* dest + n <= src */
27 cmpule $5,$16,$2 /* dest >= src + n */
29 bis $1,$2,$1
32 bne $1,memcpy !samegp
34 and $2,7,$2 /* Test for src/dest co-alignment. */
35 and $16,7,$1
[all …]
H A Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
/openbmc/linux/Documentation/input/devices/
H A Delantech.rst4 Copyright (C) 2007-2008 Arjan Opmeer <arjan@opmeer.net>
6 Extra information for hardware version 1 found and
15 1. Introduction
18 4. Hardware version 1
22 5. Hardware version 2
25 5.2.1 Parity checking and packet re-synchronization
31 6.2.1 One/Three finger touch
36 7.2.1 Status packet
42 8.2.1 Status Packet
50 hardware versions unimaginatively called version 1,version 2, version 3
[all …]
/openbmc/linux/arch/powerpc/crypto/
H A Dpoly1305-p10le_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 # Copyright 2023- IBM Corp. All rights reserved
10 # Poly1305 - this version mainly using vector/VSX/Scalar
11 # - 26 bits limbs
12 # - Handle multiple 64 byte blcok.
17 # p = 2^130 - 5
25 # 07/22/21 - this revison based on the above sum of products. Setup r^4, r^3, r^2, r and s3, s2, …
29 # vs [r^1, r^3, r^2, r^4]
35 # vs5 = [r1*5,...]
36 # vs6 = [r2*5,...]
[all …]
/openbmc/qemu/target/arm/tcg/
H A Da64.decode22 %rd 0:5
23 %esz_sd 22:1 !function=plus_2
25 %hl 11:1 21:1
26 %hlm 11:1 20:2
43 @rr_h ........ ... ..... ...... rn:5 rd:5 &rr_e esz=1
44 @rr_d ........ ... ..... ...... rn:5 rd:5 &rr_e esz=3
45 @rr_sd ........ ... ..... ...... rn:5 rd:5 &rr_e esz=%esz_sd
47 @rrr_h ........ ... rm:5 ...... rn:5 rd:5 &rrr_e esz=1
48 @rrr_d ........ ... rm:5 ...... rn:5 rd:5 &rrr_e esz=3
49 @rrr_sd ........ ... rm:5 ...... rn:5 rd:5 &rrr_e esz=%esz_sd
[all …]
/openbmc/u-boot/arch/arm/mach-omap2/omap4/
H A Dhw_data.c1 // SPDX-License-Identifier: GPL-2.0+
36 * dpll locked at 1400 MHz MPU clk at 700 MHz(OPP100) - DCC OFF
40 {175, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */
41 {700, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 13 MHz */
42 {125, 2, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */
43 {401, 10, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */
44 {350, 12, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */
45 {700, 26, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */
46 {638, 34, 1, -1, -1, -1, -1, -1, -1, -1, -1, -1} /* 38.4 MHz */
50 * dpll locked at 1600 MHz - MPU clk at 800 MHz(OPP Turbo 4430)
[all …]
/openbmc/linux/drivers/edac/
H A Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 u32 lock : 1;
31 u32 lock : 1;
41 u32 enable : 1;
54 u64 slice_1_disabled : 1;
55 u64 hvm_mode : 1;
57 u64 slice_0_mem_disabled : 1;
58 u64 reserved_0 : 1;
61 u64 enable_pmi_dual_data_mode : 1;
62 u64 ch_1_disabled : 1;
[all …]
/openbmc/linux/lib/
H A Dtest_objagg.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
21 WARN_ON(1); in key_id_index()
60 if (!world->key_refs[key_id_index(key_id)]) { in world_obj_get()
61 world->objagg_objs[key_id_index(key_id)] = objagg_obj; in world_obj_get()
62 } else if (world->objagg_objs[key_id_index(key_id)] != objagg_obj) { in world_obj_get()
65 err = -EINVAL; in world_obj_get()
68 world->key_refs[key_id_index(key_id)]++; in world_obj_get()
81 if (!world->key_refs[key_id_index(key_id)]) in world_obj_put()
83 objagg_obj = world->objagg_objs[key_id_index(key_id)]; in world_obj_put()
85 world->key_refs[key_id_index(key_id)]--; in world_obj_put()
[all …]
/openbmc/linux/drivers/staging/wlan-ng/
H A Dp80211metadef.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MPL-1.1) */
2 /* --------------------------------------------------------------------
5 * --------------------------------------------------------------------
7 * linux-wlan
9 * --------------------------------------------------------------------
11 * Inquiries regarding the linux-wlan Open Source project can be
15 * info@linux-wlan.com
16 * http://www.linux-wlan.com
18 * --------------------------------------------------------------------
23 * --------------------------------------------------------------------
[all …]
/openbmc/linux/arch/mips/include/asm/
H A Dpgtable-32.h19 #include <asm-generic/pgtable-nopmd.h>
26 * Regarding 32-bit MIPS huge page support (and the tradeoff it entails):
28 * We use the same huge page sizes as 64-bit MIPS. Assuming a 4KB page size,
29 * our 2-level table layout would normally have a PGD entry cover a contiguous
30 * 4MB virtual address region (pointing to a 4KB PTE page of 1,024 32-bit pte_t
32 * spanning both halves of a TLB EntryLo0,1 pair, requires 2MB hardware page
33 * support, not one of the standard supported sizes (1MB,4MB,16MB,...).
37 * increases to match 64-bit MIPS, but PTE lookups remain CPU cache-friendly.
39 * NOTE: We don't yet support huge pages if extended-addressing is enabled
40 * (i.e. EVA, XPA, 36-bit Alchemy/Netlogic).
[all …]
/openbmc/linux/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
[all …]
/openbmc/linux/include/dt-bindings/pinctrl/
H A Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #define IMX8DXL_PCIE_CTRL0_CLKREQ_B 1
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
158 … IMX8DXL_USB_SS3_TC0_CONN_USB_OTG1_PWR IMX8DXL_USB_SS3_TC0 1
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
163 … IMX8DXL_USB_SS3_TC1_CONN_USB_OTG2_PWR IMX8DXL_USB_SS3_TC1 1
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dsubdev-formats.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-mbus-format:
14 .. flat-table:: struct v4l2_mbus_framefmt
15 :header-rows: 0
16 :stub-columns: 0
17 :widths: 1 1 2
19 * - __u32
20 - ``width``
21 - Image width in pixels.
22 * - __u32
[all …]

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