History log of /openbmc/u-boot/drivers/ddr/marvell/a38x/ddr3_training_db.c (Results 1 – 23 of 23)
Revision Date Author Comments
# 66c433ed 31-Mar-2019 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 3d7891d3 21-Mar-2019 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-i2c

- i2c: i2c_cdns: Fix below warnings with checker tool


# a00d1575 19-Mar-2019 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-marvell

- Enable network interface on clearfog_gt_8k (Baruch)
- Fix dreamplug boot by adding an spi0 alias to the DT (Chris)
- Fix / enhance Marvell dd

Merge git://git.denx.de/u-boot-marvell

- Enable network interface on clearfog_gt_8k (Baruch)
- Fix dreamplug boot by adding an spi0 alias to the DT (Chris)
- Fix / enhance Marvell ddr3 setup / parameters (Chris)
- Change CONFIG_SYS_MALLOC_F_LEN to 0x2000 on db-88f6820-amc (Chris)
- Enable SPL_FLASH_BAR on db-88f6820-amc (Chris)
- Use correct pcie controller name in Armada-38x dts files (Chris)
- Disable d-cache on Kirkwood platforms as currently needed (Chris)
- Add a more descriptive comment to pci_mvebu.c (Stefan)
- Update Marvell maintainers entry (Stefan)

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# 08dcbc98 28-Feb-2019 Chris Packham <chris.packham@alliedtelesis.co.nz>

mv_ddr: ddr3: fix tRAS timimg parameter

Based on the JEDEC standard JESD79-3F. The tRAS timings should include
the highest speed bins at a given frequency. This is similar to commit

mv_ddr: ddr3: fix tRAS timimg parameter

Based on the JEDEC standard JESD79-3F. The tRAS timings should include
the highest speed bins at a given frequency. This is similar to commit
683c67b ("mv_ddr: ddr3: fix tfaw timimg parameter") where the wrong
comparison was used in the initial implementation.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/15]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

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# d94604d5 10-Dec-2018 Tom Rini <trini@konsulko.com>

Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC

[trini: Add a bunch of m

Merge tag 'fsl-qoriq-for-v2019.01-rc2' of git://git.denx.de/u-boot-fsl-qoriq

Add TFA boot flow for some Layerscape platforms
Add support for lx2160a SoC

[trini: Add a bunch of missing MAINTAINERS entries]
Signed-off-by: Tom Rini <trini@konsulko.com>

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# 7504e9e7 10-Dec-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-sh


# e7463b37 10-Dec-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-socfpga


# 48d299a7 10-Dec-2018 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-usb

- DWC3 and UDC cleanup


# 8cb8c0c6 09-Dec-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-marvell

- Sync DDR training with Marvell code for Armada 38x by Chris
- Misc updates to Armada 38x Helios4 board by Aditya


# ebb1a593 02-Dec-2018 Chris Packham <judge.packham@gmail.com>

ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02

This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcess

ARM: mvebu: a38x: sync ddr training code with mv_ddr-armada-18.09.02

This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-18.09 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.
Specifically this syncs with commit 99d772547314 ("Bump mv_ddr to
release armada-18.09.2").

The complete log of changes is best obtained from the mv-ddr-marvell.git
repository but some relevant highlights are:

ddr3: add missing txsdll parameter
ddr3: fix tfaw timimg parameter
ddr3: fix trrd timimg parameter
merge ddr3 topology header file with mv_ddr_topology one
mv_ddr: a38x: fix zero memory size scrubbing issue

The upstream code is incorporated omitting the portions not relevant to
Armada-38x and DDR3. After that a semi-automated step is used to drop
unused features with unifdef

find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT -UCONFIG_A3700 -UA3900 -UA80X0 \
-UA70X0

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>

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# 2b4ffbf6 09-May-2018 Chris Packham <judge.packham@gmail.com>

ARM: mvebu: a38x: sync ddr training code with upstream

This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-mar

ARM: mvebu: a38x: sync ddr training code with upstream

This syncs drivers/ddr/marvell/a38x/ with the mv_ddr-armada-17.10 branch
of https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git.

The upstream code is incorporated omitting the ddr4 and apn806 and
folding the nested a38x directory up one level. After that a
semi-automated step is used to drop unused features with unifdef

find drivers/ddr/marvell/a38x/ -name '*.[ch]' | \
xargs unifdef -m -UMV_DDR -UMV_DDR_ATF -UCONFIG_DDR4 \
-UCONFIG_APN806 -UCONFIG_MC_STATIC \
-UCONFIG_MC_STATIC_PRINT -UCONFIG_PHY_STATIC \
-UCONFIG_64BIT

INTER_REGS_BASE is updated to be defined as SOC_REGS_PHY_BASE.

Some now empty files are removed and the ternary license is replaced
with a SPDX GPL-2.0+ identifier.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

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# e8f80a5a 09-May-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-sunxi


# 83d290c5 06-May-2018 Tom Rini <trini@konsulko.com>

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borro

SPDX: Convert all of our single license tags to Linux Kernel style

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from. So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry. Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents. There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>

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# ab21ecef 31-Jan-2018 Tom Rini <trini@konsulko.com>

Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates

Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze

Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes

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# 1d12a7c8 26-Jan-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-spi


# 557767ed 20-Jan-2018 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-marvell


# 672e5598 17-Jan-2018 Chris Packham <judge.packham@gmail.com>

ddr: marvell: update ddr controller init and freq

Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary b

ddr: marvell: update ddr controller init and freq

Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary blobs
currently being supplied by Marvell.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>

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# 7c0e5d86 30-Aug-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-video


# 7a1af7a7 02-Aug-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx


# 6f4e0506 24-Jul-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-usb


# 413978d1 23-Jul-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-uniphier


# 3c9cc70d 23-Jul-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-marvell


# f1df9364 26-Mar-2015 Stefan Roese <sr@denx.de>

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

This patch adds the DDR3 setup and training code taken from the Marvell
U-Boot repository. This code used to be include

arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr

This patch adds the DDR3 setup and training code taken from the Marvell
U-Boot repository. This code used to be included as a binary (bin_hdr)
into the Armada A38x boot image. Not linked with the main U-Boot. With this
code addition and the serdes/PHY setup code, the Armada A38x support
in mainline U-Boot is finally self-contained. So the complete image
for booting can be built from mainline U-Boot. Without any additional
external inclusion.

Note:
This code has undergone many hours (days!) of coding-style cleanup and
refactoring. It still is not checkpatch clean though, I'm afraid. As the
factoring of the code has so many levels of indentation that many lines
are longer than 80 chars.

Signed-off-by: Stefan Roese <sr@denx.de>

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