183d290c5STom Rini // SPDX-License-Identifier: GPL-2.0
2f1df9364SStefan Roese /*
3f1df9364SStefan Roese * Copyright (C) Marvell International Ltd. and its affiliates
4f1df9364SStefan Roese */
5f1df9364SStefan Roese
6ebb1a593SChris Packham #include "ddr_ml_wrapper.h"
7ebb1a593SChris Packham
8ebb1a593SChris Packham #include "ddr3_training_ip_flow.h"
9ebb1a593SChris Packham #include "mv_ddr_topology.h"
10ebb1a593SChris Packham #include "mv_ddr_training_db.h"
11ebb1a593SChris Packham #include "ddr3_training_ip_db.h"
12f1df9364SStefan Roese
132b4ffbf6SChris Packham /* Device attributes structures */
14ebb1a593SChris Packham enum mv_ddr_dev_attribute ddr_dev_attributes[MV_ATTR_LAST];
15ebb1a593SChris Packham int ddr_dev_attr_init_done = 0;
162b4ffbf6SChris Packham
172b4ffbf6SChris Packham static inline u32 pattern_table_get_killer_word16(u8 dqs, u8 index);
182b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_word(u8 sso, u8 index);
192b4ffbf6SChris Packham static inline u32 pattern_table_get_vref_word(u8 index);
202b4ffbf6SChris Packham static inline u32 pattern_table_get_vref_word16(u8 index);
212b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word(u8 bit, u8 index);
222b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word16(u8 bit, u8 index);
232b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word(u8 bit, u8 index);
242b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word16(u8 bit, u8 index);
252b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word(u8 index);
262b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word16(u8 index);
272b4ffbf6SChris Packham
28ebb1a593SChris Packham /* List of allowed frequency listed in order of enum mv_ddr_freq */
29ebb1a593SChris Packham static unsigned int freq_val[MV_DDR_FREQ_LAST] = {
30ebb1a593SChris Packham 0, /*MV_DDR_FREQ_LOW_FREQ */
31ebb1a593SChris Packham 400, /*MV_DDR_FREQ_400, */
32ebb1a593SChris Packham 533, /*MV_DDR_FREQ_533, */
33ebb1a593SChris Packham 666, /*MV_DDR_FREQ_667, */
34ebb1a593SChris Packham 800, /*MV_DDR_FREQ_800, */
35ebb1a593SChris Packham 933, /*MV_DDR_FREQ_933, */
36ebb1a593SChris Packham 1066, /*MV_DDR_FREQ_1066, */
37ebb1a593SChris Packham 311, /*MV_DDR_FREQ_311, */
38ebb1a593SChris Packham 333, /*MV_DDR_FREQ_333, */
39ebb1a593SChris Packham 467, /*MV_DDR_FREQ_467, */
40ebb1a593SChris Packham 850, /*MV_DDR_FREQ_850, */
41ebb1a593SChris Packham 600, /*MV_DDR_FREQ_600 */
42ebb1a593SChris Packham 300, /*MV_DDR_FREQ_300 */
43ebb1a593SChris Packham 900, /*MV_DDR_FREQ_900 */
44ebb1a593SChris Packham 360, /*MV_DDR_FREQ_360 */
45ebb1a593SChris Packham 1000 /*MV_DDR_FREQ_1000 */
46f1df9364SStefan Roese };
47f1df9364SStefan Roese
mv_ddr_freq_tbl_get(void)48ebb1a593SChris Packham unsigned int *mv_ddr_freq_tbl_get(void)
49ebb1a593SChris Packham {
50ebb1a593SChris Packham return &freq_val[0];
51ebb1a593SChris Packham }
52ebb1a593SChris Packham
mv_ddr_freq_get(enum mv_ddr_freq freq)53ebb1a593SChris Packham u32 mv_ddr_freq_get(enum mv_ddr_freq freq)
54ebb1a593SChris Packham {
55ebb1a593SChris Packham return freq_val[freq];
56ebb1a593SChris Packham }
57ebb1a593SChris Packham
58ebb1a593SChris Packham /* cas latency values per frequency for each speed bin index */
59ebb1a593SChris Packham static struct mv_ddr_cl_val_per_freq cl_table[] = {
60f1df9364SStefan Roese /*
61f1df9364SStefan Roese * 400M 667M 933M 311M 467M 600M 360
62f1df9364SStefan Roese * 100M 533M 800M 1066M 333M 850M 900
63f1df9364SStefan Roese * 1000 (the order is 100, 400, 533 etc.)
64f1df9364SStefan Roese */
65f1df9364SStefan Roese /* DDR3-800D */
66f1df9364SStefan Roese { {6, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} },
67f1df9364SStefan Roese /* DDR3-800E */
68f1df9364SStefan Roese { {6, 6, 0, 0, 0, 0, 0, 6, 6, 0, 0, 0, 6, 0, 6, 0} },
69f1df9364SStefan Roese /* DDR3-1066E */
70f1df9364SStefan Roese { {6, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 0, 5, 0, 5, 0} },
71f1df9364SStefan Roese /* DDR3-1066F */
72f1df9364SStefan Roese { {6, 6, 7, 0, 0, 0, 0, 6, 6, 7, 0, 0, 6, 0, 6, 0} },
73f1df9364SStefan Roese /* DDR3-1066G */
74f1df9364SStefan Roese { {6, 6, 8, 0, 0, 0, 0, 6, 6, 8, 0, 0, 6, 0, 6, 0} },
75f1df9364SStefan Roese /* DDR3-1333F* */
76f1df9364SStefan Roese { {6, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
77f1df9364SStefan Roese /* DDR3-1333G */
78f1df9364SStefan Roese { {6, 5, 7, 8, 0, 0, 0, 5, 5, 7, 0, 8, 5, 0, 5, 0} },
79f1df9364SStefan Roese /* DDR3-1333H */
80f1df9364SStefan Roese { {6, 6, 8, 9, 0, 0, 0, 6, 6, 8, 0, 9, 6, 0, 6, 0} },
81f1df9364SStefan Roese /* DDR3-1333J* */
82f1df9364SStefan Roese { {6, 6, 8, 10, 0, 0, 0, 6, 6, 8, 0, 10, 6, 0, 6, 0}
83f1df9364SStefan Roese /* DDR3-1600G* */},
84f1df9364SStefan Roese { {6, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
85f1df9364SStefan Roese /* DDR3-1600H */
86f1df9364SStefan Roese { {6, 5, 6, 8, 9, 0, 0, 5, 5, 6, 0, 8, 5, 0, 5, 0} },
87f1df9364SStefan Roese /* DDR3-1600J */
88f1df9364SStefan Roese { {6, 5, 7, 9, 10, 0, 0, 5, 5, 7, 0, 9, 5, 0, 5, 0} },
89f1df9364SStefan Roese /* DDR3-1600K */
90f1df9364SStefan Roese { {6, 6, 8, 10, 11, 0, 0, 6, 6, 8, 0, 10, 6, 0, 6, 0 } },
91f1df9364SStefan Roese /* DDR3-1866J* */
92f1df9364SStefan Roese { {6, 5, 6, 8, 9, 11, 0, 5, 5, 6, 11, 8, 5, 0, 5, 0} },
93f1df9364SStefan Roese /* DDR3-1866K */
94f1df9364SStefan Roese { {6, 5, 7, 8, 10, 11, 0, 5, 5, 7, 11, 8, 5, 11, 5, 11} },
95f1df9364SStefan Roese /* DDR3-1866L */
96f1df9364SStefan Roese { {6, 6, 7, 9, 11, 12, 0, 6, 6, 7, 12, 9, 6, 12, 6, 12} },
97f1df9364SStefan Roese /* DDR3-1866M* */
98f1df9364SStefan Roese { {6, 6, 8, 10, 11, 13, 0, 6, 6, 8, 13, 10, 6, 13, 6, 13} },
99f1df9364SStefan Roese /* DDR3-2133K* */
100f1df9364SStefan Roese { {6, 5, 6, 7, 9, 10, 11, 5, 5, 6, 10, 7, 5, 11, 5, 11} },
101f1df9364SStefan Roese /* DDR3-2133L */
102f1df9364SStefan Roese { {6, 5, 6, 8, 9, 11, 12, 5, 5, 6, 11, 8, 5, 12, 5, 12} },
103f1df9364SStefan Roese /* DDR3-2133M */
104f1df9364SStefan Roese { {6, 5, 7, 9, 10, 12, 13, 5, 5, 7, 12, 9, 5, 13, 5, 13} },
105f1df9364SStefan Roese /* DDR3-2133N* */
106f1df9364SStefan Roese { {6, 6, 7, 9, 11, 13, 14, 6, 6, 7, 13, 9, 6, 14, 6, 14} },
107f1df9364SStefan Roese /* DDR3-1333H-ext */
108f1df9364SStefan Roese { {6, 6, 7, 9, 0, 0, 0, 6, 6, 7, 0, 9, 6, 0, 6, 0} },
109f1df9364SStefan Roese /* DDR3-1600K-ext */
110f1df9364SStefan Roese { {6, 6, 7, 9, 11, 0, 0, 6, 6, 7, 0, 9, 6, 0, 6, 0} },
111f1df9364SStefan Roese /* DDR3-1866M-ext */
112f1df9364SStefan Roese { {6, 6, 7, 9, 11, 13, 0, 6, 6, 7, 13, 9, 6, 13, 6, 13} },
113f1df9364SStefan Roese };
114f1df9364SStefan Roese
mv_ddr_cl_val_get(u32 index,u32 freq)115ebb1a593SChris Packham u32 mv_ddr_cl_val_get(u32 index, u32 freq)
116ebb1a593SChris Packham {
117ebb1a593SChris Packham return cl_table[index].cl_val[freq];
118ebb1a593SChris Packham }
119ebb1a593SChris Packham
120ebb1a593SChris Packham /* cas write latency values per frequency for each speed bin index */
121ebb1a593SChris Packham static struct mv_ddr_cl_val_per_freq cwl_table[] = {
122f1df9364SStefan Roese /*
123f1df9364SStefan Roese * 400M 667M 933M 311M 467M 600M 360
124f1df9364SStefan Roese * 100M 533M 800M 1066M 333M 850M 900
125f1df9364SStefan Roese * (the order is 100, 400, 533 etc.)
126f1df9364SStefan Roese */
127f1df9364SStefan Roese /* DDR3-800D */
128f1df9364SStefan Roese { {5, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} },
129f1df9364SStefan Roese /* DDR3-800E */
130f1df9364SStefan Roese { {5, 5, 0, 0, 0, 0, 0, 5, 5, 0, 0, 0, 5, 0, 5, 0} },
131f1df9364SStefan Roese /* DDR3-1066E */
132f1df9364SStefan Roese { {5, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
133f1df9364SStefan Roese /* DDR3-1066F */
134f1df9364SStefan Roese { {5, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
135f1df9364SStefan Roese /* DDR3-1066G */
136f1df9364SStefan Roese { {5, 5, 6, 0, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
137f1df9364SStefan Roese /* DDR3-1333F* */
138f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
139f1df9364SStefan Roese /* DDR3-1333G */
140f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
141f1df9364SStefan Roese /* DDR3-1333H */
142f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
143f1df9364SStefan Roese /* DDR3-1333J* */
144f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
145f1df9364SStefan Roese /* DDR3-1600G* */
146f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
147f1df9364SStefan Roese /* DDR3-1600H */
148f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
149f1df9364SStefan Roese /* DDR3-1600J */
150f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
151f1df9364SStefan Roese /* DDR3-1600K */
152f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
153f1df9364SStefan Roese /* DDR3-1866J* */
154f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 0, 5, 0} },
155f1df9364SStefan Roese /* DDR3-1866K */
156f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 0, 5, 0} },
157f1df9364SStefan Roese /* DDR3-1866L */
158f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 9, 5, 9} },
159f1df9364SStefan Roese /* DDR3-1866M* */
160f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 9, 5, 9} },
161f1df9364SStefan Roese /* DDR3-2133K* */
162f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} },
163f1df9364SStefan Roese /* DDR3-2133L */
164f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} },
165f1df9364SStefan Roese /* DDR3-2133M */
166f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} },
167f1df9364SStefan Roese /* DDR3-2133N* */
168f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 10, 5, 5, 6, 9, 7, 5, 9, 5, 10} },
169f1df9364SStefan Roese /* DDR3-1333H-ext */
170f1df9364SStefan Roese { {5, 5, 6, 7, 0, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
171f1df9364SStefan Roese /* DDR3-1600K-ext */
172f1df9364SStefan Roese { {5, 5, 6, 7, 8, 0, 0, 5, 5, 6, 0, 7, 5, 0, 5, 0} },
173f1df9364SStefan Roese /* DDR3-1866M-ext */
174f1df9364SStefan Roese { {5, 5, 6, 7, 8, 9, 0, 5, 5, 6, 9, 7, 5, 9, 5, 9} },
175f1df9364SStefan Roese };
176f1df9364SStefan Roese
mv_ddr_cwl_val_get(u32 index,u32 freq)177ebb1a593SChris Packham u32 mv_ddr_cwl_val_get(u32 index, u32 freq)
178ebb1a593SChris Packham {
179ebb1a593SChris Packham return cwl_table[index].cl_val[freq];
180ebb1a593SChris Packham }
181ebb1a593SChris Packham
182f1df9364SStefan Roese u8 twr_mask_table[] = {
183f1df9364SStefan Roese 10,
184f1df9364SStefan Roese 10,
185f1df9364SStefan Roese 10,
186f1df9364SStefan Roese 10,
187f1df9364SStefan Roese 10,
188f1df9364SStefan Roese 1, /* 5 */
189f1df9364SStefan Roese 2, /* 6 */
190f1df9364SStefan Roese 3, /* 7 */
191672e5598SChris Packham 4, /* 8 */
192f1df9364SStefan Roese 10,
193f1df9364SStefan Roese 5, /* 10 */
194f1df9364SStefan Roese 10,
195f1df9364SStefan Roese 6, /* 12 */
196f1df9364SStefan Roese 10,
197f1df9364SStefan Roese 7, /* 14 */
198f1df9364SStefan Roese 10,
199f1df9364SStefan Roese 0 /* 16 */
200f1df9364SStefan Roese };
201f1df9364SStefan Roese
202f1df9364SStefan Roese u8 cl_mask_table[] = {
203f1df9364SStefan Roese 0,
204f1df9364SStefan Roese 0,
205f1df9364SStefan Roese 0,
206f1df9364SStefan Roese 0,
207f1df9364SStefan Roese 0,
208f1df9364SStefan Roese 0x2,
209f1df9364SStefan Roese 0x4,
210f1df9364SStefan Roese 0x6,
211f1df9364SStefan Roese 0x8,
212f1df9364SStefan Roese 0xa,
213f1df9364SStefan Roese 0xc,
214f1df9364SStefan Roese 0xe,
215f1df9364SStefan Roese 0x1,
216f1df9364SStefan Roese 0x3,
217f1df9364SStefan Roese 0x5,
218f1df9364SStefan Roese 0x5
219f1df9364SStefan Roese };
220f1df9364SStefan Roese
221f1df9364SStefan Roese u8 cwl_mask_table[] = {
222f1df9364SStefan Roese 0,
223f1df9364SStefan Roese 0,
224f1df9364SStefan Roese 0,
225f1df9364SStefan Roese 0,
226f1df9364SStefan Roese 0,
227f1df9364SStefan Roese 0,
228f1df9364SStefan Roese 0x1,
229f1df9364SStefan Roese 0x2,
230f1df9364SStefan Roese 0x3,
231f1df9364SStefan Roese 0x4,
232f1df9364SStefan Roese 0x5,
233f1df9364SStefan Roese 0x6,
234f1df9364SStefan Roese 0x7,
235f1df9364SStefan Roese 0x8,
236f1df9364SStefan Roese 0x9,
237f1df9364SStefan Roese 0x9
238f1df9364SStefan Roese };
239f1df9364SStefan Roese
240f1df9364SStefan Roese /* RFC values (in ns) */
241ebb1a593SChris Packham static unsigned int rfc_table[] = {
242f1df9364SStefan Roese 90, /* 512M */
243f1df9364SStefan Roese 110, /* 1G */
244f1df9364SStefan Roese 160, /* 2G */
245f1df9364SStefan Roese 260, /* 4G */
2462b4ffbf6SChris Packham 350, /* 8G */
2472b4ffbf6SChris Packham 0, /* TODO: placeholder for 16-Mbit dev width */
2482b4ffbf6SChris Packham 0, /* TODO: placeholder for 32-Mbit dev width */
2492b4ffbf6SChris Packham 0, /* TODO: placeholder for 12-Mbit dev width */
2502b4ffbf6SChris Packham 0 /* TODO: placeholder for 24-Mbit dev width */
251f1df9364SStefan Roese };
252f1df9364SStefan Roese
mv_ddr_rfc_get(u32 mem)253ebb1a593SChris Packham u32 mv_ddr_rfc_get(u32 mem)
254ebb1a593SChris Packham {
255ebb1a593SChris Packham return rfc_table[mem];
256ebb1a593SChris Packham }
257ebb1a593SChris Packham
258f1df9364SStefan Roese u32 speed_bin_table_t_rc[] = {
259f1df9364SStefan Roese 50000,
260f1df9364SStefan Roese 52500,
261f1df9364SStefan Roese 48750,
262f1df9364SStefan Roese 50625,
263f1df9364SStefan Roese 52500,
264f1df9364SStefan Roese 46500,
265f1df9364SStefan Roese 48000,
266f1df9364SStefan Roese 49500,
267f1df9364SStefan Roese 51000,
268f1df9364SStefan Roese 45000,
269f1df9364SStefan Roese 46250,
270f1df9364SStefan Roese 47500,
271f1df9364SStefan Roese 48750,
272f1df9364SStefan Roese 44700,
273f1df9364SStefan Roese 45770,
274f1df9364SStefan Roese 46840,
275f1df9364SStefan Roese 47910,
276f1df9364SStefan Roese 43285,
277f1df9364SStefan Roese 44220,
278f1df9364SStefan Roese 45155,
2792b4ffbf6SChris Packham 46090
280f1df9364SStefan Roese };
281f1df9364SStefan Roese
282f1df9364SStefan Roese u32 speed_bin_table_t_rcd_t_rp[] = {
283f1df9364SStefan Roese 12500,
284f1df9364SStefan Roese 15000,
285f1df9364SStefan Roese 11250,
286f1df9364SStefan Roese 13125,
287f1df9364SStefan Roese 15000,
288f1df9364SStefan Roese 10500,
289f1df9364SStefan Roese 12000,
290f1df9364SStefan Roese 13500,
291f1df9364SStefan Roese 15000,
292f1df9364SStefan Roese 10000,
293f1df9364SStefan Roese 11250,
294f1df9364SStefan Roese 12500,
295f1df9364SStefan Roese 13750,
296f1df9364SStefan Roese 10700,
297f1df9364SStefan Roese 11770,
298f1df9364SStefan Roese 12840,
299f1df9364SStefan Roese 13910,
300f1df9364SStefan Roese 10285,
3012b4ffbf6SChris Packham 11220,
302f1df9364SStefan Roese 12155,
303f1df9364SStefan Roese 13090,
304f1df9364SStefan Roese };
305f1df9364SStefan Roese
306f1df9364SStefan Roese enum {
307f1df9364SStefan Roese PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR = 0,
308f1df9364SStefan Roese PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM
309f1df9364SStefan Roese };
310f1df9364SStefan Roese
311f1df9364SStefan Roese static u8 pattern_killer_pattern_table_map[KILLER_PATTERN_LENGTH * 2][2] = {
312f1df9364SStefan Roese /*Aggressor / Victim */
313f1df9364SStefan Roese {1, 0},
314f1df9364SStefan Roese {0, 0},
315f1df9364SStefan Roese {1, 0},
316f1df9364SStefan Roese {1, 1},
317f1df9364SStefan Roese {0, 1},
318f1df9364SStefan Roese {0, 1},
319f1df9364SStefan Roese {1, 0},
320f1df9364SStefan Roese {0, 1},
321f1df9364SStefan Roese {1, 0},
322f1df9364SStefan Roese {0, 1},
323f1df9364SStefan Roese {1, 0},
324f1df9364SStefan Roese {1, 0},
325f1df9364SStefan Roese {0, 1},
326f1df9364SStefan Roese {1, 0},
327f1df9364SStefan Roese {0, 1},
328f1df9364SStefan Roese {0, 0},
329f1df9364SStefan Roese {1, 1},
330f1df9364SStefan Roese {0, 0},
331f1df9364SStefan Roese {1, 1},
332f1df9364SStefan Roese {0, 0},
333f1df9364SStefan Roese {1, 1},
334f1df9364SStefan Roese {0, 0},
335f1df9364SStefan Roese {1, 1},
336f1df9364SStefan Roese {1, 0},
337f1df9364SStefan Roese {0, 0},
338f1df9364SStefan Roese {1, 1},
339f1df9364SStefan Roese {0, 0},
340f1df9364SStefan Roese {1, 1},
341f1df9364SStefan Roese {0, 0},
342f1df9364SStefan Roese {0, 0},
343f1df9364SStefan Roese {0, 0},
344f1df9364SStefan Roese {0, 1},
345f1df9364SStefan Roese {0, 1},
346f1df9364SStefan Roese {1, 1},
347f1df9364SStefan Roese {0, 0},
348f1df9364SStefan Roese {0, 0},
349f1df9364SStefan Roese {1, 1},
350f1df9364SStefan Roese {1, 1},
351f1df9364SStefan Roese {0, 0},
352f1df9364SStefan Roese {1, 1},
353f1df9364SStefan Roese {0, 0},
354f1df9364SStefan Roese {1, 1},
355f1df9364SStefan Roese {1, 1},
356f1df9364SStefan Roese {0, 0},
357f1df9364SStefan Roese {0, 0},
358f1df9364SStefan Roese {1, 1},
359f1df9364SStefan Roese {0, 0},
360f1df9364SStefan Roese {1, 1},
361f1df9364SStefan Roese {0, 1},
362f1df9364SStefan Roese {0, 0},
363f1df9364SStefan Roese {0, 1},
364f1df9364SStefan Roese {0, 1},
365f1df9364SStefan Roese {0, 0},
366f1df9364SStefan Roese {1, 1},
367f1df9364SStefan Roese {1, 1},
368f1df9364SStefan Roese {1, 0},
369f1df9364SStefan Roese {1, 0},
370f1df9364SStefan Roese {1, 1},
371f1df9364SStefan Roese {1, 1},
372f1df9364SStefan Roese {1, 1},
373f1df9364SStefan Roese {1, 1},
374f1df9364SStefan Roese {1, 1},
375f1df9364SStefan Roese {1, 1},
376f1df9364SStefan Roese {1, 1}
377f1df9364SStefan Roese };
378f1df9364SStefan Roese
379f1df9364SStefan Roese static u8 pattern_vref_pattern_table_map[] = {
380f1df9364SStefan Roese /* 1 means 0xffffffff, 0 is 0x0 */
381f1df9364SStefan Roese 0xb8,
382f1df9364SStefan Roese 0x52,
383f1df9364SStefan Roese 0x55,
384f1df9364SStefan Roese 0x8a,
385f1df9364SStefan Roese 0x33,
386f1df9364SStefan Roese 0xa6,
387f1df9364SStefan Roese 0x6d,
388f1df9364SStefan Roese 0xfe
389f1df9364SStefan Roese };
390f1df9364SStefan Roese
391ebb1a593SChris Packham static struct mv_ddr_page_element page_tbl[] = {
392ebb1a593SChris Packham /* 8-bit, 16-bit page size */
393ebb1a593SChris Packham {MV_DDR_PAGE_SIZE_1K, MV_DDR_PAGE_SIZE_2K}, /* 512M */
394ebb1a593SChris Packham {MV_DDR_PAGE_SIZE_1K, MV_DDR_PAGE_SIZE_2K}, /* 1G */
395ebb1a593SChris Packham {MV_DDR_PAGE_SIZE_1K, MV_DDR_PAGE_SIZE_2K}, /* 2G */
396ebb1a593SChris Packham {MV_DDR_PAGE_SIZE_1K, MV_DDR_PAGE_SIZE_2K}, /* 4G */
397ebb1a593SChris Packham {MV_DDR_PAGE_SIZE_2K, MV_DDR_PAGE_SIZE_2K}, /* 8G */
398ebb1a593SChris Packham {0, 0}, /* TODO: placeholder for 16-Mbit die capacity */
399ebb1a593SChris Packham {0, 0}, /* TODO: placeholder for 32-Mbit die capacity */
400ebb1a593SChris Packham {0, 0}, /* TODO: placeholder for 12-Mbit die capacity */
401ebb1a593SChris Packham {0, 0} /* TODO: placeholder for 24-Mbit die capacity */
402ebb1a593SChris Packham };
403ebb1a593SChris Packham
mv_ddr_page_size_get(enum mv_ddr_dev_width bus_width,enum mv_ddr_die_capacity mem_size)404ebb1a593SChris Packham u32 mv_ddr_page_size_get(enum mv_ddr_dev_width bus_width, enum mv_ddr_die_capacity mem_size)
405ebb1a593SChris Packham {
406ebb1a593SChris Packham if (bus_width == MV_DDR_DEV_WIDTH_8BIT)
407ebb1a593SChris Packham return page_tbl[mem_size].page_size_8bit;
408ebb1a593SChris Packham else
409ebb1a593SChris Packham return page_tbl[mem_size].page_size_16bit;
410ebb1a593SChris Packham }
411ebb1a593SChris Packham
412f1df9364SStefan Roese /* Return speed Bin value for selected index and t* element */
mv_ddr_speed_bin_timing_get(enum mv_ddr_speed_bin index,enum mv_ddr_speed_bin_timing element)413ebb1a593SChris Packham unsigned int mv_ddr_speed_bin_timing_get(enum mv_ddr_speed_bin index, enum mv_ddr_speed_bin_timing element)
414f1df9364SStefan Roese {
415f1df9364SStefan Roese u32 result = 0;
416f1df9364SStefan Roese
417f1df9364SStefan Roese switch (element) {
418f1df9364SStefan Roese case SPEED_BIN_TRCD:
419f1df9364SStefan Roese case SPEED_BIN_TRP:
420f1df9364SStefan Roese result = speed_bin_table_t_rcd_t_rp[index];
421f1df9364SStefan Roese break;
422f1df9364SStefan Roese case SPEED_BIN_TRAS:
423*08dcbc98SChris Packham if (index <= SPEED_BIN_DDR_1066G)
424f1df9364SStefan Roese result = 37500;
425*08dcbc98SChris Packham else if (index <= SPEED_BIN_DDR_1333J)
426f1df9364SStefan Roese result = 36000;
427*08dcbc98SChris Packham else if (index <= SPEED_BIN_DDR_1600K)
428f1df9364SStefan Roese result = 35000;
429*08dcbc98SChris Packham else if (index <= SPEED_BIN_DDR_1866M)
430f1df9364SStefan Roese result = 34000;
431f1df9364SStefan Roese else
432f1df9364SStefan Roese result = 33000;
433f1df9364SStefan Roese break;
434f1df9364SStefan Roese case SPEED_BIN_TRC:
435f1df9364SStefan Roese result = speed_bin_table_t_rc[index];
436f1df9364SStefan Roese break;
437f1df9364SStefan Roese case SPEED_BIN_TRRD1K:
438ebb1a593SChris Packham if (index <= SPEED_BIN_DDR_800E)
439f1df9364SStefan Roese result = 10000;
440ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1066G)
4412b4ffbf6SChris Packham result = 7500;
442ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1600K)
443f1df9364SStefan Roese result = 6000;
444f1df9364SStefan Roese else
445f1df9364SStefan Roese result = 5000;
446f1df9364SStefan Roese break;
447f1df9364SStefan Roese case SPEED_BIN_TRRD2K:
448ebb1a593SChris Packham if (index <= SPEED_BIN_DDR_1066G)
449f1df9364SStefan Roese result = 10000;
450ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1600K)
4512b4ffbf6SChris Packham result = 7500;
452f1df9364SStefan Roese else
453f1df9364SStefan Roese result = 6000;
454f1df9364SStefan Roese break;
455f1df9364SStefan Roese case SPEED_BIN_TPD:
4562b4ffbf6SChris Packham if (index < SPEED_BIN_DDR_800E)
457f1df9364SStefan Roese result = 7500;
4582b4ffbf6SChris Packham else if (index < SPEED_BIN_DDR_1333J)
459f1df9364SStefan Roese result = 5625;
460f1df9364SStefan Roese else
461f1df9364SStefan Roese result = 5000;
462f1df9364SStefan Roese break;
463f1df9364SStefan Roese case SPEED_BIN_TFAW1K:
464ebb1a593SChris Packham if (index <= SPEED_BIN_DDR_800E)
465f1df9364SStefan Roese result = 40000;
466ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1066G)
467f1df9364SStefan Roese result = 37500;
468ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1600K)
469f1df9364SStefan Roese result = 30000;
470ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1866M)
471f1df9364SStefan Roese result = 27000;
472f1df9364SStefan Roese else
473f1df9364SStefan Roese result = 25000;
474f1df9364SStefan Roese break;
475f1df9364SStefan Roese case SPEED_BIN_TFAW2K:
476ebb1a593SChris Packham if (index <= SPEED_BIN_DDR_1066G)
477f1df9364SStefan Roese result = 50000;
478ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1333J)
479f1df9364SStefan Roese result = 45000;
480ebb1a593SChris Packham else if (index <= SPEED_BIN_DDR_1600K)
481f1df9364SStefan Roese result = 40000;
482f1df9364SStefan Roese else
483f1df9364SStefan Roese result = 35000;
484f1df9364SStefan Roese break;
485f1df9364SStefan Roese case SPEED_BIN_TWTR:
486f1df9364SStefan Roese result = 7500;
487f1df9364SStefan Roese break;
488f1df9364SStefan Roese case SPEED_BIN_TRTP:
489f1df9364SStefan Roese result = 7500;
490f1df9364SStefan Roese break;
491f1df9364SStefan Roese case SPEED_BIN_TWR:
492f1df9364SStefan Roese result = 15000;
493f1df9364SStefan Roese break;
494f1df9364SStefan Roese case SPEED_BIN_TMOD:
495f1df9364SStefan Roese result = 15000;
496f1df9364SStefan Roese break;
497672e5598SChris Packham case SPEED_BIN_TXPDLL:
498672e5598SChris Packham result = 24000;
499672e5598SChris Packham break;
500ebb1a593SChris Packham case SPEED_BIN_TXSDLL:
501ebb1a593SChris Packham result = 512;
502ebb1a593SChris Packham break;
503f1df9364SStefan Roese default:
504f1df9364SStefan Roese break;
505f1df9364SStefan Roese }
506f1df9364SStefan Roese
507f1df9364SStefan Roese return result;
508f1df9364SStefan Roese }
509f1df9364SStefan Roese
pattern_table_get_killer_word(u8 dqs,u8 index)510f1df9364SStefan Roese static inline u32 pattern_table_get_killer_word(u8 dqs, u8 index)
511f1df9364SStefan Roese {
512f1df9364SStefan Roese u8 i, byte = 0;
513f1df9364SStefan Roese u8 role;
514f1df9364SStefan Roese
515f1df9364SStefan Roese for (i = 0; i < 8; i++) {
516f1df9364SStefan Roese role = (i == dqs) ?
517f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR) :
518f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM);
519f1df9364SStefan Roese byte |= pattern_killer_pattern_table_map[index][role] << i;
520f1df9364SStefan Roese }
521f1df9364SStefan Roese
522f1df9364SStefan Roese return byte | (byte << 8) | (byte << 16) | (byte << 24);
523f1df9364SStefan Roese }
524f1df9364SStefan Roese
pattern_table_get_killer_word16(u8 dqs,u8 index)525f1df9364SStefan Roese static inline u32 pattern_table_get_killer_word16(u8 dqs, u8 index)
526f1df9364SStefan Roese {
527f1df9364SStefan Roese u8 i, byte0 = 0, byte1 = 0;
528f1df9364SStefan Roese u8 role;
529f1df9364SStefan Roese
530f1df9364SStefan Roese for (i = 0; i < 8; i++) {
531f1df9364SStefan Roese role = (i == dqs) ?
532f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_AGGRESSOR) :
533f1df9364SStefan Roese (PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM);
534f1df9364SStefan Roese byte0 |= pattern_killer_pattern_table_map[index * 2][role] << i;
5352b4ffbf6SChris Packham byte1 |= pattern_killer_pattern_table_map[index * 2 + 1][role] << i;
536f1df9364SStefan Roese }
537f1df9364SStefan Roese
538f1df9364SStefan Roese return byte0 | (byte0 << 8) | (byte1 << 16) | (byte1 << 24);
539f1df9364SStefan Roese }
540f1df9364SStefan Roese
pattern_table_get_sso_word(u8 sso,u8 index)541f1df9364SStefan Roese static inline u32 pattern_table_get_sso_word(u8 sso, u8 index)
542f1df9364SStefan Roese {
543f1df9364SStefan Roese u8 step = sso + 1;
544f1df9364SStefan Roese
545f1df9364SStefan Roese if (0 == ((index / step) & 1))
546f1df9364SStefan Roese return 0x0;
547f1df9364SStefan Roese else
548f1df9364SStefan Roese return 0xffffffff;
549f1df9364SStefan Roese }
550f1df9364SStefan Roese
pattern_table_get_sso_full_xtalk_word(u8 bit,u8 index)5512b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word(u8 bit, u8 index)
5522b4ffbf6SChris Packham {
5532b4ffbf6SChris Packham u8 byte = (1 << bit);
5542b4ffbf6SChris Packham
5552b4ffbf6SChris Packham if ((index & 1) == 1)
5562b4ffbf6SChris Packham byte = ~byte;
5572b4ffbf6SChris Packham
5582b4ffbf6SChris Packham return byte | (byte << 8) | (byte << 16) | (byte << 24);
5592b4ffbf6SChris Packham
5602b4ffbf6SChris Packham }
5612b4ffbf6SChris Packham
pattern_table_get_sso_xtalk_free_word(u8 bit,u8 index)5622b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word(u8 bit, u8 index)
5632b4ffbf6SChris Packham {
5642b4ffbf6SChris Packham u8 byte = (1 << bit);
5652b4ffbf6SChris Packham
5662b4ffbf6SChris Packham if ((index & 1) == 1)
5672b4ffbf6SChris Packham byte = 0;
5682b4ffbf6SChris Packham
5692b4ffbf6SChris Packham return byte | (byte << 8) | (byte << 16) | (byte << 24);
5702b4ffbf6SChris Packham }
5712b4ffbf6SChris Packham
pattern_table_get_isi_word(u8 index)5722b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word(u8 index)
5732b4ffbf6SChris Packham {
5742b4ffbf6SChris Packham u8 i0 = index % 32;
5752b4ffbf6SChris Packham u8 i1 = index % 8;
5762b4ffbf6SChris Packham u32 word;
5772b4ffbf6SChris Packham
5782b4ffbf6SChris Packham if (i0 > 15)
5792b4ffbf6SChris Packham word = ((i1 == 5) | (i1 == 7)) ? 0xffffffff : 0x0;
5802b4ffbf6SChris Packham else
5812b4ffbf6SChris Packham word = (i1 == 6) ? 0xffffffff : 0x0;
5822b4ffbf6SChris Packham
5832b4ffbf6SChris Packham word = ((i0 % 16) > 7) ? ~word : word;
5842b4ffbf6SChris Packham
5852b4ffbf6SChris Packham return word;
5862b4ffbf6SChris Packham }
5872b4ffbf6SChris Packham
pattern_table_get_sso_full_xtalk_word16(u8 bit,u8 index)5882b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_full_xtalk_word16(u8 bit, u8 index)
5892b4ffbf6SChris Packham {
5902b4ffbf6SChris Packham u8 byte = (1 << bit);
5912b4ffbf6SChris Packham
5922b4ffbf6SChris Packham if ((index & 1) == 1)
5932b4ffbf6SChris Packham byte = ~byte;
5942b4ffbf6SChris Packham
5952b4ffbf6SChris Packham return byte | (byte << 8) | ((~byte) << 16) | ((~byte) << 24);
5962b4ffbf6SChris Packham }
5972b4ffbf6SChris Packham
pattern_table_get_sso_xtalk_free_word16(u8 bit,u8 index)5982b4ffbf6SChris Packham static inline u32 pattern_table_get_sso_xtalk_free_word16(u8 bit, u8 index)
5992b4ffbf6SChris Packham {
6002b4ffbf6SChris Packham u8 byte = (1 << bit);
6012b4ffbf6SChris Packham
6022b4ffbf6SChris Packham if ((index & 1) == 0)
6032b4ffbf6SChris Packham return (byte << 16) | (byte << 24);
6042b4ffbf6SChris Packham else
6052b4ffbf6SChris Packham return byte | (byte << 8);
6062b4ffbf6SChris Packham }
6072b4ffbf6SChris Packham
pattern_table_get_isi_word16(u8 index)6082b4ffbf6SChris Packham static inline u32 pattern_table_get_isi_word16(u8 index)
6092b4ffbf6SChris Packham {
6102b4ffbf6SChris Packham u8 i0 = index % 16;
6112b4ffbf6SChris Packham u8 i1 = index % 4;
6122b4ffbf6SChris Packham u32 word;
6132b4ffbf6SChris Packham
6142b4ffbf6SChris Packham if (i0 > 7)
6152b4ffbf6SChris Packham word = (i1 > 1) ? 0x0000ffff : 0x0;
6162b4ffbf6SChris Packham else
6172b4ffbf6SChris Packham word = (i1 == 3) ? 0xffff0000 : 0x0;
6182b4ffbf6SChris Packham
6192b4ffbf6SChris Packham word = ((i0 % 8) > 3) ? ~word : word;
6202b4ffbf6SChris Packham
6212b4ffbf6SChris Packham return word;
6222b4ffbf6SChris Packham }
6232b4ffbf6SChris Packham
pattern_table_get_vref_word(u8 index)624f1df9364SStefan Roese static inline u32 pattern_table_get_vref_word(u8 index)
625f1df9364SStefan Roese {
626f1df9364SStefan Roese if (0 == ((pattern_vref_pattern_table_map[index / 8] >>
627f1df9364SStefan Roese (index % 8)) & 1))
628f1df9364SStefan Roese return 0x0;
629f1df9364SStefan Roese else
630f1df9364SStefan Roese return 0xffffffff;
631f1df9364SStefan Roese }
632f1df9364SStefan Roese
pattern_table_get_vref_word16(u8 index)633f1df9364SStefan Roese static inline u32 pattern_table_get_vref_word16(u8 index)
634f1df9364SStefan Roese {
635f1df9364SStefan Roese if (0 == pattern_killer_pattern_table_map
636f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2] &&
637f1df9364SStefan Roese 0 == pattern_killer_pattern_table_map
638f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2 + 1])
639f1df9364SStefan Roese return 0x00000000;
640f1df9364SStefan Roese else if (1 == pattern_killer_pattern_table_map
641f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2] &&
642f1df9364SStefan Roese 0 == pattern_killer_pattern_table_map
643f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2 + 1])
644f1df9364SStefan Roese return 0xffff0000;
645f1df9364SStefan Roese else if (0 == pattern_killer_pattern_table_map
646f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2] &&
647f1df9364SStefan Roese 1 == pattern_killer_pattern_table_map
648f1df9364SStefan Roese [PATTERN_KILLER_PATTERN_TABLE_MAP_ROLE_VICTIM][index * 2 + 1])
649f1df9364SStefan Roese return 0x0000ffff;
650f1df9364SStefan Roese else
651f1df9364SStefan Roese return 0xffffffff;
652f1df9364SStefan Roese }
653f1df9364SStefan Roese
pattern_table_get_static_pbs_word(u8 index)654f1df9364SStefan Roese static inline u32 pattern_table_get_static_pbs_word(u8 index)
655f1df9364SStefan Roese {
656f1df9364SStefan Roese u16 temp;
657f1df9364SStefan Roese
658f1df9364SStefan Roese temp = ((0x00ff << (index / 3)) & 0xff00) >> 8;
659f1df9364SStefan Roese
660f1df9364SStefan Roese return temp | (temp << 8) | (temp << 16) | (temp << 24);
661f1df9364SStefan Roese }
662f1df9364SStefan Roese
pattern_table_get_word(u32 dev_num,enum hws_pattern type,u8 index)6632b4ffbf6SChris Packham u32 pattern_table_get_word(u32 dev_num, enum hws_pattern type, u8 index)
664f1df9364SStefan Roese {
665ebb1a593SChris Packham u32 pattern = 0;
6662b4ffbf6SChris Packham struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
667f1df9364SStefan Roese
668f1df9364SStefan Roese if (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask) == 0) {
6692b4ffbf6SChris Packham /* 32/64-bit patterns */
670f1df9364SStefan Roese switch (type) {
671f1df9364SStefan Roese case PATTERN_PBS1:
672f1df9364SStefan Roese case PATTERN_PBS2:
673f1df9364SStefan Roese if (index == 0 || index == 2 || index == 5 ||
674f1df9364SStefan Roese index == 7)
675f1df9364SStefan Roese pattern = PATTERN_55;
676f1df9364SStefan Roese else
677f1df9364SStefan Roese pattern = PATTERN_AA;
678f1df9364SStefan Roese break;
679f1df9364SStefan Roese case PATTERN_PBS3:
680f1df9364SStefan Roese if (0 == (index & 1))
681f1df9364SStefan Roese pattern = PATTERN_55;
682f1df9364SStefan Roese else
683f1df9364SStefan Roese pattern = PATTERN_AA;
684f1df9364SStefan Roese break;
685f1df9364SStefan Roese case PATTERN_RL:
686f1df9364SStefan Roese if (index < 6)
687f1df9364SStefan Roese pattern = PATTERN_00;
688f1df9364SStefan Roese else
689f1df9364SStefan Roese pattern = PATTERN_80;
690f1df9364SStefan Roese break;
691f1df9364SStefan Roese case PATTERN_STATIC_PBS:
692f1df9364SStefan Roese pattern = pattern_table_get_static_pbs_word(index);
693f1df9364SStefan Roese break;
694f1df9364SStefan Roese case PATTERN_KILLER_DQ0:
695f1df9364SStefan Roese case PATTERN_KILLER_DQ1:
696f1df9364SStefan Roese case PATTERN_KILLER_DQ2:
697f1df9364SStefan Roese case PATTERN_KILLER_DQ3:
698f1df9364SStefan Roese case PATTERN_KILLER_DQ4:
699f1df9364SStefan Roese case PATTERN_KILLER_DQ5:
700f1df9364SStefan Roese case PATTERN_KILLER_DQ6:
701f1df9364SStefan Roese case PATTERN_KILLER_DQ7:
702f1df9364SStefan Roese pattern = pattern_table_get_killer_word(
703f1df9364SStefan Roese (u8)(type - PATTERN_KILLER_DQ0), index);
704f1df9364SStefan Roese break;
705f1df9364SStefan Roese case PATTERN_RL2:
706f1df9364SStefan Roese if (index < 6)
707f1df9364SStefan Roese pattern = PATTERN_00;
708f1df9364SStefan Roese else
709f1df9364SStefan Roese pattern = PATTERN_01;
710f1df9364SStefan Roese break;
711f1df9364SStefan Roese case PATTERN_TEST:
712f1df9364SStefan Roese if (index > 1 && index < 6)
713f1df9364SStefan Roese pattern = PATTERN_00;
7142b4ffbf6SChris Packham else
7152b4ffbf6SChris Packham pattern = PATTERN_FF;
716f1df9364SStefan Roese break;
717f1df9364SStefan Roese case PATTERN_FULL_SSO0:
718f1df9364SStefan Roese case PATTERN_FULL_SSO1:
719f1df9364SStefan Roese case PATTERN_FULL_SSO2:
720f1df9364SStefan Roese case PATTERN_FULL_SSO3:
721f1df9364SStefan Roese pattern = pattern_table_get_sso_word(
722f1df9364SStefan Roese (u8)(type - PATTERN_FULL_SSO0), index);
723f1df9364SStefan Roese break;
724f1df9364SStefan Roese case PATTERN_VREF:
725f1df9364SStefan Roese pattern = pattern_table_get_vref_word(index);
726f1df9364SStefan Roese break;
7272b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ0:
7282b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ1:
7292b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ2:
7302b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ3:
7312b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ4:
7322b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ5:
7332b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ6:
7342b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ7:
7352b4ffbf6SChris Packham pattern = pattern_table_get_sso_full_xtalk_word(
7362b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_FULL_XTALK_DQ0), index);
7372b4ffbf6SChris Packham break;
7382b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ0:
7392b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ1:
7402b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ2:
7412b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ3:
7422b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ4:
7432b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ5:
7442b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ6:
7452b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ7:
7462b4ffbf6SChris Packham pattern = pattern_table_get_sso_xtalk_free_word(
7472b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_XTALK_FREE_DQ0), index);
7482b4ffbf6SChris Packham break;
7492b4ffbf6SChris Packham case PATTERN_ISI_XTALK_FREE:
7502b4ffbf6SChris Packham pattern = pattern_table_get_isi_word(index);
7512b4ffbf6SChris Packham break;
752f1df9364SStefan Roese default:
753ebb1a593SChris Packham printf("error: %s: unsupported pattern type [%d] found\n",
754ebb1a593SChris Packham __func__, (int)type);
755f1df9364SStefan Roese pattern = 0;
756f1df9364SStefan Roese break;
757f1df9364SStefan Roese }
758f1df9364SStefan Roese } else {
759f1df9364SStefan Roese /* 16bit patterns */
760f1df9364SStefan Roese switch (type) {
761f1df9364SStefan Roese case PATTERN_PBS1:
762f1df9364SStefan Roese case PATTERN_PBS2:
763f1df9364SStefan Roese case PATTERN_PBS3:
764f1df9364SStefan Roese pattern = PATTERN_55AA;
765f1df9364SStefan Roese break;
766f1df9364SStefan Roese case PATTERN_RL:
767f1df9364SStefan Roese if (index < 3)
768f1df9364SStefan Roese pattern = PATTERN_00;
769f1df9364SStefan Roese else
770f1df9364SStefan Roese pattern = PATTERN_80;
771f1df9364SStefan Roese break;
772f1df9364SStefan Roese case PATTERN_STATIC_PBS:
773f1df9364SStefan Roese pattern = PATTERN_00FF;
774f1df9364SStefan Roese break;
775f1df9364SStefan Roese case PATTERN_KILLER_DQ0:
776f1df9364SStefan Roese case PATTERN_KILLER_DQ1:
777f1df9364SStefan Roese case PATTERN_KILLER_DQ2:
778f1df9364SStefan Roese case PATTERN_KILLER_DQ3:
779f1df9364SStefan Roese case PATTERN_KILLER_DQ4:
780f1df9364SStefan Roese case PATTERN_KILLER_DQ5:
781f1df9364SStefan Roese case PATTERN_KILLER_DQ6:
782f1df9364SStefan Roese case PATTERN_KILLER_DQ7:
783f1df9364SStefan Roese pattern = pattern_table_get_killer_word16(
784f1df9364SStefan Roese (u8)(type - PATTERN_KILLER_DQ0), index);
785f1df9364SStefan Roese break;
786f1df9364SStefan Roese case PATTERN_RL2:
787f1df9364SStefan Roese if (index < 3)
788f1df9364SStefan Roese pattern = PATTERN_00;
789f1df9364SStefan Roese else
790f1df9364SStefan Roese pattern = PATTERN_01;
791f1df9364SStefan Roese break;
792f1df9364SStefan Roese case PATTERN_TEST:
7932b4ffbf6SChris Packham if ((index == 0) || (index == 3))
7942b4ffbf6SChris Packham pattern = 0x00000000;
7952b4ffbf6SChris Packham else
7962b4ffbf6SChris Packham pattern = 0xFFFFFFFF;
797f1df9364SStefan Roese break;
798f1df9364SStefan Roese case PATTERN_FULL_SSO0:
799f1df9364SStefan Roese pattern = 0x0000ffff;
800f1df9364SStefan Roese break;
801f1df9364SStefan Roese case PATTERN_FULL_SSO1:
802f1df9364SStefan Roese case PATTERN_FULL_SSO2:
803f1df9364SStefan Roese case PATTERN_FULL_SSO3:
804f1df9364SStefan Roese pattern = pattern_table_get_sso_word(
805f1df9364SStefan Roese (u8)(type - PATTERN_FULL_SSO1), index);
806f1df9364SStefan Roese break;
807f1df9364SStefan Roese case PATTERN_VREF:
808f1df9364SStefan Roese pattern = pattern_table_get_vref_word16(index);
809f1df9364SStefan Roese break;
8102b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ0:
8112b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ1:
8122b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ2:
8132b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ3:
8142b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ4:
8152b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ5:
8162b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ6:
8172b4ffbf6SChris Packham case PATTERN_SSO_FULL_XTALK_DQ7:
8182b4ffbf6SChris Packham pattern = pattern_table_get_sso_full_xtalk_word16(
8192b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_FULL_XTALK_DQ0), index);
8202b4ffbf6SChris Packham break;
8212b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ0:
8222b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ1:
8232b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ2:
8242b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ3:
8252b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ4:
8262b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ5:
8272b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ6:
8282b4ffbf6SChris Packham case PATTERN_SSO_XTALK_FREE_DQ7:
8292b4ffbf6SChris Packham pattern = pattern_table_get_sso_xtalk_free_word16(
8302b4ffbf6SChris Packham (u8)(type - PATTERN_SSO_XTALK_FREE_DQ0), index);
8312b4ffbf6SChris Packham break;
8322b4ffbf6SChris Packham case PATTERN_ISI_XTALK_FREE:
8332b4ffbf6SChris Packham pattern = pattern_table_get_isi_word16(index);
8342b4ffbf6SChris Packham break;
835f1df9364SStefan Roese default:
836ebb1a593SChris Packham printf("error: %s: unsupported pattern type [%d] found\n",
837ebb1a593SChris Packham __func__, (int)type);
838f1df9364SStefan Roese pattern = 0;
839f1df9364SStefan Roese break;
840f1df9364SStefan Roese }
841f1df9364SStefan Roese }
842f1df9364SStefan Roese
843f1df9364SStefan Roese return pattern;
844f1df9364SStefan Roese }
8452b4ffbf6SChris Packham
8462b4ffbf6SChris Packham /* Device attribute functions */
ddr3_tip_dev_attr_init(u32 dev_num)8472b4ffbf6SChris Packham void ddr3_tip_dev_attr_init(u32 dev_num)
8482b4ffbf6SChris Packham {
8492b4ffbf6SChris Packham u32 attr_id;
8502b4ffbf6SChris Packham
8512b4ffbf6SChris Packham for (attr_id = 0; attr_id < MV_ATTR_LAST; attr_id++)
852ebb1a593SChris Packham ddr_dev_attributes[attr_id] = 0xFF;
8532b4ffbf6SChris Packham
854ebb1a593SChris Packham ddr_dev_attr_init_done = 1;
8552b4ffbf6SChris Packham }
8562b4ffbf6SChris Packham
ddr3_tip_dev_attr_get(u32 dev_num,enum mv_ddr_dev_attribute attr_id)8572b4ffbf6SChris Packham u32 ddr3_tip_dev_attr_get(u32 dev_num, enum mv_ddr_dev_attribute attr_id)
8582b4ffbf6SChris Packham {
859ebb1a593SChris Packham if (ddr_dev_attr_init_done == 0)
8602b4ffbf6SChris Packham ddr3_tip_dev_attr_init(dev_num);
8612b4ffbf6SChris Packham
862ebb1a593SChris Packham return ddr_dev_attributes[attr_id];
8632b4ffbf6SChris Packham }
8642b4ffbf6SChris Packham
ddr3_tip_dev_attr_set(u32 dev_num,enum mv_ddr_dev_attribute attr_id,u32 value)8652b4ffbf6SChris Packham void ddr3_tip_dev_attr_set(u32 dev_num, enum mv_ddr_dev_attribute attr_id, u32 value)
8662b4ffbf6SChris Packham {
867ebb1a593SChris Packham if (ddr_dev_attr_init_done == 0)
8682b4ffbf6SChris Packham ddr3_tip_dev_attr_init(dev_num);
8692b4ffbf6SChris Packham
870ebb1a593SChris Packham ddr_dev_attributes[attr_id] = value;
8712b4ffbf6SChris Packham }
872