Searched +full:0 +full:xf0801000 (Results 1 – 9 of 9) sorted by relevance
22 reg = <0x0 0xf0800000 0x0 0x1000>;27 reg = <0x0 0xdfff9000 0x0 0x1000>,28 <0x0 0xdfffa000 0x0 0x2000>,29 <0x0 0xdfffc000 0x0 0x2000>,30 <0x0 0xdfffe000 0x0 0x2000>;34 #address-cells = <0>;36 ppi_cluster0: interrupt-partition-0 {52 reg = <0x0 0xf0801000 0x0 0x78>;60 reg = <0x0 0xf0801000 0x0 0x1000>;68 ranges = <0x0 0x0 0xf0000000 0x00300000>,[all …]
45 reg = <0x0 0xf0801000 0x0 0x1000>;
35 reg = <0xf0801000 0x1000>;45 #clock-cells = <0>;53 #clock-cells = <0>;61 #clock-cells = <0>;69 #clock-cells = <0>;77 #clock-cells = <0>;84 #clock-cells = <0>;95 reg = <0xf0802000 0x2000>;96 interrupts = <0 14 4>;
7 #define UART_CR_OFFSET 0x00 /* Control Register [8:0] */8 #define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */9 #define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */11 #define UART_SR_TXFULL 0x00000010 /* TX FIFO full */12 #define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */14 #define UART0_PHYS 0xE000000015 #define UART0_VIRT 0xF080000016 #define UART1_PHYS 0xE000100017 #define UART1_VIRT 0xF0801000
67 reg = <0xf0801000 0x70>;
17 #clock-cells = <0>;25 #clock-cells = <0>;33 #clock-cells = <0>;41 #clock-cells = <0>;49 #clock-cells = <0>;56 #clock-cells = <0>;66 ranges = <0x0 0xf0000000 0x00900000>;70 reg = <0x3fe000 0x1000>;75 reg = <0x3fc000 0x1000>;87 reg = <0x3ff000 0x1000>,[all …]
42 reg = <0 0xb2000000 0 0x1800000>;47 reg = <0 0x8c415000 0 0x2000>;52 reg = <0 0x8c400000 0 0x10000>;57 reg = <0 0x8c500000 0 0x1e00000>;62 reg = <0 0x8e300000 0 0x100000>;67 reg = <0 0x8e400000 0 0x8900000>;72 reg = <0 0x96d00000 0 0x500000>;77 reg = <0 0x97200000 0 0x800000>;82 reg = <0 0x97a00000 0 0x200000>;87 reg = <0 0x97c00000 0 0x1400000>;[all …]
28 #define CH_EN BIT(0)33 #define PPR 0x0034 #define CSR 0x0435 #define PCR 0x0836 #define PIER 0x3c37 #define PIIR 0x4040 #define CLK_BA 0xf080100041 #define CLKSEL 0x0442 #define CLKDIV1 0x0843 #define CLKDIV2 0x2c[all …]
36 #define NPCM7XX_MMIO_BA (0x80000000)37 #define NPCM7XX_MMIO_SZ (0x7ffd0000)40 #define NPCM7XX_OTP1_BA (0xf0189000)41 #define NPCM7XX_OTP2_BA (0xf018a000)44 #define NPCM7XX_L2C_BA (0xf03fc000)45 #define NPCM7XX_CPUP_BA (0xf03fe000)46 #define NPCM7XX_GCR_BA (0xf0800000)47 #define NPCM7XX_CLK_BA (0xf0801000)48 #define NPCM7XX_MC_BA (0xf0824000)49 #define NPCM7XX_RNG_BA (0xf000b000)[all …]