Searched +full:0 +full:xe0200000 (Results 1 – 14 of 14) sorted by relevance
/openbmc/u-boot/arch/arm/dts/ |
H A D | s5pc1xx-smdkc100.dts | 25 reg = <0xe0200000 0x1000>; 30 reg = <0xec000000 0x100>; 31 interrupts = <0 51 0>; 32 id = <0>;
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H A D | s5pc1xx-goni.dts | 26 reg = <0xe0200000 0x1000>; 31 reg = <0xe2900800 0x400>; 37 gpios = <&gpj4 0 0>, /* sda */ 38 <&gpj4 3 0>; /* scl */ 41 #size-cells = <0>; 46 reg = <0x66 0 0>;
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/openbmc/u-boot/arch/arm/mach-s5pc1xx/ |
H A D | reset.S | 10 #define S5PC100_SWRESET 0xE0200000 11 #define S5PC110_SWRESET 0xE0102000 16 ldr r4, =0x00010000 18 cmp r4, #0 22 ldr r2, =0xC100
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/openbmc/linux/Documentation/devicetree/bindings/clock/ |
H A D | intel,cgu-lgm.yaml | 42 reg = <0xe0200000 0x33c>;
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/openbmc/linux/Documentation/devicetree/bindings/phy/ |
H A D | intel,lgm-emmc-phy.yaml | 31 const: 0 55 reg = <0xe0200000 0x100>; 61 reg = <0x00a8 0x10>; 63 #phy-cells = <0>; 70 reg = <0x20290000 0x54>; 73 #phy-cells = <0>;
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/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
H A D | cpu.h | 12 #define S5PC1XX_ADDR_BASE 0xE0000000 15 #define S5PC100_PRO_ID 0xE0000000 16 #define S5PC100_CLOCK_BASE 0xE0100000 17 #define S5PC100_GPIO_BASE 0xE0300000 18 #define S5PC100_VIC0_BASE 0xE4000000 19 #define S5PC100_VIC1_BASE 0xE4100000 20 #define S5PC100_VIC2_BASE 0xE4200000 21 #define S5PC100_DMC_BASE 0xE6000000 22 #define S5PC100_SROMC_BASE 0xE7000000 23 #define S5PC100_ONENAND_BASE 0xE7100000 [all …]
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/openbmc/u-boot/arch/riscv/dts/ |
H A D | ae350_64.dts | 21 #size-cells = <0>; 23 CPU0: cpu@0 { 25 reg = <0>; 31 d-cache-size = <0x8000>; 41 memory@0 { 43 reg = <0x0 0x00000000 0x0 0x40000000>; 57 reg = <0x0 0xe4000000 0x0 0x2000000>; 67 reg = <0x0 0xe6400000 0x0 0x400000>; 75 reg = <0x0 0xe6000000 0x0 0x100000>; 80 #clock-cells = <0>; [all …]
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H A D | ae350_32.dts | 21 #size-cells = <0>; 23 CPU0: cpu@0 { 25 reg = <0>; 31 d-cache-size = <0x8000>; 41 memory@0 { 43 reg = <0x00000000 0x40000000>; 57 reg = <0xe4000000 0x2000000>; 67 reg = <0xe6400000 0x400000>; 75 reg = <0xe6000000 0x100000>; 80 #clock-cells = <0>; [all …]
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/openbmc/linux/arch/arm/boot/dts/st/ |
H A D | spear13xx.dtsi | 15 #size-cells = <0>; 17 cpu@0 { 20 reg = <0>; 36 reg = < 0xec801000 0x1000 >, 37 < 0xec800100 0x0100 >; 42 interrupts = <0 6 0x04>, 43 <0 7 0x04>; 48 reg = <0xed000000 0x1000>; 56 reg = <0 0x40000000>; 79 ranges = <0x50000000 0x50000000 0x10000000 [all …]
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/openbmc/linux/arch/arm64/boot/dts/amd/ |
H A D | amd-seattle-soc.dtsi | 20 reg = <0x0 0xe1110000 0 0x1000>, 21 <0x0 0xe112f000 0 0x2000>, 22 <0x0 0xe1140000 0 0x2000>, 23 <0x0 0xe1160000 0 0x2000>; 24 interrupts = <1 9 0xf04>; 25 ranges = <0 0 0 0xe1100000 0 0x100000>; 29 reg = <0x0 0x00080000 0 0x1000>; 35 interrupts = <1 13 0xff04>, 36 <1 14 0xff04>, 37 <1 11 0xff04>, [all …]
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/openbmc/linux/arch/powerpc/boot/dts/ |
H A D | ac14xx.dts | 25 PowerPC,5121@0 { 33 reg = <0x00000000 0x10000000>; /* 256MB at 0 */ 41 ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */ 42 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */ 43 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */ 44 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */ 45 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */ 46 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */ 48 flash@0,0 { 50 reg = <0 0x00000000 0x04000000>; [all …]
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/openbmc/u-boot/board/samsung/goni/ |
H A D | lowlevel_init.S | 18 * r7 has S5PC100 GPIO base, 0xE0300000 19 * r8 has real GPIO base, 0xE0300000, 0xE0200000 at S5PC100, S5PC110 repectively 28 mov r5, #0 35 mov r1, #0x00010000 47 and r1, r1, #0x000D0000 48 cmp r1, #(0x1 << 19) @ DEEPIDLE_WAKEUP 53 addeq r0, r8, #0x280 @ S5PC100_GPIO_J4 54 addne r0, r8, #0x2C0 @ S5PC110_GPIO_J4 55 ldr r1, [r0, #0x0] @ GPIO_CON_OFFSET 56 bic r1, r1, #(0xf << 4) @ 1 * 4-bit [all …]
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/openbmc/linux/arch/arm/boot/dts/samsung/ |
H A D | s5pv210.dtsi | 46 #size-cells = <0>; 48 cpu@0 { 51 reg = <0>; 55 xxti: oscillator-0 { 57 clock-frequency = <0>; 59 #clock-cells = <0>; 64 clock-frequency = <0>; 66 #clock-cells = <0>; 77 reg = <0xb0600000 0x2000>, 78 <0xb0000000 0x20000>, [all …]
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/openbmc/qemu/hw/arm/ |
H A D | mps3r.c | 83 #define PERIPHBASE 0xf0000000 136 .base = 0x00000000, 137 .size = 0x00008000, 138 .mrindex = 0, 142 .base = 0x08000000, 143 .size = 0x00800000, 148 .base = 0x10000000, 149 .size = 0x00080000, 153 .base = 0x20000000, 158 .base = 0xee000000, [all …]
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