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/openbmc/linux/Documentation/devicetree/bindings/regulator/
H A Dst,stm32mp1-pwr-reg.yaml41 reg = <0x50001000 0x10>;
/openbmc/u-boot/arch/arm/mach-stm32mp/include/mach/
H A Dstm32.h13 #define STM32_RCC_BASE 0x50000000
14 #define STM32_PWR_BASE 0x50001000
15 #define STM32_DBGMCU_BASE 0x50081000
16 #define STM32_BSEC_BASE 0x5C005000
17 #define STM32_TZC_BASE 0x5C006000
18 #define STM32_ETZPC_BASE 0x5C007000
19 #define STM32_TAMP_BASE 0x5C00A000
23 #define STM32_USART1_BASE 0x5C000000
24 #define STM32_USART2_BASE 0x4000E000
25 #define STM32_USART3_BASE 0x4000F000
[all …]
/openbmc/linux/arch/arm64/boot/dts/bitmain/
H A Dbm1880.dtsi19 #size-cells = <0>;
21 cpu0: cpu@0 {
24 reg = <0x0>;
31 reg = <0x1>;
42 reg = <0x1 0x00000000 0x0 0x20000>;
47 reg = <0x1 0x30000000 0x0 0x08000000>; // 128M
52 reg = <0x1 0x38000000 0x0 0x08000000>; // 128M
73 #clock-cells = <0>;
84 reg = <0x0 0x50001000 0x0 0x1000>,
85 <0x0 0x50002000 0x0 0x2000>;
[all …]
/openbmc/openpower-hw-diags/util/
H A Ddbus.cpp17 constexpr uint8_t terminusIdZero = 0;
35 method.append(std::string{"/"}, 0, in find()
50 rc = 0; // success in find()
93 rc = 0; // success in findService()
130 rc = 0; // success in getProperty()
154 if (0 == find(interface, path, service)) in systemNames()
161 if (0 == getProperty(interface, path, service, property, value)) in systemNames()
177 std::string target = "obmc-host-quiesce@0.target"; // quiesce is default in transitionHost()
182 target = "obmc-host-crash@0.target"; in transitionHost()
191 target = "obmc-chassis-hard-poweroff@0.target"; in transitionHost()
[all …]
/openbmc/linux/arch/arm/boot/dts/renesas/
H A Dr9a06g032.dtsi19 #size-cells = <0>;
21 cpu@0 {
24 reg = <0>;
34 cpu-release-addr = <0 0x4000c204>;
39 #clock-cells = <0>;
41 clock-frequency = <0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
[all …]
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32h743.dtsi54 #clock-cells = <0>;
56 clock-frequency = <0>;
60 #clock-cells = <0>;
66 #clock-cells = <0>;
68 clock-frequency = <0>;
75 reg = <0x40000c00 0x400>;
82 #size-cells = <0>;
84 reg = <0x40002400 0x400>;
95 trigger@0 {
97 reg = <0>;
[all …]
H A Dstm32mp151.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
22 reg = <0>;
42 reg = <0xa0021000 0x1000>,
43 <0xa0022000 0x2000>;
58 #clock-cells = <0>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
76 #clock-cells = <0>;
82 #clock-cells = <0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dstm32mp157c.dtsi16 #size-cells = <0>;
18 cpu0: cpu@0 {
21 reg = <0>;
34 cpu_off = <0x84000002>;
35 cpu_on = <0x84000003>;
64 reg = <0xa0021000 0x1000>,
65 <0xa0022000 0x2000>;
79 #clock-cells = <0>;
85 #clock-cells = <0>;
91 #clock-cells = <0>;
[all …]