Lines Matching +full:0 +full:x50001000
13 #define STM32_RCC_BASE 0x50000000
14 #define STM32_PWR_BASE 0x50001000
15 #define STM32_DBGMCU_BASE 0x50081000
16 #define STM32_BSEC_BASE 0x5C005000
17 #define STM32_TZC_BASE 0x5C006000
18 #define STM32_ETZPC_BASE 0x5C007000
19 #define STM32_TAMP_BASE 0x5C00A000
23 #define STM32_USART1_BASE 0x5C000000
24 #define STM32_USART2_BASE 0x4000E000
25 #define STM32_USART3_BASE 0x4000F000
26 #define STM32_UART4_BASE 0x40010000
27 #define STM32_UART5_BASE 0x40011000
28 #define STM32_USART6_BASE 0x44003000
29 #define STM32_UART7_BASE 0x40018000
30 #define STM32_UART8_BASE 0x40019000
33 #define STM32_SYSRAM_BASE 0x2FFC0000
36 #define STM32_DDR_BASE 0xC0000000
50 * - boot instance = bit 3:0
52 #define BOOT_TYPE_MASK 0xF0
54 #define BOOT_INSTANCE_MASK 0x0F
55 #define BOOT_INSTANCE_SHIFT 0
58 BOOT_FLASH_SD = 0x10,
59 BOOT_FLASH_SD_1 = 0x11,
60 BOOT_FLASH_SD_2 = 0x12,
61 BOOT_FLASH_SD_3 = 0x13,
63 BOOT_FLASH_EMMC = 0x20,
64 BOOT_FLASH_EMMC_1 = 0x21,
65 BOOT_FLASH_EMMC_2 = 0x22,
66 BOOT_FLASH_EMMC_3 = 0x23,
68 BOOT_FLASH_NAND = 0x30,
69 BOOT_FLASH_NAND_FMC = 0x31,
71 BOOT_FLASH_NOR = 0x40,
72 BOOT_FLASH_NOR_QSPI = 0x41,
74 BOOT_SERIAL_UART = 0x50,
75 BOOT_SERIAL_UART_1 = 0x51,
76 BOOT_SERIAL_UART_2 = 0x52,
77 BOOT_SERIAL_UART_3 = 0x53,
78 BOOT_SERIAL_UART_4 = 0x54,
79 BOOT_SERIAL_UART_5 = 0x55,
80 BOOT_SERIAL_UART_6 = 0x56,
81 BOOT_SERIAL_UART_7 = 0x57,
82 BOOT_SERIAL_UART_8 = 0x58,
84 BOOT_SERIAL_USB = 0x60,
85 BOOT_SERIAL_USB_OTG = 0x62,
89 #define TAMP_BACKUP_REGISTER(x) (STM32_TAMP_BASE + 0x100 + 4 * x)
97 #define TAMP_BOOT_INSTANCE_MASK GENMASK(3, 0)
100 #define STM32_BSEC_SHADOW_OFFSET 0x0
101 #define STM32_BSEC_OTP_OFFSET 0x80000000