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/openbmc/u-boot/tools/binman/etype/
H A Dgbb.py20 'dev-screen-short-delay': 0x1,
21 'load-option-roms': 0x2,
22 'enable-alternate-os': 0x4,
23 'force-dev-switch-on': 0x8,
24 'force-dev-boot-usb': 0x10,
25 'disable-fw-rollback-check': 0x20,
26 'enter-triggers-tonorm': 0x40,
27 'force-dev-boot-legacy': 0x80,
28 'faft-key-override': 0x100,
29 'disable-ec-software-sync': 0x200,
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51-zii-rdu1.dts21 reg = <0x90000000 0>;
31 #clock-cells = <0>;
38 pinctrl-0 = <&pinctrl_clk26mhz>;
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_usbgate26mhz>;
49 #clock-cells = <0>;
56 pinctrl-0 = <&pinctrl_sndgate26mhz>;
58 #clock-cells = <0>;
81 pinctrl-0 = <&pinctrl_ipu_disp1>;
84 #size-cells = <0>;
[all …]
H A Dimx51-zii-scu3-esb.dts22 reg = <0x90000000 0>;
32 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
44 pinctrl-0 = <&pinctrl_ecspi1>;
49 pmic@0 {
52 pinctrl-0 = <&pinctrl_pmic>;
55 reg = <0>;
153 #size-cells = <0>;
154 led-control = <0x0 0x0 0x3f83f8 0x0>;
181 pinctrl-0 = <&pinctrl_esdhc1>;
192 pinctrl-0 = <&pinctrl_esdhc4>;
[all …]
H A Dimx51-zii-scu2-mezz.dts22 reg = <0x90000000 0>;
32 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
43 pinctrl-0 = <&pinctrl_swmdio>;
47 #size-cells = <0>;
49 switch@0 {
51 reg = <0>;
52 dsa,member = <0 0>;
61 #size-cells = <0>;
63 port@0 {
64 reg = <0>;
[all …]
/openbmc/u-boot/tools/binman/test/
H A D071_gbb.dts10 size = <0x2180>;
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Domap3-overo-alto35-common.dtsi19 pinctrl-0 = <&led_pins>;
41 #size-cells = <0>;
43 pinctrl-0 = <&button_pins>;
56 OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE4) /* uart1_tx.gpio_148 */
57 OMAP3_CORE1_IOPAD(0x2180, PIN_OUTPUT | MUX_MODE4) /* uart1_cts.gpio_150 */
58 OMAP3_CORE1_IOPAD(0x2182, PIN_OUTPUT | MUX_MODE4) /* uart1_rx.gpio_151 */
59 OMAP3_CORE1_IOPAD(0x21c6, PIN_OUTPUT | MUX_MODE4) /* hdq_sio.gpio_170 */
67 OMAP3_WKUP_IOPAD(0x2a18, PIN_INPUT | MUX_MODE4) /* sys_clkout1.gpio_10 */
H A Domap3-n950-n9.dtsi12 cpu@0 {
19 reg = <0x80000000 0x40000000>; /* 1 GB */
47 pinctrl-0 = <&debug_leds>;
54 #clock-cells = <0>;
62 OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT | MUX_MODE4) /* mcspi2_somi.gpio_180 -> LIS302 INT1 */
63 OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT | MUX_MODE4) /* mcspi2_cs0.gpio_181 -> LIS302 INT2 */
69 OMAP3_CORE1_IOPAD(0x2108, PIN_OUTPUT | MUX_MODE4) /* dss_data22.gpio_92 */
75 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk */
76 OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_cmd */
77 OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0 */
[all …]
H A Domap3-zoom3.dts15 cpu@0 {
22 reg = <0x80000000 0x20000000>; /* 512 MB */
39 pinctrl-0 = <&wl12xx_gpio>;
54 OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */
55 OMAP3_CORE1_IOPAD(0x2146, PIN_OUTPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */
56 OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
57 OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */
58 OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */
59 OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */
65 OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_clk.sdmmc2_clk */
[all …]
H A Domap3-evm-processor-common.dtsi8 reg = <0x80000000 0x10000000>; /* 256 MB */
13 pinctrl-0 = <&wl12xx_gpio>;
21 pinctrl-0 = <
29 pinctrl-0 = <&ehci_phy_pins>;
34 pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
38 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
39 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
40 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
41 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
43 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
[all …]
/openbmc/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray-pcie.dtsi8 reg = <0 0x60400000 0 0x1000>;
11 bus-range = <0x0 0x1>;
16 ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
20 msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
21 <0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
22 <0x101 &gic_its 0x2080 0x1>, /* PF1 */
23 <0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
24 <0x102 &gic_its 0x2100 0x1>, /* PF2 */
25 <0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
26 <0x103 &gic_its 0x2180 0x1>, /* PF3 */
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/reg_srcs/
H A Dr2001 r200 0x3294
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Drv5151 rv515 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Dr3001 r300 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Drs6001 rs600 0x6d40
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
H A Dr4201 r420 0x4f60
2 0x1434 SRC_Y_X
3 0x1438 DST_Y_X
4 0x143C DST_HEIGHT_WIDTH
5 0x146C DP_GUI_MASTER_CNTL
6 0x1474 BRUSH_Y_X
7 0x1478 DP_BRUSH_BKGD_CLR
8 0x147C DP_BRUSH_FRGD_CLR
9 0x1480 BRUSH_DATA0
10 0x1484 BRUSH_DATA1
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Dqcom,sc7280-venus.yaml102 reg = <0x0aa00000 0xd0600>;
118 interconnects = <&gem_noc MASTER_APPSS_PROC 0 &cnoc2 SLAVE_VENUS_CFG 0>,
119 <&mmss_noc MASTER_VIDEO_P0 0 &mc_virt SLAVE_EBI1 0>;
122 iommus = <&apps_smmu 0x2180 0x20>,
123 <&apps_smmu 0x2184 0x20>;
136 iommus = <&apps_smmu 0x21a2 0x0>;
/openbmc/linux/drivers/gpu/drm/msm/adreno/
H A Da2xx_gpu.c18 for (i = 0; i < submit->nr_cmds; i++) { in a2xx_submit()
42 OUT_RING(ring, 0x00000000); in a2xx_submit()
49 OUT_RING(ring, 0x80000000); in a2xx_submit()
58 struct msm_ringbuffer *ring = gpu->rb[0]; in a2xx_me_init()
62 /* All fields present (bits 9:0) */ in a2xx_me_init()
63 OUT_RING(ring, 0x000003ff); in a2xx_me_init()
65 OUT_RING(ring, 0x00000000); in a2xx_me_init()
67 OUT_RING(ring, 0x00000000); in a2xx_me_init()
69 OUT_RING(ring, REG_A2XX_RB_SURFACE_INFO - 0x2000); in a2xx_me_init()
70 OUT_RING(ring, REG_A2XX_PA_SC_WINDOW_OFFSET - 0x2000); in a2xx_me_init()
[all …]
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dr600_reg.h31 #define R600_PCIE_PORT_INDEX 0x0038
32 #define R600_PCIE_PORT_DATA 0x003c
34 #define R600_RCU_INDEX 0x0100
35 #define R600_RCU_DATA 0x0104
37 #define R600_UVD_CTX_INDEX 0xf4a0
38 #define R600_UVD_CTX_DATA 0xf4a4
40 #define R600_MC_VM_FB_LOCATION 0x2180
41 #define R600_MC_FB_BASE_MASK 0x0000FFFF
42 #define R600_MC_FB_BASE_SHIFT 0
43 #define R600_MC_FB_TOP_MASK 0xFFFF0000
[all …]
/openbmc/linux/fs/ntfs/
H A Dupcase.c16 {0x0061, 0x007B, -32}, {0x0451, 0x045D, -80}, {0x1F70, 0x1F72, 74}, in generate_default_upcase()
17 {0x00E0, 0x00F7, -32}, {0x045E, 0x0460, -80}, {0x1F72, 0x1F76, 86}, in generate_default_upcase()
18 {0x00F8, 0x00FF, -32}, {0x0561, 0x0587, -48}, {0x1F76, 0x1F78, 100}, in generate_default_upcase()
19 {0x0256, 0x0258, -205}, {0x1F00, 0x1F08, 8}, {0x1F78, 0x1F7A, 128}, in generate_default_upcase()
20 {0x028A, 0x028C, -217}, {0x1F10, 0x1F16, 8}, {0x1F7A, 0x1F7C, 112}, in generate_default_upcase()
21 {0x03AC, 0x03AD, -38}, {0x1F20, 0x1F28, 8}, {0x1F7C, 0x1F7E, 126}, in generate_default_upcase()
22 {0x03AD, 0x03B0, -37}, {0x1F30, 0x1F38, 8}, {0x1FB0, 0x1FB2, 8}, in generate_default_upcase()
23 {0x03B1, 0x03C2, -32}, {0x1F40, 0x1F46, 8}, {0x1FD0, 0x1FD2, 8}, in generate_default_upcase()
24 {0x03C2, 0x03C3, -31}, {0x1F51, 0x1F52, 8}, {0x1FE0, 0x1FE2, 8}, in generate_default_upcase()
25 {0x03C3, 0x03CC, -32}, {0x1F53, 0x1F54, 8}, {0x1FE5, 0x1FE6, 7}, in generate_default_upcase()
[all …]
/openbmc/u-boot/arch/x86/include/asm/arch-quark/
H A Dquark.h10 #define MSG_PORT_MEM_ARBITER 0x00
11 #define MSG_PORT_HOST_BRIDGE 0x03
12 #define MSG_PORT_RMU 0x04
13 #define MSG_PORT_MEM_MGR 0x05
14 #define MSG_PORT_USB_AFE 0x14
15 #define MSG_PORT_PCIE_AFE 0x16
16 #define MSG_PORT_SOC_UNIT 0x31
18 /* Port 0x00: Memory Arbiter Message Port Registers */
21 #define AEC_CTRL 0x00
23 /* Port 0x03: Host Bridge Message Port Registers */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Domap3-evm-processor-common.dtsi8 reg = <0x80000000 0x10000000>; /* 256 MB */
13 pinctrl-0 = <&wl12xx_gpio>;
21 pinctrl-0 = <
29 pinctrl-0 = <&ehci_phy_pins>;
34 pinctrl-0 = <&on_board_gpio_61 &hsusb2_pins>;
38 OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */
39 OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */
40 OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */
41 OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */
43 OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx23-pinfunc.h13 #define MX23_PAD_GPMI_D00__GPMI_D00 0x0000
14 #define MX23_PAD_GPMI_D01__GPMI_D01 0x0010
15 #define MX23_PAD_GPMI_D02__GPMI_D02 0x0020
16 #define MX23_PAD_GPMI_D03__GPMI_D03 0x0030
17 #define MX23_PAD_GPMI_D04__GPMI_D04 0x0040
18 #define MX23_PAD_GPMI_D05__GPMI_D05 0x0050
19 #define MX23_PAD_GPMI_D06__GPMI_D06 0x0060
20 #define MX23_PAD_GPMI_D07__GPMI_D07 0x0070
21 #define MX23_PAD_GPMI_D08__GPMI_D08 0x0080
22 #define MX23_PAD_GPMI_D09__GPMI_D09 0x0090
[all …]
H A Dimx28-pinfunc.h13 #define MX28_PAD_GPMI_D00__GPMI_D0 0x0000
14 #define MX28_PAD_GPMI_D01__GPMI_D1 0x0010
15 #define MX28_PAD_GPMI_D02__GPMI_D2 0x0020
16 #define MX28_PAD_GPMI_D03__GPMI_D3 0x0030
17 #define MX28_PAD_GPMI_D04__GPMI_D4 0x0040
18 #define MX28_PAD_GPMI_D05__GPMI_D5 0x0050
19 #define MX28_PAD_GPMI_D06__GPMI_D6 0x0060
20 #define MX28_PAD_GPMI_D07__GPMI_D7 0x0070
21 #define MX28_PAD_GPMI_CE0N__GPMI_CE0N 0x0100
22 #define MX28_PAD_GPMI_CE1N__GPMI_CE1N 0x0110
[all …]
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_pch_refclk.c15 intel_de_rmw(dev_priv, SOUTH_CHICKEN2, 0, FDI_MPHY_IOSFSB_RESET_CTL); in lpt_fdi_reset_mphy()
21 intel_de_rmw(dev_priv, SOUTH_CHICKEN2, FDI_MPHY_IOSFSB_RESET_CTL, 0); in lpt_fdi_reset_mphy()
24 FDI_MPHY_IOSFSB_RESET_STATUS) == 0, 100)) in lpt_fdi_reset_mphy()
35 tmp = intel_sbi_read(dev_priv, 0x8008, SBI_MPHY); in lpt_fdi_program_mphy()
36 tmp &= ~(0xFF << 24); in lpt_fdi_program_mphy()
37 tmp |= (0x12 << 24); in lpt_fdi_program_mphy()
38 intel_sbi_write(dev_priv, 0x8008, tmp, SBI_MPHY); in lpt_fdi_program_mphy()
40 tmp = intel_sbi_read(dev_priv, 0x2008, SBI_MPHY); in lpt_fdi_program_mphy()
42 intel_sbi_write(dev_priv, 0x2008, tmp, SBI_MPHY); in lpt_fdi_program_mphy()
44 tmp = intel_sbi_read(dev_priv, 0x2108, SBI_MPHY); in lpt_fdi_program_mphy()
[all …]
/openbmc/linux/sound/soc/codecs/
H A Drt5514.h15 #define RT5514_DEVICE_ID 0x10ec5514
17 #define RT5514_RESET 0x2000
18 #define RT5514_PWR_ANA1 0x2004
19 #define RT5514_PWR_ANA2 0x2008
20 #define RT5514_I2S_CTRL1 0x2010
21 #define RT5514_I2S_CTRL2 0x2014
22 #define RT5514_VAD_CTRL6 0x2030
23 #define RT5514_EXT_VAD_CTRL 0x206c
24 #define RT5514_DIG_IO_CTRL 0x2070
25 #define RT5514_PAD_CTRL1 0x2080
[all …]

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