1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
4*724ba675SRob Herring */
5*724ba675SRob Herring/dts-v1/;
6*724ba675SRob Herring
7*724ba675SRob Herring#include "omap36xx.dtsi"
8*724ba675SRob Herring#include "omap-zoom-common.dtsi"
9*724ba675SRob Herring
10*724ba675SRob Herring/ {
11*724ba675SRob Herring	model = "TI Zoom3";
12*724ba675SRob Herring	compatible = "ti,omap3-zoom3", "ti,omap3630", "ti,omap3";
13*724ba675SRob Herring
14*724ba675SRob Herring	cpus {
15*724ba675SRob Herring		cpu@0 {
16*724ba675SRob Herring			cpu0-supply = <&vcc>;
17*724ba675SRob Herring		};
18*724ba675SRob Herring	};
19*724ba675SRob Herring
20*724ba675SRob Herring	memory@80000000 {
21*724ba675SRob Herring		device_type = "memory";
22*724ba675SRob Herring		reg = <0x80000000 0x20000000>; /* 512 MB */
23*724ba675SRob Herring	};
24*724ba675SRob Herring
25*724ba675SRob Herring	vddvario: regulator-vddvario {
26*724ba675SRob Herring		compatible = "regulator-fixed";
27*724ba675SRob Herring		regulator-name = "vddvario";
28*724ba675SRob Herring		regulator-always-on;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	vdd33a: regulator-vdd33a {
32*724ba675SRob Herring		compatible = "regulator-fixed";
33*724ba675SRob Herring		regulator-name = "vdd33a";
34*724ba675SRob Herring		regulator-always-on;
35*724ba675SRob Herring	};
36*724ba675SRob Herring
37*724ba675SRob Herring	wl12xx_vmmc: wl12xx_vmmc {
38*724ba675SRob Herring		pinctrl-names = "default";
39*724ba675SRob Herring		pinctrl-0 = <&wl12xx_gpio>;
40*724ba675SRob Herring		compatible = "regulator-fixed";
41*724ba675SRob Herring		regulator-name = "vwl1271";
42*724ba675SRob Herring		regulator-min-microvolt = <1800000>;
43*724ba675SRob Herring		regulator-max-microvolt = <1800000>;
44*724ba675SRob Herring		gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>;	/* gpio101 */
45*724ba675SRob Herring		startup-delay-us = <70000>;
46*724ba675SRob Herring		enable-active-high;
47*724ba675SRob Herring	};
48*724ba675SRob Herring};
49*724ba675SRob Herring
50*724ba675SRob Herring&omap3_pmx_core {
51*724ba675SRob Herring	/* REVISIT: twl gpio0 is mmc0_cd */
52*724ba675SRob Herring	mmc1_pins: mmc1-pins {
53*724ba675SRob Herring		pinctrl-single,pins = <
54*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2144, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
55*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2146, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
56*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
57*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
58*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
59*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
60*724ba675SRob Herring		>;
61*724ba675SRob Herring	};
62*724ba675SRob Herring
63*724ba675SRob Herring	mmc2_pins: mmc2-pins {
64*724ba675SRob Herring		pinctrl-single,pins = <
65*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
66*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
67*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat0.sdmmc2_dat0 */
68*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat1.sdmmc2_dat1 */
69*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat2.sdmmc2_dat2 */
70*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat3.sdmmc2_dat3 */
71*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat4.sdmmc2_dat4 */
72*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat5.sdmmc2_dat5 */
73*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat6.sdmmc2_dat6 */
74*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT | MUX_MODE0)		/* sdmmc2_dat7.sdmmc2_dat7 */
75*724ba675SRob Herring		>;
76*724ba675SRob Herring	};
77*724ba675SRob Herring
78*724ba675SRob Herring	mmc3_pins: mmc3-pins {
79*724ba675SRob Herring		pinctrl-single,pins = <
80*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2198, PIN_INPUT | MUX_MODE4)	/* mcbsp1_clkx.gpio_162 WLAN IRQ */
81*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3)	/* mcspi1_cs1.sdmmc3_cmd */
82*724ba675SRob Herring		>;
83*724ba675SRob Herring	};
84*724ba675SRob Herring
85*724ba675SRob Herring	uart1_pins: uart1-pins {
86*724ba675SRob Herring		pinctrl-single,pins = <
87*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2180, PIN_INPUT | MUX_MODE0)		/* uart1_cts.uart1_cts */
88*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x217e, PIN_OUTPUT | MUX_MODE0)		/* uart1_rts.uart1_rts */
89*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2182, WAKEUP_EN | PIN_INPUT | MUX_MODE0) /* uart1_rx.uart1_rx */
90*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)		/* uart1_tx.uart1_tx */
91*724ba675SRob Herring		>;
92*724ba675SRob Herring	};
93*724ba675SRob Herring
94*724ba675SRob Herring	uart2_pins: uart2-pins {
95*724ba675SRob Herring		pinctrl-single,pins = <
96*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT_PULLUP | MUX_MODE0)	/* uart2_cts.uart2_cts */
97*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0)		/* uart2_rts.uart2_rts */
98*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
99*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
100*724ba675SRob Herring		>;
101*724ba675SRob Herring	};
102*724ba675SRob Herring
103*724ba675SRob Herring	uart3_pins: uart3-pins {
104*724ba675SRob Herring		pinctrl-single,pins = <
105*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x219a, PIN_INPUT_PULLDOWN | MUX_MODE0)	/* uart3_cts_rctx.uart3_cts_rctx */
106*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x219c, PIN_OUTPUT | MUX_MODE0)		/* uart3_rts_sd.uart3_rts_sd */
107*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)		/* uart3_rx_irrx.uart3_rx_irrx */
108*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)		/* uart3_tx_irtx.uart3_tx_irtx */
109*724ba675SRob Herring		>;
110*724ba675SRob Herring	};
111*724ba675SRob Herring
112*724ba675SRob Herring	/* wl12xx GPIO output for WLAN_EN */
113*724ba675SRob Herring	wl12xx_gpio: wl12xx-gpio-pins {
114*724ba675SRob Herring		pinctrl-single,pins = <
115*724ba675SRob Herring			OMAP3_CORE1_IOPAD(0x211a, PIN_OUTPUT| MUX_MODE4)		/* cam_d2.gpio_101 */
116*724ba675SRob Herring		>;
117*724ba675SRob Herring	};
118*724ba675SRob Herring};
119*724ba675SRob Herring
120*724ba675SRob Herring&omap3_pmx_core2 {
121*724ba675SRob Herring	mmc3_2_pins: mmc3-2-pins {
122*724ba675SRob Herring		pinctrl-single,pins = <
123*724ba675SRob Herring			OMAP3630_CORE2_IOPAD(0x25d8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_clk.sdmmc3_clk */
124*724ba675SRob Herring			OMAP3630_CORE2_IOPAD(0x25e4, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d4.sdmmc3_dat0 */
125*724ba675SRob Herring			OMAP3630_CORE2_IOPAD(0x25e6, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d5.sdmmc3_dat1 */
126*724ba675SRob Herring			OMAP3630_CORE2_IOPAD(0x25e8, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d6.sdmmc3_dat2 */
127*724ba675SRob Herring			OMAP3630_CORE2_IOPAD(0x25e2, PIN_INPUT_PULLUP | MUX_MODE2)	/* etk_d3.sdmmc3_dat3 */
128*724ba675SRob Herring		>;
129*724ba675SRob Herring	};
130*724ba675SRob Herring};
131*724ba675SRob Herring
132*724ba675SRob Herring&omap3_pmx_wkup {
133*724ba675SRob Herring	wlan_host_wkup: wlan-host-wkup-pins {
134*724ba675SRob Herring		pinctrl-single,pins = <
135*724ba675SRob Herring			OMAP3_WKUP_IOPAD(0x2a1a, PIN_INPUT_PULLUP | MUX_MODE4)	/* sys_clkout1.gpio_10 WLAN_HOST_WKUP */
136*724ba675SRob Herring		>;
137*724ba675SRob Herring	};
138*724ba675SRob Herring};
139*724ba675SRob Herring
140*724ba675SRob Herring&i2c1 {
141*724ba675SRob Herring	clock-frequency = <2600000>;
142*724ba675SRob Herring
143*724ba675SRob Herring	twl: twl@48 {
144*724ba675SRob Herring		reg = <0x48>;
145*724ba675SRob Herring		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
146*724ba675SRob Herring		interrupt-parent = <&intc>;
147*724ba675SRob Herring	};
148*724ba675SRob Herring};
149*724ba675SRob Herring
150*724ba675SRob Herring#include "twl4030.dtsi"
151*724ba675SRob Herring
152*724ba675SRob Herring&i2c2 {
153*724ba675SRob Herring	clock-frequency = <400000>;
154*724ba675SRob Herring};
155*724ba675SRob Herring
156*724ba675SRob Herring&i2c3 {
157*724ba675SRob Herring	clock-frequency = <400000>;
158*724ba675SRob Herring
159*724ba675SRob Herring	/*
160*724ba675SRob Herring	 * TVP5146 Video decoder-in for analog input support.
161*724ba675SRob Herring	 */
162*724ba675SRob Herring	tvp5146@5c {
163*724ba675SRob Herring		compatible = "ti,tvp5146m2";
164*724ba675SRob Herring		reg = <0x5c>;
165*724ba675SRob Herring	};
166*724ba675SRob Herring};
167*724ba675SRob Herring
168*724ba675SRob Herring&twl_gpio {
169*724ba675SRob Herring	ti,use-leds;
170*724ba675SRob Herring};
171*724ba675SRob Herring
172*724ba675SRob Herring&mmc1 {
173*724ba675SRob Herring	vmmc-supply = <&vmmc1>;
174*724ba675SRob Herring	vqmmc-supply = <&vsim>;
175*724ba675SRob Herring	bus-width = <4>;
176*724ba675SRob Herring	pinctrl-names = "default";
177*724ba675SRob Herring	pinctrl-0 = <&mmc1_pins>;
178*724ba675SRob Herring};
179*724ba675SRob Herring/*
180*724ba675SRob Herring&mmc2 {
181*724ba675SRob Herring	vmmc-supply = <&vmmc2>;
182*724ba675SRob Herring	ti,non-removable;
183*724ba675SRob Herring	bus-width = <8>;
184*724ba675SRob Herring	pinctrl-names = "default";
185*724ba675SRob Herring	pinctrl-0 = <&mmc2_pins>;
186*724ba675SRob Herring};
187*724ba675SRob Herring*/
188*724ba675SRob Herring&mmc3 {
189*724ba675SRob Herring	vmmc-supply = <&wl12xx_vmmc>;
190*724ba675SRob Herring	non-removable;
191*724ba675SRob Herring	bus-width = <4>;
192*724ba675SRob Herring	cap-power-off-card;
193*724ba675SRob Herring	pinctrl-names = "default";
194*724ba675SRob Herring	pinctrl-0 = <&mmc3_pins &mmc3_2_pins>;
195*724ba675SRob Herring
196*724ba675SRob Herring	#address-cells = <1>;
197*724ba675SRob Herring	#size-cells = <0>;
198*724ba675SRob Herring	wlcore: wlcore@2 {
199*724ba675SRob Herring		compatible = "ti,wl1271";
200*724ba675SRob Herring		reg = <2>;
201*724ba675SRob Herring		interrupt-parent = <&gpio6>;
202*724ba675SRob Herring		interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 162 */
203*724ba675SRob Herring		ref-clock-frequency = <26000000>;
204*724ba675SRob Herring	};
205*724ba675SRob Herring};
206*724ba675SRob Herring
207*724ba675SRob Herring&uart1 {
208*724ba675SRob Herring	pinctrl-names = "default";
209*724ba675SRob Herring	pinctrl-0 = <&uart1_pins>;
210*724ba675SRob Herring};
211*724ba675SRob Herring
212*724ba675SRob Herring&uart2 {
213*724ba675SRob Herring	pinctrl-names = "default";
214*724ba675SRob Herring	pinctrl-0 = <&uart2_pins>;
215*724ba675SRob Herring};
216*724ba675SRob Herring
217*724ba675SRob Herring&uart3 {
218*724ba675SRob Herring	pinctrl-names = "default";
219*724ba675SRob Herring	pinctrl-0 = <&uart3_pins>;
220*724ba675SRob Herring};
221*724ba675SRob Herring
222*724ba675SRob Herring&uart4 {
223*724ba675SRob Herring	status = "disabled";
224*724ba675SRob Herring};
225*724ba675SRob Herring
226*724ba675SRob Herring&usb_otg_hs {
227*724ba675SRob Herring	interface-type = <0>;
228*724ba675SRob Herring	usb-phy = <&usb2_phy>;
229*724ba675SRob Herring	mode = <3>;
230*724ba675SRob Herring	power = <50>;
231*724ba675SRob Herring};
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