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/openbmc/linux/Documentation/devicetree/bindings/thermal/
H A Dqoriq-thermal.yaml16 Register (IPBRR0) at offset 0x0BF8.
20 0x01900102 T1040
78 reg = <0xf0000 0x1000>;
79 interrupts = <18 2 0 0>;
80 fsl,tmu-range = <0x000a0000 0x00090026 0x0008004a 0x0001006a>;
81 fsl,tmu-calibration = <0x00000000 0x00000025>,
82 <0x00000001 0x00000028>,
83 <0x00000002 0x0000002d>,
84 <0x00000003 0x00000031>,
85 <0x00000004 0x00000036>,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dinterlaken-lac.txt31 There is a full register set at 0x0000-0x0FFF (also known as the "hypervisor"
32 version), and a subset at 0x1000-0x1FFF. The former is a superset of the
45 IP Block Revision Register (IPBRR0) at offset 0x0BF8.
51 0x02000100 T4240
78 reg = <0x229000 0x1000>;
84 reg = <0x228000 0x1000>;
136 Register (IPBRR0), at offset 0x0BF8, and Y is the Minor version
161 #address-cells = <0x1>;
162 #size-cells = <0x1>;
164 ranges = <0x0 0xf 0xf4400000 0x20000>;
[all …]
/openbmc/linux/Documentation/devicetree/bindings/misc/
H A Dfsl,qoriq-mc.txt47 Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in
71 0x0 - MC portals
72 0x1 - QBMAN portals
99 have a value of 0.
154 stream-match-mask = <0x7C00>;
170 reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
171 <0x00000000 0x08340000 0 0x40000>; /* MC control reg */
180 * Region type 0x0 - MC portals
181 * Region type 0x1 - QBMAN portals
183 ranges = <0x0 0x0 0x0 0x8 0x0c000000 0x4000000
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_1_0_d.h26 #define ixCLIENT0_BM 0x0220
27 #define ixCLIENT0_CD0 0x0210
28 #define ixCLIENT0_CD1 0x0214
29 #define ixCLIENT0_CD2 0x0218
30 #define ixCLIENT0_CD3 0x021C
31 #define ixCLIENT0_CK0 0x0200
32 #define ixCLIENT0_CK1 0x0204
33 #define ixCLIENT0_CK2 0x0208
34 #define ixCLIENT0_CK3 0x020C
35 #define ixCLIENT0_K0 0x01F0
[all …]
/openbmc/linux/drivers/soc/fsl/qbman/
H A Dbman_ccsr.c37 #define REG_FBPR_FPC 0x0800
38 #define REG_ECSR 0x0a00
39 #define REG_ECIR 0x0a04
40 #define REG_EADR 0x0a08
41 #define REG_EDATA(n) (0x0a10 + ((n) * 0x04))
42 #define REG_SBEC(n) (0x0a80 + ((n) * 0x04))
43 #define REG_IP_REV_1 0x0bf8
44 #define REG_IP_REV_2 0x0bfc
45 #define REG_FBPR_BARE 0x0c00
46 #define REG_FBPR_BAR 0x0c04
[all …]
H A Dqman_ccsr.c41 #define REG_QCSP_LIO_CFG(n) (0x0000 + ((n) * 0x10))
42 #define REG_QCSP_IO_CFG(n) (0x0004 + ((n) * 0x10))
43 #define REG_QCSP_DD_CFG(n) (0x000c + ((n) * 0x10))
44 #define REG_DD_CFG 0x0200
45 #define REG_DCP_CFG(n) (0x0300 + ((n) * 0x10))
46 #define REG_DCP_DD_CFG(n) (0x0304 + ((n) * 0x10))
47 #define REG_DCP_DLM_AVG(n) (0x030c + ((n) * 0x10))
48 #define REG_PFDR_FPC 0x0400
49 #define REG_PFDR_FP_HEAD 0x0404
50 #define REG_PFDR_FP_TAIL 0x0408
[all …]
/openbmc/linux/drivers/iommu/
H A Dfsl_pamu.h22 #define PAMU_PGC 0x00000000 /* Allows all peripheral accesses */
23 #define PAMU_PE 0x40000000 /* enable PAMU */
26 #define PAMU_OFFSET 0x1000
28 #define PAMU_MMAP_REGS_BASE 0
46 #define PAMU_POES1 0x0040
47 #define PAMU_POES2 0x0044
48 #define PAMU_POEAH 0x0048
49 #define PAMU_POEAL 0x004C
50 #define PAMU_AVS1 0x0050
51 #define PAMU_AVS1_AV 0x1
[all …]
/openbmc/linux/drivers/video/fbdev/kyro/
H A DSTG4000Reg.h54 NO_LUT = 0, RESERVED, GRAPHICS, OVERLAY
59 _8BPP = 0, _15BPP, _16BPP, _24BPP, _32BPP
64 GRAPHICS_MODE = 0, COLOR_KEY, PER_PIXEL_ALPHA, GLOBAL_ALPHA,
75 /* 0h */
76 volatile u32 Thread0Enable; /* 0x0000 */
77 volatile u32 Thread1Enable; /* 0x0004 */
78 volatile u32 Thread0Recover; /* 0x0008 */
79 volatile u32 Thread1Recover; /* 0x000C */
80 volatile u32 Thread0Step; /* 0x0010 */
81 volatile u32 Thread1Step; /* 0x0014 */
[all …]
/openbmc/linux/drivers/net/wireless/intersil/p54/
H A Dp54usb.c45 {USB_DEVICE(0x0411, 0x0050)}, /* Buffalo WLI2-USB2-G54 */
46 {USB_DEVICE(0x045e, 0x00c2)}, /* Microsoft MN-710 */
47 {USB_DEVICE(0x0506, 0x0a11)}, /* 3COM 3CRWE254G72 */
48 {USB_DEVICE(0x0675, 0x0530)}, /* DrayTek Vigor 530 */
49 {USB_DEVICE(0x06b9, 0x0120)}, /* Thomson SpeedTouch 120g */
50 {USB_DEVICE(0x0707, 0xee06)}, /* SMC 2862W-G */
51 {USB_DEVICE(0x07aa, 0x001c)}, /* Corega CG-WLUSB2GT */
52 {USB_DEVICE(0x083a, 0x4501)}, /* Accton 802.11g WN4501 USB */
53 {USB_DEVICE(0x083a, 0x4502)}, /* Siemens Gigaset USB Adapter */
54 {USB_DEVICE(0x083a, 0x5501)}, /* Phillips CPWUA054 */
[all …]
/openbmc/linux/drivers/net/ethernet/freescale/enetc/
H A Denetc_hw.h10 #define ENETC_DEV_ID_PF 0xe100
11 #define ENETC_DEV_ID_VF 0xef00
12 #define ENETC_DEV_ID_PTP 0xee02
15 #define ENETC_BAR_REGS 0
17 /** SI regs, offset: 0h */
18 #define ENETC_SIMR 0
20 #define ENETC_SIMR_RSSE BIT(0)
21 #define ENETC_SICTR0 0x18
22 #define ENETC_SICTR1 0x1c
23 #define ENETC_SIPCAPR0 0x20
[all …]
/openbmc/u-boot/include/
H A Dradeon.h5 #define RADEON_REGSIZE 0x4000
8 #define MM_INDEX 0x0000
9 #define MM_DATA 0x0004
10 #define BUS_CNTL 0x0030
11 #define HI_STAT 0x004C
12 #define BUS_CNTL1 0x0034
13 #define I2C_CNTL_1 0x0094
14 #define CONFIG_CNTL 0x00E0
15 #define CONFIG_MEMSIZE 0x00F8
16 #define CONFIG_APER_0_BASE 0x0100
[all …]
/openbmc/linux/include/video/
H A Dradeon.h6 #define RADEON_REGSIZE 0x4000
9 #define MM_INDEX 0x0000
10 #define MM_DATA 0x0004
11 #define BUS_CNTL 0x0030
12 #define HI_STAT 0x004C
13 #define BUS_CNTL1 0x0034
14 #define I2C_CNTL_1 0x0094
15 #define CNFG_CNTL 0x00E0
16 #define CNFG_MEMSIZE 0x00F8
17 #define CNFG_APER_0_BASE 0x0100
[all …]
/openbmc/linux/drivers/usb/serial/
H A Dipaq.c37 { USB_DEVICE(0x0104, 0x00BE) }, /* Socket USB Sync */
38 { USB_DEVICE(0x03F0, 0x1016) }, /* HP USB Sync */
39 { USB_DEVICE(0x03F0, 0x1116) }, /* HP USB Sync 1611 */
40 { USB_DEVICE(0x03F0, 0x1216) }, /* HP USB Sync 1612 */
41 { USB_DEVICE(0x03F0, 0x2016) }, /* HP USB Sync 1620 */
42 { USB_DEVICE(0x03F0, 0x2116) }, /* HP USB Sync 1621 */
43 { USB_DEVICE(0x03F0, 0x2216) }, /* HP USB Sync 1622 */
44 { USB_DEVICE(0x03F0, 0x3016) }, /* HP USB Sync 1630 */
45 { USB_DEVICE(0x03F0, 0x3116) }, /* HP USB Sync 1631 */
46 { USB_DEVICE(0x03F0, 0x3216) }, /* HP USB Sync 1632 */
[all …]
/openbmc/linux/drivers/net/wireless/intersil/orinoco/
H A Dorinoco_usb.c73 #define URB_ASYNC_UNLINK 0
96 .size = 0,
103 do { printk(KERN_ERR PFX format "\n", ## arg); } while (0)
117 #define USB_COMPAQ_VENDOR_ID 0x049f /* Compaq Computer Corp. */
118 #define USB_COMPAQ_WL215_ID 0x001f /* Compaq WL215 USB Adapter */
119 #define USB_COMPAQ_W200_ID 0x0076 /* Compaq W200 USB Adapter */
120 #define USB_HP_WL215_ID 0x0082 /* Compaq WL215 USB Adapter */
122 #define USB_MELCO_VENDOR_ID 0x0411
123 #define USB_BUFFALO_L11_ID 0x0006 /* BUFFALO WLI-USB-L11 */
124 #define USB_BUFFALO_L11G_WR_ID 0x000B /* BUFFALO WLI-USB-L11G-WR */
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/mmhub/
H A Dmmhub_1_8_0_offset.h29 // base address: 0x60000
30 …DAGB0_RDCLI0 0x0000
31 …e regDAGB0_RDCLI0_BASE_IDX 0
32 …DAGB0_RDCLI1 0x0001
33 …e regDAGB0_RDCLI1_BASE_IDX 0
34 …DAGB0_RDCLI2 0x0002
35 …e regDAGB0_RDCLI2_BASE_IDX 0
36 …DAGB0_RDCLI3 0x0003
37 …e regDAGB0_RDCLI3_BASE_IDX 0
38 …DAGB0_RDCLI4 0x0004
[all …]
H A Dmmhub_1_7_offset.h29 // base address: 0x68000
30 …DAGB0_RDCLI0 0x0000
31 …e regDAGB0_RDCLI0_BASE_IDX 0
32 …DAGB0_RDCLI1 0x0001
33 …e regDAGB0_RDCLI1_BASE_IDX 0
34 …DAGB0_RDCLI2 0x0002
35 …e regDAGB0_RDCLI2_BASE_IDX 0
36 …DAGB0_RDCLI3 0x0003
37 …e regDAGB0_RDCLI3_BASE_IDX 0
38 …DAGB0_RDCLI4 0x0004
[all …]
/openbmc/linux/sound/soc/mediatek/mt8186/
H A Dmt8186-reg.h107 #define CLEAR_FLAG_SFT 0
108 #define CLEAR_FLAG_MASK_SFT BIT(0)
153 #define AUDIO_AFE_ON_SFT 0
154 #define AUDIO_AFE_ON_MASK_SFT BIT(0)
157 #define AFE_ON_RETM_SFT 0
158 #define AFE_ON_RETM_MASK_SFT BIT(0)
187 #define I2S_EN_SFT 0
188 #define I2S_EN_MASK_SFT BIT(0)
209 #define I2S2_EN_SFT 0
210 #define I2S2_EN_MASK_SFT BIT(0)
[all …]
/openbmc/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-reg.h26 #define BCK_INVERSE_MASK 0x1
27 #define BCK_INVERSE_MASK_SFT (0x1 << 3)
31 #define VUL12_ON_MASK 0x1
32 #define VUL12_ON_MASK_SFT (0x1 << 31)
34 #define MOD_DAI_ON_MASK 0x1
35 #define MOD_DAI_ON_MASK_SFT (0x1 << 30)
37 #define DAI_ON_MASK 0x1
38 #define DAI_ON_MASK_SFT (0x1 << 29)
40 #define DAI2_ON_MASK 0x1
41 #define DAI2_ON_MASK_SFT (0x1 << 28)
[all …]
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_scl_filters.c31 // <sharpness> = 0
37 0x1000, 0x0000,
38 0x0FF0, 0x0010,
39 0x0FB0, 0x0050,
40 0x0F34, 0x00CC,
41 0x0E68, 0x0198,
42 0x0D44, 0x02BC,
43 0x0BC4, 0x043C,
44 0x09FC, 0x0604,
45 0x0800, 0x0800
[all …]
/openbmc/linux/fs/hfsplus/
H A Dtables.c24 // High-byte indices ( == 0 iff no case mapping and no ignorables )
27 /* 0 */ 0x0100, 0x0200, 0x0000, 0x0300, 0x0400, 0x0500, 0x0000, 0x0000,
28 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
29 /* 1 */ 0x0600, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
30 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
31 /* 2 */ 0x0700, 0x0800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
32 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
33 /* 3 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
34 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
35 /* 4 */ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
[all …]
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_12_0_offset.h27 // base address: 0x48
28 …dispdec_VGA_MEM_WRITE_PAGE_ADDR 0x0012
29 …ne mmdispdec_VGA_MEM_WRITE_PAGE_ADDR_BASE_IDX 0
33 // base address: 0x4c
34 …dispdec_VGA_MEM_READ_PAGE_ADDR 0x0014
35 …ne mmdispdec_VGA_MEM_READ_PAGE_ADDR_BASE_IDX 0
39 // base address: 0x0
40 …DC_PERFMON0_PERFCOUNTER_CNTL 0x0020
42 …DC_PERFMON0_PERFCOUNTER_CNTL2 0x0021
44 …DC_PERFMON0_PERFCOUNTER_STATE 0x0022
[all …]