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/openbmc/linux/Documentation/devicetree/bindings/pci/
H A Dfsl,imx6q-pcie.yaml167 reg = <0x01ffc000 0x04000>,
168 <0x01f00000 0x80000>;
173 bus-range = <0x00 0xff>;
174 ranges = <0x81000000 0 0 0x01f80000 0 0x00010000>,
175 <0x82000000 0 0x01000000 0x01000000 0 0x00f00000>;
180 interrupt-map-mask = <0 0 0 0x7>;
181 interrupt-map = <0 0 0 1 &gpc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
182 <0 0 0 2 &gpc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
183 <0 0 0 3 &gpc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
184 <0 0 0 4 &gpc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
/openbmc/qemu/include/hw/arm/
H A Dfsl-imx6.h84 #define FSL_IMX6_MMDC_ADDR 0x10000000
85 #define FSL_IMX6_MMDC_SIZE 0xF0000000
86 #define FSL_IMX6_EIM_MEM_ADDR 0x08000000
87 #define FSL_IMX6_EIM_MEM_SIZE 0x8000000
88 #define FSL_IMX6_IPU_2_ADDR 0x02800000
89 #define FSL_IMX6_IPU_2_SIZE 0x400000
90 #define FSL_IMX6_IPU_1_ADDR 0x02400000
91 #define FSL_IMX6_IPU_1_SIZE 0x400000
92 #define FSL_IMX6_MIPI_HSI_ADDR 0x02208000
93 #define FSL_IMX6_MIPI_HSI_SIZE 0x4000
[all …]
/openbmc/linux/drivers/mtd/maps/
H A Dnettel.c30 #define AMD_WINDOW_MAXSIZE 0x00200000
36 #define SC520_PAR_ADDR_MASK 0x00003fff
41 #define SC520_PAR_SIZE_MASK 0x01ffc000
51 #define SC520_PAR_BOOTCS 0x8a000000
52 #define SC520_PAR_ROMCS1 0xaa000000
53 #define SC520_PAR_ROMCS2 0xca000000 /* Cache disabled, 64K page */
69 .size = 0,
76 .offset = 0,
77 .size = 0x000e0000
81 .offset = 0x00100000,
[all …]
/openbmc/u-boot/drivers/pci/
H A Dpcie_imx.c23 #define PCI_ACCESS_READ 0
27 #define MX6_DBI_ADDR 0x08ffc000
28 #define MX6_IO_ADDR 0x08000000
29 #define MX6_MEM_ADDR 0x08100000
30 #define MX6_ROOT_ADDR 0x08f00000
32 #define MX6_DBI_ADDR 0x01ffc000
33 #define MX6_IO_ADDR 0x01000000
34 #define MX6_MEM_ADDR 0x01100000
35 #define MX6_ROOT_ADDR 0x01f00000
37 #define MX6_DBI_SIZE 0x4000
[all …]
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl.dtsi59 #clock-cells = <0>;
65 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #clock-cells = <0>;
78 #size-cells = <0>;
83 lvds-channel@0 {
85 #size-cells = <0>;
86 reg = <0>;
89 port@0 {
90 reg = <0>;
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dimx6qdl.dtsi56 #clock-cells = <0>;
62 #clock-cells = <0>;
63 clock-frequency = <0>;
68 #clock-cells = <0>;
76 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
84 #size-cells = <0>;
89 lvds-channel@0 {
91 #size-cells = <0>;
92 reg = <0>;
95 port@0 {
[all …]