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/openbmc/linux/drivers/net/wireless/ath/ath9k/
H A Dreg_aic.h20 #define AR_SM_BASE 0xa200
21 #define AR_SM1_BASE 0xb200
22 #define AR_AGC_BASE 0x9e00
24 #define AR_PHY_AIC_CTRL_0_B0 (AR_SM_BASE + 0x4b0)
25 #define AR_PHY_AIC_CTRL_1_B0 (AR_SM_BASE + 0x4b4)
26 #define AR_PHY_AIC_CTRL_2_B0 (AR_SM_BASE + 0x4b8)
27 #define AR_PHY_AIC_CTRL_3_B0 (AR_SM_BASE + 0x4bc)
28 #define AR_PHY_AIC_CTRL_4_B0 (AR_SM_BASE + 0x4c0)
30 #define AR_PHY_AIC_STAT_0_B0 (AR_SM_BASE + 0x4c4)
31 #define AR_PHY_AIC_STAT_1_B0 (AR_SM_BASE + 0x4c8)
[all …]
/openbmc/linux/drivers/hwtracing/intel_th/
H A Dpti.h12 REG_PTI_CTL = 0x1c00,
15 #define PTI_EN BIT(0)
17 #define PTI_MODE 0xf0
20 #define PTI_CLKDIV 0x000f0000
21 #define PTI_PATGENMODE 0x00f00000
26 #define LPP_DEST_PTI BIT(0)
/openbmc/u-boot/configs/
H A Dgplugd_defconfig3 CONFIG_SYS_TEXT_BASE=0x00f00000
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_dma.h16 #define FSL_DMA_MR_CS 0x00000001 /* Channel start */
17 #define FSL_DMA_MR_CC 0x00000002 /* Channel continue */
18 #define FSL_DMA_MR_CTM 0x00000004 /* Channel xfer mode */
19 #define FSL_DMA_MR_CTM_DIRECT 0x00000004 /* Direct channel xfer mode */
20 #define FSL_DMA_MR_EOTIE 0x00000080 /* End-of-transfer interrupt en */
21 #define FSL_DMA_MR_PRC_MASK 0x00000c00 /* PCI read command */
22 #define FSL_DMA_MR_SAHE 0x00001000 /* Source addr hold enable */
23 #define FSL_DMA_MR_DAHE 0x00002000 /* Dest addr hold enable */
24 #define FSL_DMA_MR_SAHTS_MASK 0x0000c000 /* Source addr hold xfer size */
25 #define FSL_DMA_MR_DAHTS_MASK 0x00030000 /* Dest addr hold xfer size */
[all …]
/openbmc/linux/drivers/bus/
H A Dda8xx-mstpri.c29 #define DA8XX_MSTPRI0_OFFSET 0
34 DA8XX_MSTPRI_ARM_I = 0,
62 .shift = 0,
63 .mask = 0x0000000f,
68 .mask = 0x000000f0,
73 .mask = 0x000f0000,
78 .mask = 0x00f00000,
82 .shift = 0,
83 .mask = 0x0000000f,
88 .mask = 0x000000f0,
[all …]
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dp1024rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp2020rdb-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp1020rdb-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00b00000>;
74 reg = <0x00f00000 0x00100000>;
80 nand@1,0 {
85 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp1020rdb.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
61 reg = <0x00080000 0x00380000>;
68 reg = <0x00400000 0x00b00000>;
76 reg = <0x00f00000 0x00100000>;
82 nand@1,0 {
87 reg = <0x1 0x0 0x40000>;
[all …]
H A Dp2020rdb.dts29 reg = <0 0xffe05000 0 0x1000>;
32 ranges = <0x0 0x0 0x0 0xef000000 0x01000000
33 0x1 0x0 0x0 0xffa00000 0x00040000
34 0x2 0x0 0x0 0xffb00000 0x00020000>;
36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
61 reg = <0x00080000 0x00380000>;
[all …]
H A Dp1021rdb-pc.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x1000000>;
44 partition@0 {
47 reg = <0x0 0x00040000>;
54 reg = <0x00040000 0x00040000>;
60 reg = <0x00080000 0x00380000>;
66 reg = <0x00400000 0x00ac0000>;
73 reg = <0x00ec0000 0x00040000>;
82 reg = <0x00f00000 0x00100000>;
87 nand@1,0 {
[all …]
H A Dp1010rdb-pa.dtsi36 partition@0 {
39 reg = <0x0 0x00100000>;
46 reg = <0x00100000 0x00100000>;
52 reg = <0x00200000 0x00400000>;
58 reg = <0x00600000 0x00400000>;
64 reg = <0x00a00000 0x00f00000>;
70 reg = <0x01900000 0x00700000>;
76 interrupts = <1 1 0 0>;
80 interrupts = <2 1 0 0>;
84 interrupts = <4 1 0 0>;
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-db8520.dtsi8 operating-points = <1152000 0
9 798720 0
10 399360 0
11 199680 0>;
22 reg = <0x06000000 0x00f00000>;
28 reg = <0x06f00000 0x00100000>;
34 reg = <0x07000000 0x01000000>;
48 reg = <0x17f00000 0x00100000>;
H A Dste-db8500.dtsi8 operating-points = <998400 0
9 798720 0
10 399360 0
11 199680 0>;
22 reg = <0x06000000 0x00f00000>;
28 reg = <0x06f00000 0x00100000>;
34 reg = <0x07000000 0x01000000>;
48 reg = <0x17f00000 0x00100000>;
/openbmc/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_debug.h11 I40E_DEBUG_INIT = 0x00000001,
12 I40E_DEBUG_RELEASE = 0x00000002,
14 I40E_DEBUG_LINK = 0x00000010,
15 I40E_DEBUG_PHY = 0x00000020,
16 I40E_DEBUG_HMC = 0x00000040,
17 I40E_DEBUG_NVM = 0x00000080,
18 I40E_DEBUG_LAN = 0x00000100,
19 I40E_DEBUG_FLOW = 0x00000200,
20 I40E_DEBUG_DCB = 0x00000400,
21 I40E_DEBUG_DIAG = 0x00000800,
[all …]
/openbmc/linux/drivers/media/test-drivers/vimc/
H A Dvimc-common.h19 #define VIMC_CID_VIMC_BASE (0x00f00000 | 0xf000)
20 #define VIMC_CID_VIMC_CLASS (0x00f00000 | 1)
21 #define VIMC_CID_TEST_PATTERN (VIMC_CID_VIMC_BASE + 0)
41 VIMC_ALLOCATOR_VMALLOC = 0,
69 } while (0)
188 * Returns 0 if no mbus code is found for the given index.
/openbmc/linux/drivers/net/wireless/ralink/rt2x00/
H A Drt2800.h49 #define RF2820 0x0001
50 #define RF2850 0x0002
51 #define RF2720 0x0003
52 #define RF2750 0x0004
53 #define RF3020 0x0005
54 #define RF2020 0x0006
55 #define RF3021 0x0007
56 #define RF3022 0x0008
57 #define RF3052 0x0009
58 #define RF2853 0x000a
[all …]
/openbmc/u-boot/include/configs/
H A Dls1012afrdm.h14 #define CONFIG_SYS_SDRAM_SIZE 0x20000000
17 #define CONFIG_SYS_MEMTEST_START 0x80000000
18 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
23 func(USB, usb, 0)
28 "verify=no\0" \
29 "fdt_high=0xffffffffffffffff\0" \
30 "initrd_high=0xffffffffffffffff\0" \
31 "fdt_addr=0x00f00000\0" \
32 "kernel_addr=0x01000000\0" \
33 "scriptaddr=0x80000000\0" \
[all …]
H A Dls1012a2g5rdb.h14 #define CONFIG_SYS_SDRAM_SIZE 0x40000000
16 #define CONFIG_SYS_MEMTEST_START 0x80000000
17 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
36 #define CONFIG_SYS_MEMTEST_START 0x80000000
37 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
41 "verify=no\0" \
42 "fdt_high=0xffffffffffffffff\0" \
43 "initrd_high=0xffffffffffffffff\0" \
44 "fdt_addr=0x00f00000\0" \
45 "kernel_addr=0x01000000\0" \
[all …]
H A Dls1012ardb.h14 #define CONFIG_SYS_SDRAM_SIZE 0x40000000
16 #define CONFIG_SYS_MEMTEST_START 0x80000000
17 #define CONFIG_SYS_MEMTEST_END 0x9fffffff
24 #define I2C_MUX_IO_ADDR 0x24
25 #define I2C_MUX_IO2_ADDR 0x25
26 #define I2C_MUX_IO_0 0
28 #define SW_BOOT_MASK 0x03
29 #define SW_BOOT_EMU 0x02
30 #define SW_BOOT_BANK1 0x00
31 #define SW_BOOT_BANK2 0x01
[all …]
/openbmc/linux/arch/powerpc/platforms/83xx/
H A Dmpc83xx.h8 #define MPC83XX_SCCR_OFFS 0xA08
9 #define MPC83XX_SCCR_USB_MASK 0x00f00000
10 #define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
11 #define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
12 #define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
13 #define MPC83XX_SCCR_USB_DRCM_11 0x00300000
14 #define MPC83XX_SCCR_USB_DRCM_01 0x00100000
15 #define MPC83XX_SCCR_USB_DRCM_10 0x00200000
16 #define MPC8315_SCCR_USB_MASK 0x00c00000
17 #define MPC8315_SCCR_USB_DRCM_11 0x00c00000
[all …]
/openbmc/linux/arch/sparc/include/uapi/asm/
H A Dpsrcompat.h8 #define PSR_CWP 0x0000001f /* current window pointer */
9 #define PSR_ET 0x00000020 /* enable traps field */
10 #define PSR_PS 0x00000040 /* previous privilege level */
11 #define PSR_S 0x00000080 /* current privilege level */
12 #define PSR_PIL 0x00000f00 /* processor interrupt level */
13 #define PSR_EF 0x00001000 /* enable floating point */
14 #define PSR_EC 0x00002000 /* enable co-processor */
15 #define PSR_SYSCALL 0x00004000 /* inside of a syscall */
16 #define PSR_LE 0x00008000 /* SuperSparcII little-endian */
17 #define PSR_ICC 0x00f00000 /* integer condition codes */
[all …]
H A Dpsr.h19 * | 31-28 | 27-24 | 23-20 | 19-14 | 13 | 12 | 11-8 | 7 | 6 | 5 | 4-0 |
22 #define PSR_CWP 0x0000001f /* current window pointer */
23 #define PSR_ET 0x00000020 /* enable traps field */
24 #define PSR_PS 0x00000040 /* previous privilege level */
25 #define PSR_S 0x00000080 /* current privilege level */
26 #define PSR_PIL 0x00000f00 /* processor interrupt level */
27 #define PSR_EF 0x00001000 /* enable floating point */
28 #define PSR_EC 0x00002000 /* enable co-processor */
29 #define PSR_SYSCALL 0x00004000 /* inside of a syscall */
30 #define PSR_LE 0x00008000 /* SuperSparcII little-endian */
[all …]
/openbmc/u-boot/arch/arm/dts/
H A Dkirkwood-atl-sbx81lifkw.dts14 reg = <0x00000000 0x08000000>; /* 128 MB */
31 #size-cells = <0>;
36 switch@0 {
38 #size-cells = <0>;
39 reg = <1 0>;
41 port@0 {
42 reg = <0>;
78 flash@0 {
82 reg = <0>;
84 mode = <0>;
[all …]
/openbmc/linux/drivers/net/wireless/silabs/wfx/
H A Dhwio.h33 #define CFG_ERR_SPI_FRAME 0x00000001 /* only with SPI */
34 #define CFG_ERR_SDIO_BUF_MISMATCH 0x00000001 /* only with SDIO */
35 #define CFG_ERR_BUF_UNDERRUN 0x00000002
36 #define CFG_ERR_DATA_IN_TOO_LARGE 0x00000004
37 #define CFG_ERR_HOST_NO_OUT_QUEUE 0x00000008
38 #define CFG_ERR_BUF_OVERRUN 0x00000010
39 #define CFG_ERR_DATA_OUT_TOO_LARGE 0x00000020
40 #define CFG_ERR_HOST_NO_IN_QUEUE 0x00000040
41 #define CFG_ERR_HOST_CRC_MISS 0x00000080 /* only with SDIO */
42 #define CFG_SPI_IGNORE_CS 0x00000080 /* only with SPI */
[all …]

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