Home
last modified time | relevance | path

Searched +full:0 +full:- +full:64 (Results 1 – 25 of 1086) sorted by relevance

12345678910>>...44

/openbmc/qemu/tests/qemu-iotests/tests/
H A Dimage-fleecing.out3 --- Setting up images ---
7 --- Launching VM ---
11 --- Setting up Fleecing Graph ---
16 --- Setting up NBD Export ---
21 --- Sanity Check ---
23 read -P0x5d 0 64k
24 read -P0xd5 1M 64k
25 read -P0xdc 32M 64k
26 read -P0xcd 0x3ff0000 64k
27 read -P0 0x00f8000 32k
[all …]
/openbmc/u-boot/drivers/mtd/spi/
H A Dspi-nor-ids.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
26 ((_jedec_id) >> 16) & 0xff, \
27 ((_jedec_id) >> 8) & 0xff, \
28 (_jedec_id) & 0xff, \
29 ((_ext_id) >> 8) & 0xff, \
30 (_ext_id) & 0xff, \
32 .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))), \
41 ((_jedec_id) >> 16) & 0xff, \
42 ((_jedec_id) >> 8) & 0xff, \
[all …]
/openbmc/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: opp-table-emc {
5 compatible = "operating-points-v2";
7 opp-12750000-800 {
8 opp-microvolt = <800000 800000 1150000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0003>;
13 opp-12750000-950 {
14 opp-microvolt = <950000 950000 1150000>;
15 opp-hz = /bits/ 64 <12750000>;
[all …]
H A Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1350000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra30-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-51000000-800 {
9 clock-latency-ns = <100000>;
10 opp-supported-hw = <0x1F 0x31FE>;
11 opp-hz = /bits/ 64 <51000000>;
14 opp-51000000-850 {
15 clock-latency-ns = <100000>;
[all …]
H A Dtegra20-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1300000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1300000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra20-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-216000000-750 {
9 clock-latency-ns = <400000>;
10 opp-supported-hw = <0x0F 0x0003>;
11 opp-hz = /bits/ 64 <216000000>;
12 opp-suspend;
15 opp-216000000-800 {
[all …]
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 emc_icc_dvfs_opp_table: opp-table-dvfs0 {
6 compatible = "operating-points-v2";
8 opp-12750000-800 {
9 opp-microvolt = <800000 800000 1150000>;
10 opp-hz = /bits/ 64 <12750000>;
11 opp-supported-hw = <0x0003>;
14 opp-12750000-950 {
15 opp-microvolt = <950000 950000 1150000>;
16 opp-hz = /bits/ 64 <12750000>;
[all …]
/openbmc/linux/drivers/mtd/spi-nor/
H A Dmacronix.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/mtd/spi-nor.h>
18 * Unfortunately, Macronix has re-used the same JEDEC ID for both in mx25l25635_post_bfpt_fixups()
22 * seems that the F version advertises support for Fast Read 4-4-4 in in mx25l25635_post_bfpt_fixups()
25 if (bfpt->dwords[SFDP_DWORD(5)] & BFPT_DWORD5_FAST_READ_4_4_4) in mx25l25635_post_bfpt_fixups()
26 nor->flags |= SNOR_F_4B_OPCODES; in mx25l25635_post_bfpt_fixups()
28 return 0; in mx25l25635_post_bfpt_fixups()
37 { "mx25l512e", INFO(0xc22010, 0, 64 * 1024, 1)
39 { "mx25l2005a", INFO(0xc22012, 0, 64 * 1024, 4)
41 { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8)
[all …]
H A Dwinbond.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/mtd/spi-nor.h>
11 #define WINBOND_NOR_OP_RDEAR 0xc8 /* Read Extended Address Register */
12 #define WINBOND_NOR_OP_WREAR 0xc5 /* Write Extended Address Register */
15 SPI_MEM_OP(SPI_MEM_OP_CMD(WINBOND_NOR_OP_WREAR, 0), \
18 SPI_MEM_OP_DATA_OUT(1, buf, 0))
27 * Unfortunately, Winbond has re-used the same JEDEC ID for both in w25q256_post_bfpt_fixups()
33 if (bfpt_header->major == SFDP_JESD216_MAJOR && in w25q256_post_bfpt_fixups()
34 bfpt_header->minor == SFDP_JESD216A_MINOR) in w25q256_post_bfpt_fixups()
35 nor->flags |= SNOR_F_4B_OPCODES; in w25q256_post_bfpt_fixups()
[all …]
H A Dmicron-st.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/mtd/spi-nor.h>
12 #define USE_FSR BIT(0)
14 #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */
15 #define SPINOR_OP_CLFSR 0x50 /* Clear flag status register */
16 #define SPINOR_OP_MT_DTR_RD 0xfd /* Fast Read opcode in DTR mode */
17 #define SPINOR_OP_MT_RD_ANY_REG 0x85 /* Read volatile register */
18 #define SPINOR_OP_MT_WR_ANY_REG 0x81 /* Write volatile register */
19 #define SPINOR_REG_MT_CFR0V 0x00 /* For setting octal DTR mode */
20 #define SPINOR_REG_MT_CFR1V 0x01 /* For setting dummy cycles */
[all …]
H A Deon.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/mtd/spi-nor.h>
12 /* EON -- en25xxx */
13 { "en25f32", INFO(0x1c3116, 0, 64 * 1024, 64)
15 { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64) },
16 { "en25q32b", INFO(0x1c3016, 0, 64 * 1024, 64) },
17 { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128) },
18 { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128)
20 { "en25q80a", INFO(0x1c3014, 0, 64 * 1024, 16)
22 { "en25qh16", INFO(0x1c7015, 0, 64 * 1024, 32)
[all …]
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ &cpu0_opp_table;
10 /delete-node/ &cpu4_opp_table;
13 cpu0_opp_table: opp-table-cpu0 {
14 compatible = "operating-points-v2";
15 opp-shared;
17 opp-300000000 {
18 opp-hz = /bits/ 64 <300000000>;
19 opp-peak-kBps = <(300000 * 32)>;
21 opp-403200000 {
[all …]
H A Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
14 * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1
15 * becomes 0x20, speed 2 becomes 0x40.
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D06125 seq=`basename $0`
35 trap "_cleanup; exit \$status" 0 1 2 3 15
41 # This tests qcow2-specific low-level functionality
50 # require the default 64k cluster
60 _make_test_img -o "compat=1.1,lazy_refcounts=on" 64M
61 $QEMU_IO -c "write -z 0 128k" "$TEST_IMG" | _filter_qemu_io
63 $QEMU_IMG amend -o "compat=0.10" "$TEST_IMG"
65 $QEMU_IO -c "read -P 0 0 128k" "$TEST_IMG" | _filter_qemu_io
71 _make_test_img -o "compat=1.1,lazy_refcounts=on" 64M
72 $QEMU_IO -c "write -z 0 128k" "$TEST_IMG" | _filter_qemu_io
[all …]
H A D06025 seq="$(basename $0)"
34 trap "_cleanup; exit \$status" 0 1 2 3 15
48 # This tests qcow2-specific low-level functionality
57 # The repair process will create a large file - so check for availability first
58 _require_large_file 64G
60 rt_offset=65536 # 0x10000 (XXX: just an assumption)
61 rb_offset=131072 # 0x20000 (XXX: just an assumption)
62 l1_offset=196608 # 0x30000 (XXX: just an assumption)
63 l2_offset=262144 # 0x40000 (XXX: just an assumption)
64 l2_offset_after_snapshot=524288 # 0x80000 (XXX: just an assumption)
[all …]
H A D11225 seq="$(basename $0)"
34 trap "_cleanup; exit \$status" 0 1 2 3 15
40 # This tests qcow2-specific low-level functionality
51 $QEMU_IMG info "$TEST_IMG" | sed -n '/refcount bits:/ s/^ *//p'
58 # Must be positive (non-zero)
59 _make_test_img -o "refcount_bits=0" 64M
60 # Must be positive (non-negative)
61 _make_test_img -o "refcount_bits=-1" 64M
62 # May not exceed 64
63 _make_test_img -o "refcount_bits=128" 64M
[all …]
/openbmc/openbmc/poky/meta/lib/oe/
H A Delf.py4 # SPDX-License-Identifier: GPL-2.0-only
13 "arm" : (40, 0, 0, True, 32),
16 "arm" : (40, 0, 0, True, 32),
19 "aarch64" : (183, 0, 0, True, 64),
20 "aarch64_be" :(183, 0, 0, False, 64),
21 "i586" : (3, 0, 0, True, 32),
22 "i686" : (3, 0, 0, True, 32),
23 "x86_64": (62, 0, 0, True, 64),
24 "epiphany": (4643, 0, 0, True, 32),
25 "lm32": (138, 0, 0, False, 32),
[all …]
/openbmc/qemu/target/xtensa/core-de212/
H A Dgdb-config.c.inc3 Copyright (c) 2003-2015 Tensilica Inc.
24 XTREG( 0, 0,32, 4, 4,0x0020,0x0006,-2, 9,0x0100,pc, 0,0,0,0,0,0)
25 XTREG( 1, 4,32, 4, 4,0x0100,0x0006,-2, 1,0x0002,ar0, 0,0,0,0,0,0)
26 XTREG( 2, 8,32, 4, 4,0x0101,0x0006,-2, 1,0x0002,ar1, 0,0,0,0,0,0)
27 XTREG( 3, 12,32, 4, 4,0x0102,0x0006,-2, 1,0x0002,ar2, 0,0,0,0,0,0)
28 XTREG( 4, 16,32, 4, 4,0x0103,0x0006,-2, 1,0x0002,ar3, 0,0,0,0,0,0)
29 XTREG( 5, 20,32, 4, 4,0x0104,0x0006,-2, 1,0x0002,ar4, 0,0,0,0,0,0)
30 XTREG( 6, 24,32, 4, 4,0x0105,0x0006,-2, 1,0x0002,ar5, 0,0,0,0,0,0)
31 XTREG( 7, 28,32, 4, 4,0x0106,0x0006,-2, 1,0x0002,ar6, 0,0,0,0,0,0)
32 XTREG( 8, 32,32, 4, 4,0x0107,0x0006,-2, 1,0x0002,ar7, 0,0,0,0,0,0)
[all …]
/openbmc/linux/tools/testing/selftests/drivers/net/mlxsw/
H A Dfib_offload.sh2 # SPDX-License-Identifier: GPL-2.0
6 lib_dir=$(dirname $0)/../../../net/forwarding
43 __addr_add_del $spine_p1 add 2001:db8:1::1/64
44 __addr_add_del $spine_p2 add 2001:db8:2::1/64
49 __addr_add_del $spine_p2 del 2001:db8:2::1/64
50 __addr_add_del $spine_p1 del 2001:db8:1::1/64
65 num=$(ip -6 route show match ${pfx} | grep "offload" | wc -l)
67 if [ $num -eq $expected_num ]; then
68 return 0
76 RET=0
[all …]
/openbmc/qemu/hw/block/
H A Dm25p80.c26 #include "sysemu/block-backend.h"
29 #include "hw/qdev-properties.h"
30 #include "hw/qdev-properties-system.h"
36 #include "qemu/error-report.h"
43 #define MAX_3BYTES_SIZE 0x1000000
46 /* Fields for FlashPartInfo->flags */
48 ER_4K = BIT(0),
67 * command (opcode 0xd8).
87 ((_jedec_id) >> 16) & 0xff,\
88 ((_jedec_id) >> 8) & 0xff,\
[all …]
/openbmc/linux/tools/perf/pmu-events/arch/x86/amdzen4/
H A Ddata-fabric.json4 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 0.",
5 "EventCode": "0x1f",
6 "UMask": "0x7fe",
12 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 1.",
13 "EventCode": "0x5f",
14 "UMask": "0x7fe",
20 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 2.",
21 "EventCode": "0x9f",
22 "UMask": "0x7fe",
28 … "PublicDescription": "Read data beats (64 bytes) for local processor at Coherent Station (CS) 3.",
[all …]
/openbmc/linux/tools/testing/selftests/net/forwarding/
H A Dfib_offload_lib.sh1 # SPDX-License-Identifier: GPL-2.0
13 ip -n $ns -j -p -$family route show $route \
14 | jq -e '.[]["flags"] | contains(["trap"])' &> /dev/null
17 if [[ $ret -ne 0 ]]; then
18 return 0
60 RET=0
63 ip -n $ns link add name dummy$i type dummy
64 ip -n $ns link set dev dummy$i up
67 ip -n $ns route add 192.0.2.0/24 dev dummy1 tos 0 metric 1024
68 fib4_trap_check $ns "192.0.2.0/24 dev dummy1 tos 0 metric 1024" false
[all …]
/openbmc/linux/drivers/mtd/nand/spi/
H A Dmacronix.c1 // SPDX-License-Identifier: GPL-2.0
12 #define SPINAND_MFR_MACRONIX 0xC2
13 #define MACRONIX_ECCSR_MASK 0x0F
16 SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
17 SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
18 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
19 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
22 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
23 SPINAND_PROG_LOAD(false, 0, NULL, 0));
26 SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
[all …]
/openbmc/linux/arch/arm64/boot/dts/amazon/
H A Dalpine-v3.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 compatible = "amazon,al-alpine-v3";
14 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 #address-cells = <1>;
21 #size-cells = <0>;
23 cpu@0 {
[all …]

12345678910>>...44