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/openbmc/linux/drivers/media/platform/renesas/rzg2l-cru/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
4 tristate "RZ/G2L MIPI CSI-2 Receiver"
13 Support for Renesas RZ/G2L (and alike SoC's) MIPI CSI-2
17 module will be called rzg2l-csi2.
29 Support for Renesas RZ/G2L (and alike SoC's) Camera Receiving
33 module will be called rzg2l-cru.
/openbmc/linux/arch/m68k/include/asm/
H A Damigahw.h2 ** asm-m68k/amigahw.h -- This header defines some macros and pointers for
21 #include <asm/bootinfo-amiga.h>
54 AMIGAHW_DECLARE(A3000_SCSI); /* SCSI (wd33c93, A3000 alike) */
55 AMIGAHW_DECLARE(A4000_SCSI); /* SCSI (ncr53c710, A4000T alike) */
56 AMIGAHW_DECLARE(A1200_IDE); /* IDE (A1200 alike) */
57 AMIGAHW_DECLARE(A4000_IDE); /* IDE (A4000 alike) */
65 AMIGAHW_DECLARE(A2000_CLK); /* Hardware Clock (A2000 alike) */
66 AMIGAHW_DECLARE(A3000_CLK); /* Hardware Clock (A3000 alike) */
244 #define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase)
292 unsigned int :28, cntrl1:4; /* control-byte 1 */
[all …]
H A Dmac_via.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 * via them as are assorted bits and bobs - eg rtc, adb. The picture
59 * state-control line SEL" on all but IIfx
83 /* Macintosh Family Hardware sez: bits 0-2 of VIA1A are volume control
85 * On IIci,IIfx, bits 1-2 are the rest of the CPU ID:
89 * CHRP sez: VIA1A bits 0-2 and 5 are 'unused': if programmed as
112 #define VIA1B_vRTCClk 0x02 /* Real time clock serial-clock line. */
113 #define VIA1B_vRTCData 0x01 /* Real time clock serial-data line. */
117 * correspond to a VIA work-alike named 'EVR'. */
132 * defines the 'Video IRQ' as 0x40 for the 'EVR' VIA work-alike.
[all …]
/openbmc/linux/Documentation/devicetree/bindings/media/
H A Drenesas,rzg2l-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-csi2.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) MIPI CSI-2 receiver
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
14 The CSI-2 receiver device provides MIPI CSI-2 capabilities for the Renesas RZ/G2L
15 (and alike SoCs). MIPI CSI-2 is part of the CRU block which is used in conjunction
21 - enum:
22 - renesas,r9a07g044-csi2 # RZ/G2{L,LC}
[all …]
H A Drenesas,rzg2l-cru.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/media/renesas,rzg2l-cru.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Renesas RZ/G2L (and alike SoC's) Camera Data Receiving Unit (CRU) Image processing
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
15 color space conversion, LUT, pixel format conversion, etc. An MIPI CSI-2 input and
16 parallel (including ITU-R BT.656) input are provided as the image sensor interface.
21 - enum:
22 - renesas,r9a07g044-cru # RZ/G2{L,LC}
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/openbmc/openbmc/poky/documentation/
H A Dboilerplate.rst1 .. SPDX-License-Identifier: CC-BY-SA-2.0-UK
3 .. include:: <xhtml1-lat1.txt>
4 .. include:: <xhtml1-symbol.txt>
6 ----
12 terms of the `Creative Commons Attribution-Share Alike 2.0 UK: England & Wales
13 <https://creativecommons.org/licenses/by-sa/2.0/uk/>`__ as published by Creative
/openbmc/linux/Documentation/devicetree/bindings/soc/renesas/
H A Drenesas,r9a09g011-sys.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas,r9a09g011-sys.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 The RZ/V2M-alike SYS (System Configuration) controls the overall
15 - Bank address settings for DMAC
16 - Bank address settings of the units for ICB
17 - ETHER AxCACHE[1] (C bit) control function
18 - RAMA initialization control
[all …]
H A Drenesas,rzg2l-sysc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/renesas/renesas,rzg2l-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 The RZ/{G2L,V2L}-alike System Controller (SYSC) performs system control of
15 - External terminal state capture function
16 - 34-bit address space access function
17 - Low power consumption control
18 - WDT stop control
[all …]
/openbmc/linux/drivers/media/usb/gspca/stv06xx/
H A Dstv06xx_st6422.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * st6422 stv06xx alike bridge, as its integrated there are no i2c writes
9 * Strongly based on qc-usb-messenger, which is:
10 * Copyright (c) 2001 Jean-Fredric Clere, Nikolas Zimmermann, Georg Acher
11 * Mark Cave-Ayland, Carlo E Prelz, Dick Streefland
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Drz-smarc-cru-csi-ov5645.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Common Device Tree for the RZ/G2L SMARC EVK (and alike EVKs) with
11 compatible = "regulator-fixed";
12 regulator-name = "camera_vdddo";
13 regulator-min-microvolt = <1800000>;
14 regulator-max-microvolt = <1800000>;
15 regulator-always-on;
19 compatible = "regulator-fixed";
20 regulator-name = "camera_vdda";
21 regulator-min-microvolt = <2800000>;
[all …]
/openbmc/linux/arch/mips/include/asm/
H A Dmipsprom.h1 /* SPDX-License-Identifier: GPL-2.0 */
42 /* Libc alike stuff */
/openbmc/linux/tools/testing/selftests/arm64/signal/
H A DREADME7 - Tests are built around a common main compilation unit: such shared main
9 signal-test (setup/trigger/run/result/cleanup)
11 - The above mentioned ops are configurable on a test-by-test basis: each test
14 - Each signal testcase is compiled into its own executable: a separate
20 - New tests can be simply defined in testcases/ dir providing a proper struct
24 - Signals' test-cases hereafter defined belong currently to two
27 - 'mangle_' tests: a real signal (SIGUSR1) is raised and used as a trigger
31 - 'fake_sigreturn_' tests: a brand new custom artificial sigframe structure
36 - Most of these tests are successfully passing if the process gets killed by
38 kind of tests it is extremely easy in fact to end-up injecting other
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/openbmc/openbmc/poky/meta/files/common-licenses/
H A DCC-BY-NC-SA-2.0-UK1 Creative Commons Attribution - Non-Commercial - Share-Alike 2.0 England and Wales
3 …HIS LICENCE DOES NOT CREATE AN ATTORNEY-CLIENT RELATIONSHIP. CREATIVE COMMONS PROVIDES THIS INFORM…
25 …cal composition or sound recording, the synchronization of the Work in timed-relation with a movin…
29 …eans the following high-level licence attributes indicated in the title of this Licence: Attributi…
31-Commercial" means "not primarily intended for or directed towards commercial advantage or private…
41 2.1 The Licensor hereby grants to You a worldwide, royalty-free, non-exclusive, Licence for Non-Com…
147 …Commons. Any permitted use will be in compliance with Creative Commons' then-current trademark usa…
H A DCC-BY-SA-2.0-UK1 Creative Commons Attribution - Share-Alike 2.0 England and Wales
3 …HIS LICENCE DOES NOT CREATE AN ATTORNEY-CLIENT RELATIONSHIP. CREATIVE COMMONS PROVIDES THIS INFORM…
25 …cal composition or sound recording, the synchronization of the Work in timed-relation with a movin…
29 …ments" means the following high-level licence attributes indicated in the title of this Licence: A…
39 2.1 The Licensor hereby grants to You a worldwide, royalty-free, non-exclusive, Licence for use and…
145 …Commons. Any permitted use will be in compliance with Creative Commons' then-current trademark usa…
H A DParity-7.0.03 Contributor: Artless Devices, LLC [US-CA]
9 …ou to use and share this software for free, but you have to share software that builds on it alike.
29 2. You don't share it outside the team developing it, other than for non-production user testing.
43 …ses/LICENSE-2.0.html), [the MIT license](https://spdx.org/licenses/MIT.html), or [the two-clause B…
H A DCatharon2 ----------------------------
4 2000-Jul-04
21 alike. As a consequence, its main points are that:
27 full form, without having to pay us. (`royalty-free' usage)
45 --------------
68 --------------
78 -----------------
80 This license grants a worldwide, royalty-free, perpetual and
105 --------------
H A DODbL-1.032 ------
70 by member states), which includes the Extraction and Re-utilisation of
78 Re-utilising the whole or a Substantial part of the Contents in a new
103 "Re-utilisation" &#8211; means any form of making available to the public all
109 Re-utilisation of insubstantial parts of the Contents may amount to the
110 Extraction or Re-utilisation of a Substantial part of the Contents.
150 Re-utilisation of the whole or a Substantial part of the Contents.
184 grants to You a worldwide, royalty-free, non-exclusive, terminable (but
194 a. Extraction and Re-utilisation of the whole or a Substantial part of
212 a. Non-waivable compulsory license schemes. In those jurisdictions in
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/openbmc/linux/drivers/irqchip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
121 tristate "Broadcom STB 7038-style L1/L2 interrupt controller driver"
129 tristate "Broadcom STB 7120-style L2 interrupt controller driver"
211 bool "J-Core integrated AIC" if COMPILE_TEST
215 Support for the J-Core integrated AIC.
226 interrupt pins, as found on SH/R-Mobile and R-Car Gen1 SoCs.
229 bool "Renesas R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} IRQC support" if COMPILE_TEST
234 devices, as found on R-Mobile APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs.
244 bool "Renesas RZ/G2L (and alike SoC) IRQC support" if COMPILE_TEST
248 Enable support for the Renesas RZ/G2L (and alike SoC) Interrupt Controller
[all …]
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Drenesas,rzg2l-cpg.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,rzg2l-cpg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 On Renesas RZ/{G2L,V2L}-alike SoC's, the CPG (Clock Pulse Generator) and Module
18 - The CPG block generates various core clocks,
19 - The Module Standby Mode block provides two functions:
27 - renesas,r9a07g043-cpg # RZ/G2UL{Type-1,Type-2} and RZ/Five
28 - renesas,r9a07g044-cpg # RZ/G2{L,LC}
[all …]
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dsprd,spi-adi.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/sprd,spi-adi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Orson Zhai <orsonzhai@gmail.com>
11 - Baolin Wang <baolin.wang7@gmail.com>
12 - Chunyan Zhang <zhang.lyra@gmail.com>
15 ADI is the abbreviation of Anolog-Digital interface, which is used to access
17 framework for its hardware implementation is alike to SPI bus and its timing
28 Thus we introduce one property named "sprd,hw-channels" to configure hardware
[all …]
/openbmc/linux/Documentation/userspace-api/media/v4l/
H A Dtuner.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
83 ioctls are used for TV and radio devices alike. Drivers must support
/openbmc/linux/drivers/counter/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
58 module will be called ftm-quaddec.
69 will be called intel-qep.
79 module will be called interrupt-cnt.
91 module will be called microchip-tcb-capture.
97 Enable support for MTU3a counter driver found on Renesas RZ/G2L alike
[all …]
/openbmc/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Biju Das <biju.das.jz@bp.renesas.com>
14 RZ/G2L alike family of SoC's. The encoder can operate in DSI mode, with
18 - $ref: /schemas/display/dsi-controller.yaml#
23 - enum:
24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC}
25 - renesas,r9a07g054-mipi-dsi # RZ/V2L
26 - const: renesas,rzg2l-mipi-dsi
[all …]
/openbmc/linux/Documentation/arch/x86/
H A Dentry_64.rst1 .. SPDX-License-Identifier: GPL-2.0
16 for 64-bit, arch/x86/entry/entry_32.S for 32-bit and finally
17 arch/x86/entry/entry_64_compat.S which implements the 32-bit compatibility
18 syscall entry points and thus provides for 32-bit processes the
19 ability to execute syscalls when running on 64-bit kernels.
25 - system_call: syscall instruction from 64-bit code.
27 - entry_INT80_compat: int 0x80 from 32-bit or 64-bit code; compat syscall
30 - entry_INT80_compat, ia32_sysenter: syscall and sysenter from 32-bit
33 - interrupt: An array of entries. Every IDT vector that doesn't
36 magically-generated functions that make their way to common_interrupt()
[all …]
/openbmc/linux/drivers/net/ethernet/dec/tulip/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "DEC - Tulip devices"
114 the TX9882 chip on the Compex RL100-ATX board.
147 It should work with most DEC 21*4*-based chips/ethercards, as well
148 as with work-alike chips from Lite-On (PNIC) and Macronix (MXIC) and

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