1*3d52973dSLad Prabhakar// SPDX-License-Identifier: GPL-2.0 2*3d52973dSLad Prabhakar/* 3*3d52973dSLad Prabhakar * Common Device Tree for the RZ/G2L SMARC EVK (and alike EVKs) with 4*3d52973dSLad Prabhakar * OV5645 camera connected to CSI and CRU enabled. 5*3d52973dSLad Prabhakar * 6*3d52973dSLad Prabhakar * Copyright (C) 2023 Renesas Electronics Corp. 7*3d52973dSLad Prabhakar */ 8*3d52973dSLad Prabhakar 9*3d52973dSLad Prabhakar&{/} { 10*3d52973dSLad Prabhakar ov5645_vdddo_1v8: 1p8v { 11*3d52973dSLad Prabhakar compatible = "regulator-fixed"; 12*3d52973dSLad Prabhakar regulator-name = "camera_vdddo"; 13*3d52973dSLad Prabhakar regulator-min-microvolt = <1800000>; 14*3d52973dSLad Prabhakar regulator-max-microvolt = <1800000>; 15*3d52973dSLad Prabhakar regulator-always-on; 16*3d52973dSLad Prabhakar }; 17*3d52973dSLad Prabhakar 18*3d52973dSLad Prabhakar ov5645_vdda_2v8: 2p8v { 19*3d52973dSLad Prabhakar compatible = "regulator-fixed"; 20*3d52973dSLad Prabhakar regulator-name = "camera_vdda"; 21*3d52973dSLad Prabhakar regulator-min-microvolt = <2800000>; 22*3d52973dSLad Prabhakar regulator-max-microvolt = <2800000>; 23*3d52973dSLad Prabhakar regulator-always-on; 24*3d52973dSLad Prabhakar }; 25*3d52973dSLad Prabhakar 26*3d52973dSLad Prabhakar ov5645_vddd_1v5: 1p5v { 27*3d52973dSLad Prabhakar compatible = "regulator-fixed"; 28*3d52973dSLad Prabhakar regulator-name = "camera_vddd"; 29*3d52973dSLad Prabhakar regulator-min-microvolt = <1500000>; 30*3d52973dSLad Prabhakar regulator-max-microvolt = <1500000>; 31*3d52973dSLad Prabhakar regulator-always-on; 32*3d52973dSLad Prabhakar }; 33*3d52973dSLad Prabhakar 34*3d52973dSLad Prabhakar ov5645_fixed_clk: osc25250-clk { 35*3d52973dSLad Prabhakar compatible = "fixed-clock"; 36*3d52973dSLad Prabhakar #clock-cells = <0>; 37*3d52973dSLad Prabhakar clock-frequency = <24000000>; 38*3d52973dSLad Prabhakar }; 39*3d52973dSLad Prabhakar}; 40*3d52973dSLad Prabhakar 41*3d52973dSLad Prabhakar&cru { 42*3d52973dSLad Prabhakar status = "okay"; 43*3d52973dSLad Prabhakar}; 44*3d52973dSLad Prabhakar 45*3d52973dSLad Prabhakar&csi2 { 46*3d52973dSLad Prabhakar status = "okay"; 47*3d52973dSLad Prabhakar 48*3d52973dSLad Prabhakar ports { 49*3d52973dSLad Prabhakar port@0 { 50*3d52973dSLad Prabhakar csi2_in: endpoint { 51*3d52973dSLad Prabhakar clock-lanes = <0>; 52*3d52973dSLad Prabhakar data-lanes = <1 2>; 53*3d52973dSLad Prabhakar remote-endpoint = <&ov5645_ep>; 54*3d52973dSLad Prabhakar }; 55*3d52973dSLad Prabhakar }; 56*3d52973dSLad Prabhakar }; 57*3d52973dSLad Prabhakar}; 58*3d52973dSLad Prabhakar 59*3d52973dSLad Prabhakar&OV5645_PARENT_I2C { 60*3d52973dSLad Prabhakar #address-cells = <1>; 61*3d52973dSLad Prabhakar #size-cells = <0>; 62*3d52973dSLad Prabhakar 63*3d52973dSLad Prabhakar ov5645: camera@3c { 64*3d52973dSLad Prabhakar compatible = "ovti,ov5645"; 65*3d52973dSLad Prabhakar reg = <0x3c>; 66*3d52973dSLad Prabhakar clocks = <&ov5645_fixed_clk>; 67*3d52973dSLad Prabhakar clock-frequency = <24000000>; 68*3d52973dSLad Prabhakar vdddo-supply = <&ov5645_vdddo_1v8>; 69*3d52973dSLad Prabhakar vdda-supply = <&ov5645_vdda_2v8>; 70*3d52973dSLad Prabhakar vddd-supply = <&ov5645_vddd_1v5>; 71*3d52973dSLad Prabhakar 72*3d52973dSLad Prabhakar port { 73*3d52973dSLad Prabhakar ov5645_ep: endpoint { 74*3d52973dSLad Prabhakar clock-lanes = <0>; 75*3d52973dSLad Prabhakar data-lanes = <1 2>; 76*3d52973dSLad Prabhakar remote-endpoint = <&csi2_in>; 77*3d52973dSLad Prabhakar }; 78*3d52973dSLad Prabhakar }; 79*3d52973dSLad Prabhakar }; 80*3d52973dSLad Prabhakar}; 81