Searched defs:ccsr_gur (Results 1 – 5 of 5) sorted by relevance
224 struct ccsr_gur { struct225 u32 porsr1; /* POR status 1 */227 u32 porsr2; /* POR status 2 */228 u8 res_008[0x20-0x8];229 u32 gpporcr1; /* General-purpose POR configuration */230 u32 gpporcr2;235 u32 dcfg_fusesr; /* Fuse status register */236 u8 res_02c[0x70-0x2c];237 u32 devdisr; /* Device disable control */250 u32 devdisr2; /* Device disable control 2 */[all …]
255 struct ccsr_gur { struct256 u32 porsr1; /* POR status 1 */257 u32 porsr2; /* POR status 2 */258 u8 res_008[0x20-0x8];259 u32 gpporcr1; /* General-purpose POR configuration */260 u32 gpporcr2; /* General-purpose POR configuration 2 */261 u32 gpporcr3;262 u32 gpporcr4;263 u8 res_030[0x60-0x30];273 u32 dcfg_fusesr; /* Fuse status register */[all …]
92 struct ccsr_gur { struct93 u32 porsr1; /* POR status 1 */94 u32 porsr2; /* POR status 2 */95 u8 res_008[0x20-0x8];96 u32 gpporcr1; /* General-purpose POR configuration */97 u32 gpporcr2;98 u32 dcfg_fusesr; /* Fuse status register */99 u8 res_02c[0x70-0x2c];100 u32 devdisr; /* Device disable control */101 u32 devdisr2; /* Device disable control 2 */[all …]
1586 typedef struct ccsr_gur { struct1587 u32 porsr1; /* POR status 1 */1588 u32 porsr2; /* POR status 2 */1595 u8 res_008[0x20-0x8];1596 u32 gpporcr1; /* General-purpose POR configuration */1597 u32 gpporcr2; /* General-purpose POR configuration 2 */1598 u32 dcfg_fusesr; /* Fuse status register */1603 u8 res_02c[0x70-0x2c];1604 u32 devdisr; /* Device disable control */1605 u32 devdisr2; /* Device disable control 2 */[all …]
1074 typedef struct ccsr_gur { struct1075 uint porpllsr; /* 0xe0000 - POR PLL ratio status register */1076 uint porbmsr; /* 0xe0004 - POR boot mode status register */1077 uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */1078 uint pordevsr; /* 0xe000c - POR I/O device status regsiter */1079 uint pordbgmsr; /* 0xe0010 - POR debug mode status register */1080 char res1[12];1081 uint gpporcr; /* 0xe0020 - General-purpose POR configuration register */1082 char res2[12];1083 uint gpiocr; /* 0xe0030 - GPIO control register */[all …]