Revision tags: v9.1.0 |
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b36a32ea |
| 19-Apr-2024 |
Jinjie Ruan <ruanjinjie@huawei.com> |
target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson
target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-7-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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d780d056 |
| 18-Jan-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handle
target/arm: Move ARM_CPU_IRQ/FIQ definitions to 'cpu-qom.h' header
The ARM_CPU_IRQ/FIQ definitions are used to index the GPIO IRQ created calling qdev_init_gpio_in() in ARMCPU instance_init() handler. To allow non-ARM code to raise interrupt on ARM cores, move they to 'target/arm/cpu-qom.h' which is non-ARM specific and can be included by any hw/ file.
File list to include the new header generated using:
$ git grep -wEl 'ARM_CPU_(\w*IRQ|FIQ)'
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-18-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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22036ae5 |
| 18-Jan-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/arm: Expose M-profile register bank index definitions
The ARMv7M QDev container accesses the QDev SysTickState by its secure/non-secure bank index. In order to make the "hw/intc/armv7m_nvic.h
target/arm: Expose M-profile register bank index definitions
The ARMv7M QDev container accesses the QDev SysTickState by its secure/non-secure bank index. In order to make the "hw/intc/armv7m_nvic.h" header target-agnostic in the next commit, first move the M-profile bank index definitions to "target/arm/cpu-qom.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-16-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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9ab3ac5a |
| 18-Jan-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'
Missed in commit 2d56be5a29 ("target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'"). See it for more details.
Signed-off-by: Philippe
target/arm: Declare ARM_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'
Missed in commit 2d56be5a29 ("target: Declare FOO_CPU_TYPE_NAME/SUFFIX in 'cpu-qom.h'"). See it for more details.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240118200643.29037-12-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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9348028e |
| 13-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target: Move ArchCPUClass definition to 'cpu.h'
The OBJECT_DECLARE_CPU_TYPE() macro forward-declares each ArchCPUClass type. These forward declarations are sufficient for code in hw/ to use the QOM
target: Move ArchCPUClass definition to 'cpu.h'
The OBJECT_DECLARE_CPU_TYPE() macro forward-declares each ArchCPUClass type. These forward declarations are sufficient for code in hw/ to use the QOM definitions. No need to expose these structure definitions. Keep each local to their target/ by moving them to the corresponding "cpu.h" header.
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-13-philmd@linaro.org>
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f6524ddf |
| 13-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h'
These definitions and declarations are only used by target/arm/, no need to expose them to generic hw/.
Reviewed-by: Richard Hende
target/arm: Move internal declarations from 'cpu-qom.h' to 'cpu.h'
These definitions and declarations are only used by target/arm/, no need to expose them to generic hw/.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-4-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <c48c9829-3dfa-79cf-3042-454fda0d00dc@linaro.org>
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336588a2 |
| 06-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target: Mention 'cpu-qom.h' is target agnostic
"target/foo/cpu-qom.h" is supposed to be target agnostic (include-able by any target). Add such mention in the header.
Signed-off-by: Philippe Mathieu
target: Mention 'cpu-qom.h' is target agnostic
"target/foo/cpu-qom.h" is supposed to be target agnostic (include-able by any target). Add such mention in the header.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231013140116.255-3-philmd@linaro.org>
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6ee45fac |
| 13-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
target: Unify QOM style
Enforce the style described by commit 067109a11c ("docs/devel: mention the spacing requirement for QOM"):
The first declaration of a storage or class structure should al
target: Unify QOM style
Enforce the style described by commit 067109a11c ("docs/devel: mention the spacing requirement for QOM"):
The first declaration of a storage or class structure should always be the parent and leave a visual space between that declaration and the new code. It is also useful to separate backing for properties (options driven by the user) and internal state to make navigation easier.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Message-Id: <20231013140116.255-2-philmd@linaro.org>
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85c90d45 |
| 13-Oct-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot.h'
struct arm_boot_info is declared in "hw/arm/boot.h". By including the correct header we don't need to declare it again in "targe
hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot.h'
struct arm_boot_info is declared in "hw/arm/boot.h". By including the correct header we don't need to declare it again in "target/arm/cpu-qom.h".
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20231013130214.95742-1-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.0.0, v7.2.0 |
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9130cade |
| 24-Nov-2022 |
Peter Maydell <peter.maydell@linaro.org> |
target/arm: Convert to 3-phase reset
Convert the Arm CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more.
Signed-off-by: Peter Maydell <peter.maydell@
target/arm: Convert to 3-phase reset
Convert the Arm CPU class to use 3-phase reset, so it doesn't need to use device_class_set_parent_reset() any more.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20221124115023.2437291-3-peter.maydell@linaro.org
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Revision tags: v7.0.0 |
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9295b1aa |
| 14-Feb-2022 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro
Replace the boilerplate code to declare CPU QOM types and macros, and forward-declare the CPU instance type.
Reviewed-by: Richard Henderson
target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro
Replace the boilerplate code to declare CPU QOM types and macros, and forward-declare the CPU instance type.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220214183144.27402-14-f4bug@amsat.org>
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Revision tags: v6.2.0, v6.1.0, v5.2.0 |
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c122bca9 |
| 23-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ericb/tags/pull-bitmaps-2020-09-21' into staging bitmaps patches for 2020-09-21 - Eric Blake: Improve 'qemu-img bitmap --merge' by not opening
Merge remote-tracking branch 'remotes/ericb/tags/pull-bitmaps-2020-09-21' into staging bitmaps patches for 2020-09-21 - Eric Blake: Improve 'qemu-img bitmap --merge' by not opening backing images # gpg: Signature made Tue 22 Sep 2020 01:58:31 BST # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-bitmaps-2020-09-21: qemu-img: Support bitmap --merge into backing image Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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0fc01428 |
| 22-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/input-20200921-pull-request' into staging input: tsc2xxx fix. # gpg: Signature made Mon 21 Sep 2020 12:09:17 BST # gpg:
Merge remote-tracking branch 'remotes/kraxel/tags/input-20200921-pull-request' into staging input: tsc2xxx fix. # gpg: Signature made Mon 21 Sep 2020 12:09:17 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/input-20200921-pull-request: hw/input/tsc2xxx: Reduce MouseTransformInfo structure exposure Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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edf6ea6f |
| 22-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200921-pull-request' into staging usb: fix u2f build usb: fix ohci oob access and loop issues # gpg: Signature made Mon 2
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20200921-pull-request' into staging usb: fix u2f build usb: fix ohci oob access and loop issues # gpg: Signature made Mon 21 Sep 2020 09:58:06 BST # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20200921-pull-request: hw: usb: hcd-ohci: check for processed TD before retire hw: usb: hcd-ohci: check len and frame_number variables usb: fix u2f build Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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834b9273 |
| 22-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging Pull request trivial patches 20200919 # gpg: Signature made Sat 19 Sep 2020 19:4
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging Pull request trivial patches 20200919 # gpg: Signature made Sat 19 Sep 2020 19:43:35 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-5.2-pull-request: contrib/: fix some comment spelling errors qapi/: fix some comment spelling errors disas/: fix some comment spelling errors linux-user/: fix some comment spelling errors util/: fix some comment spelling errors scripts/: fix some comment spelling errors docs/: fix some comment spelling errors migration/: fix some comment spelling errors qemu/: fix some comment spelling errors scripts/git.orderfile: Display meson files along with buildsys ones hw/timer/hpet: Fix debug format strings hw/timer/hpet: Remove unused functions hpet_ram_readb, hpet_ram_readw meson: remove empty else and duplicated gio deps manual: escape backslashes in "parsed-literal" blocks ui/spice-input: Remove superfluous forward declaration hw/ppc/ppc4xx_pci: Replace magic value by the PCI_NUM_PINS definition hw/gpio/max7310: Remove impossible check Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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4dad0a9a |
| 21-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging QOM queue, 2020-09-18 Fixes: * Error value corrections (Markus Armbruster) * Corr
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging QOM queue, 2020-09-18 Fixes: * Error value corrections (Markus Armbruster) * Correct object_class_dynamic_cast_assert() documentation (Eduardo Habkost) * Ensure objects using QEMU_ALIGNED are properly aligned (Richard Henderson) QOM cleanups (Eduardo Habkost): * Rename some constants * Simplify parameters of OBJECT_DECLARE* macros * Additional DECLARE_*CHECKER* usage * Additional OBJECT_DECLARE_TYPE usage * Additional OBJECT_DECLARE_SIMPLE_TYPE usage # gpg: Signature made Fri 18 Sep 2020 21:45:29 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: Use OBJECT_DECLARE_SIMPLE_TYPE when possible Use OBJECT_DECLARE_TYPE when possible qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros qom: Remove ParentClassType argument from OBJECT_DECLARE_SIMPLE_TYPE scripts/codeconverter: Update to latest version target/s390x: Set instance_align on S390CPU TypeInfo target/riscv: Set instance_align on RISCVCPU TypeInfo target/ppc: Set instance_align on PowerPCCPU TypeInfo target/arm: Set instance_align on CPUARM TypeInfo qom: Allow objects to be allocated with increased alignment qom: Correct error values in two contracts qom: Clean up object_property_get_enum()'s error value qom: Correct object_class_dynamic_cast_assert() documentation sifive: Use DECLARE_*CHECKER* macros sifive: Move QOM typedefs and add missing includes sifive_u: Rename memmap enum constants sifive_e: Rename memmap enum constants Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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30b5707c |
| 16-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros One of the goals of having less boilerplate on QOM declarations is to avoid human error. Requiring an extra argument th
qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros One of the goals of having less boilerplate on QOM declarations is to avoid human error. Requiring an extra argument that is never used is an opportunity for mistakes. Remove the unused argument from OBJECT_DECLARE_TYPE and OBJECT_DECLARE_SIMPLE_TYPE. Coccinelle patch used to convert all users of the macros: @@ declarer name OBJECT_DECLARE_TYPE; identifier InstanceType, ClassType, lowercase, UPPERCASE; @@ OBJECT_DECLARE_TYPE(InstanceType, ClassType, - lowercase, UPPERCASE); @@ declarer name OBJECT_DECLARE_SIMPLE_TYPE; identifier InstanceType, lowercase, UPPERCASE; @@ OBJECT_DECLARE_SIMPLE_TYPE(InstanceType, - lowercase, UPPERCASE); Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Acked-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200916182519.415636-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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f00f57f3 |
| 13-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging This PR includes multiple fixes and features for RISC-V: - Fixes a bug in printing trap ca
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging This PR includes multiple fixes and features for RISC-V: - Fixes a bug in printing trap causes - Allows 16-bit writes to the SiFive test device. This fixes the failure to reboot the RISC-V virt machine - Support for the Microchip PolarFire SoC and Icicle Kit - A reafactor of RISC-V code out of hw/riscv # gpg: Signature made Thu 10 Sep 2020 19:08:06 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits) hw/riscv: Sort the Kconfig options in alphabetical order hw/riscv: Drop CONFIG_SIFIVE hw/riscv: Always build riscv_hart.c hw/riscv: Move sifive_test model to hw/misc hw/riscv: Move sifive_uart model to hw/char hw/riscv: Move riscv_htif model to hw/char hw/riscv: Move sifive_plic model to hw/intc hw/riscv: Move sifive_clint model to hw/intc hw/riscv: Move sifive_gpio model to hw/gpio hw/riscv: Move sifive_u_otp model to hw/misc hw/riscv: Move sifive_u_prci model to hw/misc hw/riscv: Move sifive_e_prci model to hw/misc hw/riscv: sifive_u: Connect a DMA controller hw/riscv: clint: Avoid using hard-coded timebase frequency hw/riscv: microchip_pfsoc: Hook GPIO controllers hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23 hw/net: cadence_gem: Add a new 'phy-addr' property hw/riscv: microchip_pfsoc: Connect a DMA controller hw/dma: Add SiFive platform DMA controller emulation ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # hw/riscv/trace-events
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3d9f371b |
| 12-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-fixes-100920-1' into staging Various misc and testing fixes: - Expand CODING_STYLE.rst a little more - usb-ho
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-fixes-100920-1' into staging Various misc and testing fixes: - Expand CODING_STYLE.rst a little more - usb-host build fix - allow check-softfloat unit tests without TCG - simplify mips imm_branch so compiler isn't confused - mark ppc64abi32 for deprecation - more compiler soothing in pch_rev_id - allow acceptance to skip missing binaries - more a bunch of plugins to contrib # gpg: Signature made Thu 10 Sep 2020 10:51:05 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-fixes-100920-1: plugins: move the more involved plugins to contrib tests/acceptance: Add Test.fetch_asset(cancel_on_missing=True) tests: bump avocado version hw/i386: make explicit clearing of pch_rev_id configure: don't enable ppc64abi32-linux-user by default docs/system/deprecated: mark ppc64abi32-linux-user for deprecation target/mips: simplify gen_compute_imm_branch logic tests/meson.build: fp tests don't need CONFIG_TCG usb-host: restrict workaround to new libusb versions CODING_STYLE.rst: flesh out our naming conventions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c47edb8d |
| 12-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/berrange-gitlab/tags/crypt-perf-pull-request' into staging Improve performance of crypto cipher subsystem # gpg: Signature made Thu 10 Sep 2020
Merge remote-tracking branch 'remotes/berrange-gitlab/tags/crypt-perf-pull-request' into staging Improve performance of crypto cipher subsystem # gpg: Signature made Thu 10 Sep 2020 11:05:18 BST # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * remotes/berrange-gitlab/tags/crypt-perf-pull-request: crypto/gcrypt: Split QCryptoCipherGcrypt into subclasses crypto/nettle: Split QCryptoCipherNettle into subclasses crypto/builtin: Split QCryptoCipherBuiltin into subclasses crypto/builtin: Split and simplify AES_encrypt_cbc crypto/builtin: Move AES_cbc_encrypt into cipher-builtin.inc.c crypto/builtin: Merge qcrypto_cipher_aes_{ecb,xts}_{en,de}crypt crypto/builtin: Remove odd-sized AES block handling crypto: Constify cipher data tables crypto: Move cipher->driver init to qcrypto_*_cipher_ctx_new crypto: Allocate QCryptoCipher with the subclass crypto: Use the correct const type for driver crypto: Move QCryptoCipherDriver typedef to crypto/cipher.h crypto/nettle: Fix xts_encrypt arguments crypto: Remove redundant includes crypto: Rename cipher include files to .c.inc crypto: Assume blocksize is a power of 2 tests: fix output message formatting for crypto benchmarks Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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842038f5 |
| 12-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging trivial patches pull request 20200911 # gpg: Signature made Fri 11 Sep 2020 20:3
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-5.2-pull-request' into staging trivial patches pull request 20200911 # gpg: Signature made Fri 11 Sep 2020 20:32:27 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-5.2-pull-request: target/i386/kvm: Add missing fallthrough comment util/hexdump: Reorder qemu_hexdump() arguments util/hexdump: Convert to take a void pointer argument hw/arm/pxa2xx: Add missing fallthrough comment target/i386/kvm: Rename host_tsx_blacklisted() as host_tsx_broken() test-vmstate: remove unnecessary code in match_interval_mapping_node hw: hyperv: vmbus: Fix 32bit compilation kconfig: fix comment referring to old Makefiles meson.build: tweak sdl-image error message hw/net/e1000e: Remove duplicated write handler for FLSWDATA register hw/net/e1000e: Remove overwritten read handler for STATUS register Makefile: Skip the meson subdir in cscope/TAGS/ctags Makefile: Drop extra phony cscope hw/gpio/max7310: Replace disabled printf() by qemu_log_mask(UNIMP) hw/gpio/omap_gpio: Replace fprintf() by qemu_log_mask(GUEST_ERROR) hw/acpi/tco: Remove unused definitions hw/isa/isa-bus: Replace hw_error() by assert() hw/mips/fuloong2e: Convert pointless error message to an assert() Signed-off-by: Peter Maydell <peter.maydell@linaro.org> # Conflicts: # net/colo-compare.c
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f4ef8c9c |
| 11-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging QOM boilerplate cleanup Documentation build fix: * memory: Remove kernel-doc comment
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging QOM boilerplate cleanup Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habkost) QOM cleanups: * Rename QOM macros for consistency between TYPE_* and type checking constants (Eduardo Habkost) QOM new macros: * OBJECT_DECLARE_* and OBJECT_DEFINE_* macros (Daniel P. Berrangé) * DECLARE_*_CHECKER macros (Eduardo Habkost) Automated QOM boilerplate changes: * Automated changes to use DECLARE_*_CHECKER (Eduardo Habkost * Automated changes to use OBJECT_DECLARE* (Eduardo Habkost) # gpg: Signature made Thu 10 Sep 2020 19:17:49 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (33 commits) virtio-vga: Use typedef name for instance_size vhost-user-vga: Use typedef name for instance_size xilinx_axienet: Use typedef name for instance_size lpc_ich9: Use typedef name for instance_size omap_intc: Use typedef name for instance_size xilinx_axidma: Use typedef name for instance_size tusb6010: Rename TUSB to TUSB6010 pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 vfio: Rename PCI_VFIO to VFIO_PCI usb: Rename USB_SERIAL_DEV to USB_SERIAL sabre: Rename SABRE_DEVICE to SABRE rs6000_mc: Rename RS6000MC_DEVICE to RS6000MC filter-rewriter: Rename FILTER_COLO_REWRITER to FILTER_REWRITER esp: Rename ESP_STATE to ESP ahci: Rename ICH_AHCI to ICH9_AHCI vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICE dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEV ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE gpex: Fix type checking function name ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c821774a |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use OBJECT_DECLARE_TYPE where possible Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed. Generated running: $ ./scripts/co
Use OBJECT_DECLARE_TYPE where possible Replace DECLARE_OBJ_CHECKERS with OBJECT_DECLARE_TYPE where the typedefs can be safely removed. Generated running: $ ./scripts/codeconverter/converter.py -i \ --pattern=DeclareObjCheckers $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200831210740.126168-16-ehabkost@redhat.com> Message-Id: <20200831210740.126168-17-ehabkost@redhat.com> Message-Id: <20200831210740.126168-18-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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8110fa1d |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use DECLARE_*CHECKER* macros Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel
Use DECLARE_*CHECKER* macros Generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]') Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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db1015e9 |
| 03-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Move QOM typedefs and add missing includes Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with O
Move QOM typedefs and add missing includes Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE. Patch generated using: $ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]') which will split "typdef struct { ... } TypedefName" declarations. Followed by: $ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]') which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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