259181d2 | 15-Apr-2024 |
Thomas Huth <thuth@redhat.com> |
hw: Add a Kconfig switch for the TYPE_CPU_CLUSTER device
The cpu-cluster device is only needed for some few arm and riscv machines. Let's avoid compiling and linking it if it is not really necessary
hw: Add a Kconfig switch for the TYPE_CPU_CLUSTER device
The cpu-cluster device is only needed for some few arm and riscv machines. Let's avoid compiling and linking it if it is not really necessary.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com> Message-ID: <20240415065655.130099-3-thuth@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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a8a9f698 | 27-Nov-2023 |
Zhao Liu <zhao1.liu@intel.com> |
hw/cpu/cluster: Cleanup unused included header in cluster.c
Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c, and reorder the remaining header files (except qemu/osdep.h) in alpha
hw/cpu/cluster: Cleanup unused included header in cluster.c
Remove unused header (qemu/module.h and qemu/cutils.h) in cluster.c, and reorder the remaining header files (except qemu/osdep.h) in alphabetical order.
Tested by "./configure" and then "make".
Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20231127145611.925817-3-zhao1.liu@linux.intel.com>
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2decc51f | 21-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
cpu/core: Register core-id and nr-threads as class properties
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated.
Signed-off-by: Eduardo
cpu/core: Register core-id and nr-threads as class properties
Class properties make QOM introspection simpler and easier, as they don't require an object to be instantiated.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <20200921221045.699690-18-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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668f62ec | 07-Jul-2020 |
Markus Armbruster <armbru@redhat.com> |
error: Eliminate error_propagate() with Coccinelle, part 1
When all we do with an Error we receive into a local variable is propagating to somewhere else, we can just as well receive it there right
error: Eliminate error_propagate() with Coccinelle, part 1
When all we do with an Error we receive into a local variable is propagating to somewhere else, we can just as well receive it there right away. Convert
if (!foo(..., &err)) { ... error_propagate(errp, err); ... return ... }
to
if (!foo(..., errp)) { ... ... return ... }
where nothing else needs @err. Coccinelle script:
@rule1 forall@ identifier fun, err, errp, lbl; expression list args, args2; binary operator op; constant c1, c2; symbol false; @@ if ( ( - fun(args, &err, args2) + fun(args, errp, args2) | - !fun(args, &err, args2) + !fun(args, errp, args2) | - fun(args, &err, args2) op c1 + fun(args, errp, args2) op c1 ) ) { ... when != err when != lbl: when strict - error_propagate(errp, err); ... when != err ( return; | return c2; | return false; ) }
@rule2 forall@ identifier fun, err, errp, lbl; expression list args, args2; expression var; binary operator op; constant c1, c2; symbol false; @@ - var = fun(args, &err, args2); + var = fun(args, errp, args2); ... when != err if ( ( var | !var | var op c1 ) ) { ... when != err when != lbl: when strict - error_propagate(errp, err); ... when != err ( return; | return c2; | return false; | return var; ) }
@depends on rule1 || rule2@ identifier err; @@ - Error *err = NULL; ... when != err
Not exactly elegant, I'm afraid.
The "when != lbl:" is necessary to avoid transforming
if (fun(args, &err)) { goto out } ... out: error_propagate(errp, err);
even though other paths to label out still need the error_propagate(). For an actual example, see sclp_realize().
Without the "when strict", Coccinelle transforms vfio_msix_setup(), incorrectly. I don't know what exactly "when strict" does, only that it helps here.
The match of return is narrower than what I want, but I can't figure out how to express "return where the operand doesn't use @err". For an example where it's too narrow, see vfio_intx_enable().
Silently fails to convert hw/arm/armsse.c, because Coccinelle gets confused by ARMSSE being used both as typedef and function-like macro there. Converted manually.
Line breaks tidied up manually. One nested declaration of @local_err deleted manually. Preexisting unwanted blank line dropped in hw/riscv/sifive_e.c.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20200707160613.848843-35-armbru@redhat.com>
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62a35aaa | 07-Jul-2020 |
Markus Armbruster <armbru@redhat.com> |
qapi: Use returned bool to check for failure, Coccinelle part
The previous commit enables conversion of
visit_foo(..., &err); if (err) { ... }
to
if (!visit_foo(..., errp)
qapi: Use returned bool to check for failure, Coccinelle part
The previous commit enables conversion of
visit_foo(..., &err); if (err) { ... }
to
if (!visit_foo(..., errp)) { ... }
for visitor functions that now return true / false on success / error. Coccinelle script:
@@ identifier fun =~ "check_list|input_type_enum|lv_start_struct|lv_type_bool|lv_type_int64|lv_type_str|lv_type_uint64|output_type_enum|parse_type_bool|parse_type_int64|parse_type_null|parse_type_number|parse_type_size|parse_type_str|parse_type_uint64|print_type_bool|print_type_int64|print_type_null|print_type_number|print_type_size|print_type_str|print_type_uint64|qapi_clone_start_alternate|qapi_clone_start_list|qapi_clone_start_struct|qapi_clone_type_bool|qapi_clone_type_int64|qapi_clone_type_null|qapi_clone_type_number|qapi_clone_type_str|qapi_clone_type_uint64|qapi_dealloc_start_list|qapi_dealloc_start_struct|qapi_dealloc_type_anything|qapi_dealloc_type_bool|qapi_dealloc_type_int64|qapi_dealloc_type_null|qapi_dealloc_type_number|qapi_dealloc_type_str|qapi_dealloc_type_uint64|qobject_input_check_list|qobject_input_check_struct|qobject_input_start_alternate|qobject_input_start_list|qobject_input_start_struct|qobject_input_type_any|qobject_input_type_bool|qobject_input_type_bool_keyval|qobject_input_type_int64|qobject_input_type_int64_keyval|qobject_input_type_null|qobject_input_type_number|qobject_input_type_number_keyval|qobject_input_type_size_keyval|qobject_input_type_str|qobject_input_type_str_keyval|qobject_input_type_uint64|qobject_input_type_uint64_keyval|qobject_output_start_list|qobject_output_start_struct|qobject_output_type_any|qobject_output_type_bool|qobject_output_type_int64|qobject_output_type_null|qobject_output_type_number|qobject_output_type_str|qobject_output_type_uint64|start_list|visit_check_list|visit_check_struct|visit_start_alternate|visit_start_list|visit_start_struct|visit_type_.*"; expression list args; typedef Error; Error *err; @@ - fun(args, &err); - if (err) + if (!fun(args, &err)) { ... }
A few line breaks tidied up manually.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Vladimir Sementsov-Ogievskiy <vsementsov@virtuozzo.com> Message-Id: <20200707160613.848843-19-armbru@redhat.com>
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5a147c8c | 10-Jun-2020 |
Markus Armbruster <armbru@redhat.com> |
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3
These are init/realize pairs produced by the previous commit's Coccinelle script where the argument test doesn't quite match. They
sysbus: Convert qdev_set_parent_bus() use with Coccinelle, part 3
These are init/realize pairs produced by the previous commit's Coccinelle script where the argument test doesn't quite match. They need even more careful review.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20200610053247.1583243-50-armbru@redhat.com>
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25f1d9f3 | 24-Feb-2020 |
Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> |
cpu/arm11mpcore: Set number of GIC priority bits to 4
The GIC built into the ARM11MPCore is always implemented with 4 priority bits; set the GIC property accordingly.
Signed-off-by: Sai Pavan Boddu
cpu/arm11mpcore: Set number of GIC priority bits to 4
The GIC built into the ARM11MPCore is always implemented with 4 priority bits; set the GIC property accordingly.
Signed-off-by: Sai Pavan Boddu <sai.pavan.boddu@xilinx.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1582537164-764-4-git-send-email-sai.pavan.boddu@xilinx.com Suggested-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: tweaked commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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