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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4 |
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| #
ba81bf44 |
| 22-Jun-2023 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Add CSI nodes
The Renesas RZ/V2M comes with 6 Clocked Serial Interface (CSI)
IPs (CSI0, CSI1, CSI2, CSI3, CSI4, CSI5), but Linux is only
allowed access to CSI0 and CS
arm64: dts: renesas: r9a09g011: Add CSI nodes
The Renesas RZ/V2M comes with 6 Clocked Serial Interface (CSI)
IPs (CSI0, CSI1, CSI2, CSI3, CSI4, CSI5), but Linux is only
allowed access to CSI0 and CSI4.
This commit adds SoC specific device tree support for CSI0 and
CSI4.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230622113341.657842-5-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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Revision tags: v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8 |
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| #
670e2a8b |
| 21-Jan-2023 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: r9a09g011: Add USB3 DRD, device and host nodes
This patch add usb3 host and peripheral device node as child of usb3 drd
node to RZ/V2M SoC dtsi. The host/device needs to issue r
arm64: dts: renesas: r9a09g011: Add USB3 DRD, device and host nodes
This patch add usb3 host and peripheral device node as child of usb3 drd
node to RZ/V2M SoC dtsi. The host/device needs to issue reset release on
DRD module before accessing host/device registers.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230121145853.4792-11-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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| #
cf67b319 |
| 18-Jan-2023 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Add PWC support
The RZ/V2M SoC contains an External Power Sequence Controller (PWC)
module. This module provides an external power supply on/off
sequence, on/off sign
arm64: dts: renesas: r9a09g011: Add PWC support
The RZ/V2M SoC contains an External Power Sequence Controller (PWC)
module. This module provides an external power supply on/off
sequence, on/off signal for the LPDDR4 core power supply, General
Purpose Outputs, and key input signals.
This patch adds PWC support to the SoC specific device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230118144747.24968-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
11ffdcdf |
| 18-Jan-2023 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Reword ethernet status
Although of_fdt_device_is_available returns true when the DT
property "status" is assigned "ok" or "okay", and false for every
other value, it'
arm64: dts: renesas: r9a09g011: Reword ethernet status
Although of_fdt_device_is_available returns true when the DT
property "status" is assigned "ok" or "okay", and false for every
other value, it's become common practice to assign "disabled"
when we want of_fdt_device_is_available to return false.
For some reason, the status property of the ethernet node was
assigned "disable" when originally added to the kernel. Change
it to "disabled" for consistency.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230118135259.19249-1-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13 |
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| #
36aa3eee |
| 13-Dec-2022 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Add eMMC and SDHI support
The RZ/V2M comes with 2 SDHI interfaces and 1 eMMC interface.
Add the relevant nodes to the SoC specific device tree.
Signed-off-by: Fabriz
arm64: dts: renesas: r9a09g011: Add eMMC and SDHI support
The RZ/V2M comes with 2 SDHI interfaces and 1 eMMC interface.
Add the relevant nodes to the SoC specific device tree.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20221213230129.549968-5-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80 |
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| #
b9e88ba6 |
| 16-Nov-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: r9a09g011: Add system controller node
Add system controller node to RZ/V2M SoC dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/202211
arm64: dts: renesas: r9a09g011: Add system controller node
Add system controller node to RZ/V2M SoC dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221116102140.852889-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v6.0.9, v5.15.79, v6.0.8, v5.15.78 |
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| #
c6b1737f |
| 10-Nov-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: r9a09g011: Add L2 Cache node
The Cortex-A53 processor on RZ/V2M has 512 KB L2 Cache.
Add L2 Cache node to SoC dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: h
arm64: dts: renesas: r9a09g011: Add L2 Cache node
The Cortex-A53 processor on RZ/V2M has 512 KB L2 Cache.
Add L2 Cache node to SoC dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20221110160931.101539-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
753a4ae1 |
| 03-Nov-2022 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Add watchdog node
The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs,
but Linux is only allowed one.
Add a node for the watchdog allowed to Linux to the SoC
s
arm64: dts: renesas: r9a09g011: Add watchdog node
The r9a09g011 (a.k.a. RZ/V2M) comes with two watchdog IPs,
but Linux is only allowed one.
Add a node for the watchdog allowed to Linux to the SoC
specific dtsi.
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20221103223956.50575-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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| #
2ac90991 |
| 07-Nov-2022 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Fix I2C SoC specific strings
The preferred form for Renesas' compatible strings is:
"<vendor>,<family>-<module>"
Somehow the compatible string for the r9a09g011 I2C
arm64: dts: renesas: r9a09g011: Fix I2C SoC specific strings
The preferred form for Renesas' compatible strings is:
"<vendor>,<family>-<module>"
Somehow the compatible string for the r9a09g011 I2C IP was upstreamed
as renesas,i2c-r9a09g011 instead of renesas,r9a09g011-i2c, which
is really confusing, especially considering the generic fallback
is renesas,rzv2m-i2c.
The first user of renesas,i2c-r9a09g011 in the kernel is not yet in
a kernel release, it will be in v6.1, therefore it can still be
fixed in v6.1.
Even if we don't fix it before v6.2, I don't think there is any
harm in making such a change.
s/renesas,i2c-r9a09g011/renesas,r9a09g011-i2c/g for consistency.
Fixes: 54ac6794df9d ("arm64: dts: renesas: r9a09g011: Add i2c nodes")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20221107165027.54150-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
278f5015 |
| 03-Nov-2022 |
Fabrizio Castro <fabrizio.castro.jz@renesas.com> |
arm64: dts: renesas: r9a09g011: Fix unit address format error
Although the HW User Manual for RZ/V2M states in the "Address Map"
section that the interrupt controller is assigned addresses starting
arm64: dts: renesas: r9a09g011: Fix unit address format error
Although the HW User Manual for RZ/V2M states in the "Address Map"
section that the interrupt controller is assigned addresses starting
from 0x82000000, the memory locations from 0x82000000 0x0x8200FFFF
are marked as reserved in the "Interrupt Controller (GIC)" section
and are currently not used by the device tree, leading to the below
warning:
arch/arm64/boot/dts/renesas/r9a09g011.dtsi:51.38-63.5: Warning
(simple_bus_reg): /soc/interrupt-controller@82000000: simple-bus unit
address format error, expected "82010000"
Fix the unit address accordingly.
Fixes: fb1929b98f2e ("arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC")
Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Link: https://lore.kernel.org/r/20221103230648.53748-2-fabrizio.castro.jz@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62 |
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| #
54ac6794 |
| 19-Aug-2022 |
Phil Edworthy <phil.edworthy@renesas.com> |
arm64: dts: renesas: r9a09g011: Add i2c nodes
Add device nodes for the I2C controllers that are not assigned to the
ISP.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.
arm64: dts: renesas: r9a09g011: Add i2c nodes
Add device nodes for the I2C controllers that are not assigned to the
ISP.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Link: https://lore.kernel.org/r/20220819193944.337599-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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Revision tags: v5.15.61, v5.15.60 |
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| #
73ca80da |
| 04-Aug-2022 |
Phil Edworthy <phil.edworthy@renesas.com> |
arm64: dts: renesas: r9a09g011: Add pinctrl node
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kern
arm64: dts: renesas: r9a09g011: Add pinctrl node
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804190846.128370-1-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41 |
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| #
4872ca1f |
| 17-May-2022 |
Phil Edworthy <phil.edworthy@renesas.com> |
arm64: dts: renesas: r9a09g011: Add ethernet nodes
Add Ethernet nodes to SoC dtsi.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link:
arm64: dts: renesas: r9a09g011: Add ethernet nodes
Add Ethernet nodes to SoC dtsi.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220517081645.3764-2-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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Revision tags: v5.15.40, v5.15.39, v5.15.38 |
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| #
fb1929b9 |
| 04-May-2022 |
Phil Edworthy <phil.edworthy@renesas.com> |
arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
Details of the SoC can be found here:
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzv2m-dual-cortex-
arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
Details of the SoC can be found here:
https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-cortex-a-mpus/rzv2m-dual-cortex-a53-lpddr4x32bit-ai-accelerator-isp-4k-video-codec-4k-camera-input-fhd-display-output
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220504094456.24386-3-phil.edworthy@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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