Revision tags: v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26 |
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#
33c7874b |
| 01-Mar-2022 |
Nícolas F. R. A. Prado <nfraprado@collabora.com> |
arm64: dts: mediatek: Format mediatek,larbs as an array of phandles
Commit 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas") updated the mediatek,larbs property in the mediatek,iommu.yaml
arm64: dts: mediatek: Format mediatek,larbs as an array of phandles
Commit 39bd2b6a3783 ("dt-bindings: Improve phandle-array schemas") updated the mediatek,larbs property in the mediatek,iommu.yaml dt-binding to make it clearer that the phandles passed to the property are independent, rather than subsequent arguments to the first phandle.
Update the mediatek,larbs property in the arm64 Devicetrees to use the same formatting. This change doesn't impact any behavior: the compiled dtb is exactly the same. It does however fix the warnings generated by dtbs_check.
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220301203147.1143782-2-nfraprado@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7 |
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#
462f6c4a |
| 06-Dec-2021 |
Maoguang Meng <maoguang.meng@mediatek.com> |
arm64: dts: mt8183: add jpeg enc node for mt8183
Add jpeg encoder device tree node.
Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Revie
arm64: dts: mt8183: add jpeg enc node for mt8183
Add jpeg encoder device tree node.
Signed-off-by: Maoguang Meng <maoguang.meng@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20211206130425.184420-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1 |
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#
7781083f |
| 02-Nov-2021 |
Seiya Wang <seiya.wang@mediatek.com> |
arm64: dts: mt8183: support coresight-cpu-debug for mt8183
Add coresight-cpu-debug nodes to mt8183 for dumping EDPRSR, EDPCSR, EDCIDSR, EDVIDSR while kernel panic happens
Signed-off-by: Seiya Wang
arm64: dts: mt8183: support coresight-cpu-debug for mt8183
Add coresight-cpu-debug nodes to mt8183 for dumping EDPRSR, EDPCSR, EDCIDSR, EDVIDSR while kernel panic happens
Signed-off-by: Seiya Wang <seiya.wang@mediatek.com> Link: https://lore.kernel.org/r/20211102090230.25013-1-seiya.wang@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10 |
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4bdb00ed |
| 30-Sep-2021 |
Enric Balletbo i Serra <enric.balletbo@collabora.com> |
arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel.
While here, also remove the undoc
arm64: dts: mt8183: Add the mmsys reset bit to reset the dsi0
Reset the DSI hardware is needed to prevent different settings between the bootloader and the kernel.
While here, also remove the undocumented and also not used 'mediatek,syscon-dsi' property.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210930103105.v4.5.I933f1532d7a1b2910843a9644c86a7d94a4b44e1@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
f07c776f |
| 30-Sep-2021 |
Enric Balletbo i Serra <enric.balletbo@collabora.com> |
arm64: dts: mediatek: Move reset controller constants into common location
The DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the Mediatek reset constants
arm64: dts: mediatek: Move reset controller constants into common location
The DT binding includes for reset controllers are located in include/dt-bindings/reset/. Move the Mediatek reset constants in there.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Link: https://lore.kernel.org/r/20210930103105.v4.1.I514d9aafff3a062f751b37d3fea7402f67595b86@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49 |
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#
13dd23cf |
| 06-Jul-2021 |
Kansho Nishida <kansho@chromium.org> |
arm64: dts: mt8183: add audio node
Add afe (audio front end) device node to the MT8183 dtsi.
Signed-off-by: Kansho Nishida <kansho@chromium.org> Link: https://lore.kernel.org/r/20210706190111.v3.1.
arm64: dts: mt8183: add audio node
Add afe (audio front end) device node to the MT8183 dtsi.
Signed-off-by: Kansho Nishida <kansho@chromium.org> Link: https://lore.kernel.org/r/20210706190111.v3.1.I88a52644e47e88b15f5db9841cb084dc53c5875c@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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4e233326 |
| 03-Aug-2021 |
Hsin-Yi Wang <hsinyi@chromium.org> |
arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
Move mt8183-pinfunc.h into include/dt-bindings/pinctrl so that we can include it in yaml examples.
Signed-off-by: Hsin-Yi Wang <hsinyi@
arm: dts: mt8183: Move pinfunc to include/dt-bindings/pinctrl
Move mt8183-pinfunc.h into include/dt-bindings/pinctrl so that we can include it in yaml examples.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210804044033.3047296-2-hsinyi@chromium.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Revision tags: v5.13, v5.10.46 |
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#
02912fb7 |
| 21-Jun-2021 |
Hsin-Yi Wang <hsinyi@chromium.org> |
arm64: dts: mt8183: add mediatek,gce-events in mutex
mediatek,gce-events is read by mutex node.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo
arm64: dts: mt8183: add mediatek,gce-events in mutex
mediatek,gce-events is read by mutex node.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210622030741.2120393-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39 |
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#
a8168ceb |
| 21-May-2021 |
Nicolas Boichat <drinkcat@chromium.org> |
arm64: dts: mt8183: Add node for the Mali GPU
Add a basic GPU node for mt8183, as well as OPP table.
Note that with the current panfrost driver, devfreq is not actually functional, as the we do not
arm64: dts: mt8183: Add node for the Mali GPU
Add a basic GPU node for mt8183, as well as OPP table.
Note that with the current panfrost driver, devfreq is not actually functional, as the we do not have platform-specific support for >1 supplies. Also, we are missing code to handle frequency change, as the GPU frequency needs to be switched away to a stable 26Mhz clock during the transition.
Signed-off-by: Nicolas Boichat <drinkcat@chromium.org> Link: https://lore.kernel.org/r/20210521200038.v14.1.I9f45f5c1f975422d58b5904d11546349e9ccdc94@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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507b1b28 |
| 04-Jun-2021 |
Michael Kao <michael.kao@mediatek.com> |
arm64: dts: mt8183-kukui: Add tboard thermal zones
Add tboard thermal zones. The tboard thermal sensors are a kind of NTC sensors which are located on PCB board to correlate the temperature of the c
arm64: dts: mt8183-kukui: Add tboard thermal zones
Add tboard thermal zones. The tboard thermal sensors are a kind of NTC sensors which are located on PCB board to correlate the temperature of the case (Tskin).
pull-up voltage: 1800 mv pull-up resistor: 75K
Vsense = pull-up voltage * Rntc / ( pull-up resistor + Rntc ) AuxIn = Vsense * 4096 / 1500
Signed-off-by: Michael Kao <michael.kao@mediatek.com> Signed-off-by: Ben Tseng <ben.tseng@mediatek.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210604093755.13288-1-ben.tseng@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
946437cf |
| 31-May-2021 |
Hsin-Yi Wang <hsinyi@chromium.org> |
arm64: dts: mt8183: remove syscon from smi_common node
We don't need to register smi_common as syscon. Also add required property power-domains for this node.
Signed-off-by: Hsin-Yi Wang <hsinyi@ch
arm64: dts: mt8183: remove syscon from smi_common node
We don't need to register smi_common as syscon. Also add required property power-domains for this node.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210601040014.2970805-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32 |
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#
f538437b |
| 16-Apr-2021 |
Matthias Brugger <matthias.bgg@gmail.com> |
arm64: dts: mt8183: fix dtbs_check warning
Fix unit names to make dtbs_check happy.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@coll
arm64: dts: mt8183: fix dtbs_check warning
Fix unit names to make dtbs_check happy.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210414144643.17435-2-matthias.bgg@kernel.org Link: https://lore.kernel.org/r/20210416143923.23406-3-matthias.bgg@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.10.31, v5.10.30, v5.10.27 |
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fccf4261 |
| 29-Mar-2021 |
Matthias Kaehlcke <mka@chromium.org> |
arm64: dts: mt8183: Configure CPU cooling
Add two passive trip points at 68°C and 80°C for the CPU temperature.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Michael Kao <micha
arm64: dts: mt8183: Configure CPU cooling
Add two passive trip points at 68°C and 80°C for the CPU temperature.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Signed-off-by: Michael Kao <michael.kao@mediatek.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.10.26, v5.10.25, v5.10.24 |
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#
b325ce39 |
| 16-Mar-2021 |
michael.kao <michael.kao@mediatek.com> |
arm64: dts: mt8183: add thermal zone node
Add thermal zone node to Mediatek MT8183 dts file.
Evaluate the thermal zone every 500ms while not cooling and every 100ms when passive cooling is performe
arm64: dts: mt8183: add thermal zone node
Add thermal zone node to Mediatek MT8183 dts file.
Evaluate the thermal zone every 500ms while not cooling and every 100ms when passive cooling is performed.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Michael Kao <michael.kao@mediatek.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
b7a8f50a |
| 24-Mar-2021 |
Hsin-Yi Wang <hsinyi@chromium.org> |
arm64: dts: mt8183: Add gce client reg for display subcomponents
Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT
arm64: dts: mt8183: Add gce client reg for display subcomponents
Add mediatek,gce-client-reg for mmsys, ccorr, aal, gamma, dither.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210324070842.1037233-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
d1c9c70a |
| 16-Mar-2021 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
arm64: dts: mediatek: mt8183: fix dtbs_check warning
Harmonize node names, compatibles and properties.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/202103
arm64: dts: mediatek: mt8183: fix dtbs_check warning
Harmonize node names, compatibles and properties.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/20210316092232.9806-10-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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d3cbc7f8 |
| 23-Mar-2021 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
arm64: dts: mt8183: update wakeup register offset
Use wakeup control register offset exactly, and update revision number
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.k
arm64: dts: mt8183: update wakeup register offset
Use wakeup control register offset exactly, and update revision number
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1616482975-17841-13-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
016381f3 |
| 23-Mar-2021 |
Chunfeng Yun <chunfeng.yun@mediatek.com> |
arm64: dts: mt8183: update wakeup register offset
Use wakeup control register offset exactly, and update revision number
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.k
arm64: dts: mt8183: update wakeup register offset
Use wakeup control register offset exactly, and update revision number
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Link: https://lore.kernel.org/r/1616482975-17841-13-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Revision tags: v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14 |
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18d6e3f6 |
| 31-Jan-2021 |
Matthias Brugger <mbrugger@suse.com> |
arm64: dts: mt8183: Fix GCE include path
The header file of GCE should be for MT8183 SoC instead of MT8173.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Reported-by: CK
arm64: dts: mt8183: Fix GCE include path
The header file of GCE should be for MT8183 SoC instead of MT8173.
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Reported-by: CK Hu <ck.hu@mediatek.com> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Link: https://lore.kernel.org/r/20210131101726.804-1-matthias.bgg@kernel.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
9e1b7d00 |
| 29-Jan-2021 |
Hsin-Yi Wang <hsinyi@chromium.org> |
arm64: dts: mediatek: mt8183: Add domain supply for mfg
Add domain supply node.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210129101208.2625249-4-hsinyi@chr
arm64: dts: mediatek: mt8183: Add domain supply for mfg
Add domain supply node.
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210129101208.2625249-4-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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Revision tags: v5.10 |
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#
afca1c66 |
| 09-Dec-2020 |
Fabien Parent <fparent@baylibre.com> |
arm64: dts: mediatek: mt8183: add pwm node
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/2020
arm64: dts: mediatek: mt8183: add pwm node
MT8183 SoC has 4 PWMs. Add the pwm node in order to support them.
Signed-off-by: Fabien Parent <fparent@baylibre.com> Link: https://lore.kernel.org/r/20201209120322.137610-1-fparent@baylibre.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
2f99fb6e |
| 13-Jan-2021 |
Enric Balletbo i Serra <enric.balletbo@collabora.com> |
arm64: dts: mt8183: Add missing power-domain for pwm0 node
The MT8183 display PWM device will not work until the associated power-domain is enabled. Add the power-domain reference to the node allows
arm64: dts: mt8183: Add missing power-domain for pwm0 node
The MT8183 display PWM device will not work until the associated power-domain is enabled. Add the power-domain reference to the node allows the display PWM driver to operate and the backlight turn on.
Fixes: f15722c0fef0 ("arm64: dts: mt8183: Add pwm and backlight node") Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Hsin-Yi Wang <hsinyi@chromium.org> Link: https://lore.kernel.org/r/20210113215723.71966-1-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
9a2cb5eb |
| 28-Jan-2021 |
Yongqiang Niu <yongqiang.niu@mediatek.com> |
arm64: dts: mt8183: refine gamma compatible name
mt8183 gamma is different with mt8173 remove mt8173 compatible name for mt8183 gamma
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for
arm64: dts: mt8183: refine gamma compatible name
mt8183 gamma is different with mt8173 remove mt8173 compatible name for mt8183 gamma
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210128112314.1304160-3-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
431368c2 |
| 28-Jan-2021 |
Yongqiang Niu <yongqiang.niu@mediatek.com> |
arm64: dts: mt8183: rename rdma fifo size
property name must include only lowercase and '-'
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Yongqiang Niu <yo
arm64: dts: mt8183: rename rdma fifo size
property name must include only lowercase and '-'
Fixes: 91f9c963ce79 ("arm64: dts: mt8183: Add display nodes for MT8183") Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com> Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Chun-Kuang Hu <chunkuang.hu@kernel.org> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210128112314.1304160-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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#
91f9c963 |
| 27-Nov-2020 |
Enric Balletbo i Serra <enric.balletbo@collabora.com> |
arm64: dts: mt8183: Add display nodes for MT8183
Add display subsystem device nodes to allow video output.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.ke
arm64: dts: mt8183: Add display nodes for MT8183
Add display subsystem device nodes to allow video output.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20201127104930.1981497-4-enric.balletbo@collabora.com Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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