Revision tags: v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18 |
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15bc43f3 |
| 09-Nov-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: change the time of SAS SSP connection
Currently the time of SAS SSP connection is 1ms, which means the link connection will fail if no IO response after this period.
For some disks
scsi: hisi_sas: change the time of SAS SSP connection
Currently the time of SAS SSP connection is 1ms, which means the link connection will fail if no IO response after this period.
For some disks handling large IO (such as 512k), 1ms is not enough, so change it to 5ms.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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37359798 |
| 09-Nov-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Add support for interrupt coalescing for v3 hw
If INT_COAL_EN is enabled, configure time and count of interrupt coalescing. Then if CQ collects count of CQ entries in time, it will
scsi: hisi_sas: Add support for interrupt coalescing for v3 hw
If INT_COAL_EN is enabled, configure time and count of interrupt coalescing. Then if CQ collects count of CQ entries in time, it will report the interrupt. Or if CQ doesn't collect enough CQ entries in time, it will report the interrupt at timeout.
As all the registers are not supported to be changed dynamically, we need to config those register between disable and enable PHYs.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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488cf558 |
| 09-Nov-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Add support for interrupt converge for v3 hw
If CQ_INT_CONVERGE_EN is enabled, the interrupts of all the 16 CQ queues will be reported by CQ0.
So we need to change the process of CQ
scsi: hisi_sas: Add support for interrupt converge for v3 hw
If CQ_INT_CONVERGE_EN is enabled, the interrupts of all the 16 CQ queues will be reported by CQ0.
So we need to change the process of CQ tasklet for this situation.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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c3566f9a |
| 09-Nov-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Create separate host attributes per HBA
Currently all the three HBA (v1/v2/v3 HW) share the same host attributes.
To support each HBA having separate attributes in future, create pe
scsi: hisi_sas: Create separate host attributes per HBA
Currently all the three HBA (v1/v2/v3 HW) share the same host attributes.
To support each HBA having separate attributes in future, create per-HBA attributes.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Revision tags: v4.18.17, v4.19.1, v4.19, v4.18.16 |
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e4db40e7 |
| 18-Oct-2018 |
Christoph Hellwig <hch@lst.de> |
scsi: hisi_sas: use dma_set_mask_and_coherent
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API.
Signed-off-by: C
scsi: hisi_sas: use dma_set_mask_and_coherent
The driver currently uses pci_set_dma_mask despite otherwise using the generic DMA API. Switch it over to the better generic DMA API.
Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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e34ff8ed |
| 26-Oct-2018 |
YueHaibing <yuehaibing@huawei.com> |
scsi: hisi_sas: Remove set but not used variable 'dq_list'
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c: In function 'start_delivery_v1_hw': drivers/scsi/hi
scsi: hisi_sas: Remove set but not used variable 'dq_list'
Fixes gcc '-Wunused-but-set-variable' warning:
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c: In function 'start_delivery_v1_hw': drivers/scsi/hisi_sas/hisi_sas_v1_hw.c:907:20: warning: variable 'dq_list' set but not used [-Wunused-but-set-variable]
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c: In function 'start_delivery_v2_hw': drivers/scsi/hisi_sas/hisi_sas_v2_hw.c:1671:20: warning: variable 'dq_list' set but not used [-Wunused-but-set-variable]
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c: In function 'start_delivery_v3_hw': drivers/scsi/hisi_sas/hisi_sas_v3_hw.c:889:20: warning: variable 'dq_list' set but not used [-Wunused-but-set-variable]
It never used since introduction in commit fa222db0b036 ("scsi: hisi_sas: Don't lock DQ for complete task sending")
Signed-off-by: YueHaibing <yuehaibing@huawei.com> Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Revision tags: v4.18.15, v4.18.14, v4.18.13, v4.18.12, v4.18.11, v4.18.10 |
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3bccfba8 |
| 24-Sep-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Update v3 hw AIP_LIMIT and CFG_AGING_TIME register values
Update registers as follows: - Default value of AIP timer is 1ms, and it is easy for some expanders to cause IO error. Cha
scsi: hisi_sas: Update v3 hw AIP_LIMIT and CFG_AGING_TIME register values
Update registers as follows: - Default value of AIP timer is 1ms, and it is easy for some expanders to cause IO error. Change the value to max value 65ms to avoid IO error for those expanders.
- A CQ completion will be reported by HW when 4 CQs have occurred or the aging timer expires, whichever happens first. Sor serial IO scenario, it will still wait 8us for every IO before it is reported. So in the situation, the performance is poor. So to improve it, change the limit time to the least value. For other scenario, it does little affect to the performance.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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784b46b7 |
| 24-Sep-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Use block layer tag instead for IPTT
Currently we use the IPTT defined in LLDD to identify IOs. Actually for IOs which are from the block layer, they have tags to identify them. So f
scsi: hisi_sas: Use block layer tag instead for IPTT
Currently we use the IPTT defined in LLDD to identify IOs. Actually for IOs which are from the block layer, they have tags to identify them. So for those IOs, use tag of the block layer directly, and for IOs which is not from the block layer (such as internal IOs from libsas/LLDD), reserve 96 IPTTs for them.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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6ecf5ba1 |
| 24-Sep-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: unmask interrupts ent72 and ent74
The interrupts of ent72 and ent74 are not processed by PCIe AER handling, so we need to unmask the interrupts and process them first in the driver.
scsi: hisi_sas: unmask interrupts ent72 and ent74
The interrupts of ent72 and ent74 are not processed by PCIe AER handling, so we need to unmask the interrupts and process them first in the driver.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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3e178f3e |
| 24-Sep-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Free slot later in slot_complete_vx_hw()
If an SSP/SMP IO times out, it may be actually in reality be simultaneously processing completion of the slot in slot_complete_vx_hw().
Then
scsi: hisi_sas: Free slot later in slot_complete_vx_hw()
If an SSP/SMP IO times out, it may be actually in reality be simultaneously processing completion of the slot in slot_complete_vx_hw().
Then if the slot is freed in slot_complete_vx_hw() (this IPTT is freed and it may be re-used by other slot), and we may abort the wrong slot in hisi_sas_abort_task().
So to solve the issue, free the slot after the check of SAS_TASK_STATE_ABORTED in slot_complete_vx_hw().
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Revision tags: v4.18.9, v4.18.7, v4.18.6, v4.18.5, v4.17.18, v4.18.4, v4.18.3, v4.17.17, v4.18.2, v4.17.16, v4.17.15, v4.18.1, v4.18, v4.17.14, v4.17.13, v4.17.12, v4.17.11, v4.17.10, v4.17.9 |
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f4e34f2a |
| 18-Jul-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Add SATA FIS check for v3 hw
Add a check ERR bit of status to decide whether there is something wrong with initial register-D2H FIS. If error exist, PHY link reset the channel to res
scsi: hisi_sas: Add SATA FIS check for v3 hw
Add a check ERR bit of status to decide whether there is something wrong with initial register-D2H FIS. If error exist, PHY link reset the channel to restart OOB.
Directly call work HISI_PHYE_LINK_RESET replacing disable_phy_vx_hw() and enable_phy_vx_hw().
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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1c09b663 |
| 18-Jul-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: add memory barrier in task delivery function
In task start delivery function, we need to add a memory barrier to prevent re-ordering of reading memory by hardware. Because the slot d
scsi: hisi_sas: add memory barrier in task delivery function
In task start delivery function, we need to add a memory barrier to prevent re-ordering of reading memory by hardware. Because the slot data is set in task prepare function and it could be running in another CPU.
This patch adds an memory barrier after s->ready is read in the task start delivery function, and uses WRITE_ONCE() in the places where s->ready is set to ensure that the compiler does not re-order.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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e5ea4801 |
| 18-Jul-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Implement handlers of PCIe FLR for v3 hw
This patch implements handlers of PCIe FLR for v3 hw, reset_prepare() and reset_done().
User can issue FLR through sysfs interface, as v3 hw
scsi: hisi_sas: Implement handlers of PCIe FLR for v3 hw
This patch implements handlers of PCIe FLR for v3 hw, reset_prepare() and reset_done().
User can issue FLR through sysfs interface, as v3 hw support PCIe FLR. Then if we don't implement these two handlers, our SAS controller will not work after executing FLR.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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e8ce775e |
| 18-Jul-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: relocate some common code for v3 hw
Much code of PM suspend function also exists in soft reset function. This is not concise. So, this patch relocates the common code of these two fu
scsi: hisi_sas: relocate some common code for v3 hw
Much code of PM suspend function also exists in soft reset function. This is not concise. So, this patch relocates the common code of these two functions to a separate function.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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25908cac |
| 18-Jul-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Fix the failure of recovering PHY from STP link timeout
There is an issue that link reset can't recover PHY when STP link timeout. Because current process of enabling PHY for v3 hw w
scsi: hisi_sas: Fix the failure of recovering PHY from STP link timeout
There is an issue that link reset can't recover PHY when STP link timeout. Because current process of enabling PHY for v3 hw will wait last transmission done. The time of one transmission depends IO size, disk model and so on. Normally, it should be shorter than 50ms. But the last transmission could be never done for some abnormal scenarios, such as STP link timeout.
This patch is to fix the issue. Check PHY status after starting process of enabling PHY for 50ms. If the PHY is still active, we disable it forcibly by PHY reset. Of course, we need to clear the PHY reset bit when enable PHY.
Besides, the function disable_phy_v3_hw() should not be suitable to call in interrupts for hilink bug for this 50ms delay. Then, we do link reset for hilink bug directly. The change is that we don't clear the invalid dword count register. This is better. Because we should not clear such error count while not saved.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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d9d51e0c |
| 18-Jul-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: tidy channel interrupt handler for v3 hw
The ISR of channel interrupt of v3 hw is a little long and messy. This patch tidies it by relocating CHL_INT1 and CHL_INT2 handling to new fu
scsi: hisi_sas: tidy channel interrupt handler for v3 hw
The ISR of channel interrupt of v3 hw is a little long and messy. This patch tidies it by relocating CHL_INT1 and CHL_INT2 handling to new function separately.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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Revision tags: v4.17.8, v4.17.7, v4.17.6, v4.17.5, v4.17.4, v4.17.3, v4.17.2, v4.17.1, v4.17 |
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7931cd91 |
| 31-May-2018 |
John Garry <john.garry@huawei.com> |
scsi: hisi_sas: Update a couple of register settings for v3 hw
Update CFG_1US_TIMER_TRSH and CON_CFG_DRIVER settings.
Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Pete
scsi: hisi_sas: Update a couple of register settings for v3 hw
Update CFG_1US_TIMER_TRSH and CON_CFG_DRIVER settings.
Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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ed99e1d9 |
| 31-May-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Add a flag to filter PHY events during reset
During reset, we don't want PHY events reported to libsas for PHYs which were previously attached prior to reset.
So check hisi_hba->fla
scsi: hisi_sas: Add a flag to filter PHY events during reset
During reset, we don't want PHY events reported to libsas for PHYs which were previously attached prior to reset.
So check hisi_hba->flags for HISI_SAS_RESET_BIT to filter PHY events during reset.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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214e702d |
| 31-May-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Adjust task reject period during host reset
After soft_reset() for host reset, we should not be allowed to send commands to the HW before the PHYs have come up and the port ids have
scsi: hisi_sas: Adjust task reject period during host reset
After soft_reset() for host reset, we should not be allowed to send commands to the HW before the PHYs have come up and the port ids have been refreshed.
Prior to this point, any commands cannot be successfully completed.
This exclusion is achieved by grabbing the host reset semaphore.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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1324ae1c |
| 31-May-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Only process broadcast change in phy_bcast_v3_hw()
There are many BROADCAST primitives generated by the host. We are only interested in BROADCAST (CHANGE) primitives currently, so on
scsi: hisi_sas: Only process broadcast change in phy_bcast_v3_hw()
There are many BROADCAST primitives generated by the host. We are only interested in BROADCAST (CHANGE) primitives currently, so only process this.
We have applied this processing for v2 hw before, and it is also needed for v3 hw.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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3e1fb1b8 |
| 21-May-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Mark PHY as in reset for nexus reset
When issuing a nexus reset for directly attached device, we want to ignore the PHY down events so libsas will not deform and reform the port.
In
scsi: hisi_sas: Mark PHY as in reset for nexus reset
When issuing a nexus reset for directly attached device, we want to ignore the PHY down events so libsas will not deform and reform the port.
In the case that the attached SAS changes for the reset, libsas will deform and form a port.
For scenario that the PHY does not come up after a timeout period, then report the PHY down to libsas.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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78bd2b4f |
| 21-May-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Include TMF elements in struct hisi_sas_slot
In future scenarios we will want to use the TMF struct for more task types than SSP.
As such, we can add struct hisi_sas_tmf_task direct
scsi: hisi_sas: Include TMF elements in struct hisi_sas_slot
In future scenarios we will want to use the TMF struct for more task types than SSP.
As such, we can add struct hisi_sas_tmf_task directly into struct hisi_sas_slot, and this will mean we can remove the TMF parameters from the task prep functions.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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a865ae14 |
| 21-May-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Try wait commands before before controller reset
We may reset the controller in many scenarios, such as SCSI EH and HW errors. There should be no IO which returns from target when SC
scsi: hisi_sas: Try wait commands before before controller reset
We may reset the controller in many scenarios, such as SCSI EH and HW errors. There should be no IO which returns from target when SCSI EH is active. But for other scenarios, there may be. It is not necessary to make such IOs fail.
This patch adds an function of trying to wait for any commands, or IO, to complete before host reset. If no more CQ returned from host controller in 100ms, we assume no more IO can return, and then stop waiting. We wait 5s at most.
The HW has a register CQE_SEND_CNT to indicate the total number of CQs that has been reported to driver. We can use this register and it is reliable to resd this register in such scenarios that require host reset.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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235bfc7f |
| 21-May-2018 |
Xiang Chen <chenxiang66@hisilicon.com> |
scsi: hisi_sas: Create a scsi_host_template per HW module
When a SCSI host is registered, the SCSI mid-layer takes a reference to a module in Scsi_host.hostt.module. In doing this, we are prevented
scsi: hisi_sas: Create a scsi_host_template per HW module
When a SCSI host is registered, the SCSI mid-layer takes a reference to a module in Scsi_host.hostt.module. In doing this, we are prevented from removing the driver module for the host in dangerous scenario, like when a disk is mounted.
Currently there is only one scsi_host_template (sht) for all HW versions, and this is the main.c module. So this means that we can possibly remove the HW module in this dangerous scenario, as SCSI mid-layer is only referencing the main.c module.
To fix this, create a sht per module, referencing that same module to create the Scsi host.
Signed-off-by: Xiang Chen <chenxiang66@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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428f1b34 |
| 21-May-2018 |
Xiaofei Tan <tanxiaofei@huawei.com> |
scsi: hisi_sas: Add LED feature for v3 hw
This patch implements LED feature of directly attached disk for v3 hw.
In fact, this hw has created an SGPIO component for LED feature, and we can control
scsi: hisi_sas: Add LED feature for v3 hw
This patch implements LED feature of directly attached disk for v3 hw.
In fact, this hw has created an SGPIO component for LED feature, and we can control LEDs just by internal registers.
Signed-off-by: Xiaofei Tan <tanxiaofei@huawei.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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