Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48 |
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#
058b2074 |
| 22-Aug-2023 |
Cheng-Chieh Hsieh <cj.hsieh@realtek.com> |
wifi: rtw89: phy: modify register setting of ENV_MNTR, PHYSTS and DIG
The ENV_MNTR(environment monitor) is the dynamic mechanism which based on the HW of CCX(Cisco Compatible Extensions) which provi
wifi: rtw89: phy: modify register setting of ENV_MNTR, PHYSTS and DIG
The ENV_MNTR(environment monitor) is the dynamic mechanism which based on the HW of CCX(Cisco Compatible Extensions) which provide the channel loading and noisy level indicator to debug or support the 802.11k. The PHYSTS provide the detail PHY information per packet we received for debugging. The DIG(dynamic initial gain) is the dynamic mechanism to adjust the packet detect power level by received signal strength to avoid false detection of the WiFi packet.
The address of registers used for ENV_MNTR, PHYSTS and DIG of WiFi 7 IC are different with WiFi 6 series, so we modify the method to access the register address in order to compatible with all WiFi 7 and 6 ICs.
Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230822125822.23817-7-pkshih@realtek.com
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1165f571 |
| 22-Aug-2023 |
Ping-Ke Shih <pkshih@realtek.com> |
wifi: rtw89: phy: add phy_gen_def::cr_base to support WiFi 7 chips
cr_base is base address of PHY control register. The base of WiFi 6 and 7 chips are 0x1_0000 and 0x2_0000 respectively, so define t
wifi: rtw89: phy: add phy_gen_def::cr_base to support WiFi 7 chips
cr_base is base address of PHY control register. The base of WiFi 6 and 7 chips are 0x1_0000 and 0x2_0000 respectively, so define them accordingly. For example, if PHY address is 0x1330, absolute address is 0x1_1330 for WiFi 6 chips, and 0x2_1330 for WiFi 7 chips.
Meanwhile, there are two copies of PHY hardware named PHY0 and PHY1. The offset between them is 0x2_0000, so the base address of PHY0 and PHY1 are 0x2_0000 and 0x4_0000 respectively.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230822125822.23817-6-pkshih@realtek.com
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Revision tags: v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25 |
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#
e3715859 |
| 17-Apr-2023 |
Eric Huang <echuang@realtek.com> |
wifi: rtw89: add RSSI based antenna diversity
RSSI statistics are grouped by CCK, OFDM or non-legacy rate. These statistics will be collected in training state for both (main/aux) antenna. There is
wifi: rtw89: add RSSI based antenna diversity
RSSI statistics are grouped by CCK, OFDM or non-legacy rate. These statistics will be collected in training state for both (main/aux) antenna. There is a time period (ANTDIV_DELAY) for rate adaptive settle down before start collect statistics when switch antenna.
Antenna diversity checks packet count from training state for each group and use the most one as the final RSSI for comparison, and then choose the better one as target antenna.
Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230418012820.5139-7-pkshih@realtek.com
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Revision tags: v6.1.24, v6.1.23, v6.1.22, v6.1.21 |
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280c4447 |
| 22-Mar-2023 |
Chih-Kang Chang <gary.chang@realtek.com> |
wifi: rtw89: config EDCCA threshold during scan to prevent TX failed
Need to configure EDCCA threshold to default value before scan, and recall original value after scan to prevent probe request can
wifi: rtw89: config EDCCA threshold during scan to prevent TX failed
Need to configure EDCCA threshold to default value before scan, and recall original value after scan to prevent probe request can't be sent out.
Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230322060238.43922-1-pkshih@realtek.com
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Revision tags: v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13 |
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bb9040b3 |
| 20-Feb-2023 |
Po-Hao Huang <phhuang@realtek.com> |
wifi: rtw89: adjust channel encoding to common function
Since the range of channel table is identical among ICs. Make channel encode/decode function common and not IC dependent. So all ICs with matc
wifi: rtw89: adjust channel encoding to common function
Since the range of channel table is identical among ICs. Make channel encode/decode function common and not IC dependent. So all ICs with matching firmware that needs this kind of coding can use it directly. This patch doesn't change logic at all.
Signed-off-by: Po-Hao Huang <phhuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230220070202.29868-4-pkshih@realtek.com
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Revision tags: v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80 |
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#
29136c95 |
| 17-Nov-2022 |
Eric Huang <echuang@realtek.com> |
wifi: rtw89: switch BANDEDGE and TX_SHAPE based on OFDMA trigger frame
There are some registers for transmit waveform control, two of them used in this change are for BANDEDGE and TX_SHAPE control.
wifi: rtw89: switch BANDEDGE and TX_SHAPE based on OFDMA trigger frame
There are some registers for transmit waveform control, two of them used in this change are for BANDEDGE and TX_SHAPE control. BANDEDGE controls whether to apply band edge filter to transmit waveform. TX_SHAPE controls whether to apply triangular mask to transmit waveform. It is found for some chip, these two should be turned off during OFDMA UL traffic for better performance.
Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221117063001.42967-3-pkshih@realtek.com
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Revision tags: v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6 |
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#
d9112042 |
| 27-Oct-2022 |
Chih-Kang Chang <gary.chang@realtek.com> |
wifi: rtw89: collect and send RF parameters to firmware for WoWLAN
For WoWLAN mode, we only collect and send RF parameters to Firmware without writing RF registers. So we add one function to practic
wifi: rtw89: collect and send RF parameters to firmware for WoWLAN
For WoWLAN mode, we only collect and send RF parameters to Firmware without writing RF registers. So we add one function to practice it.
Signed-off-by: Chih-Kang Chang <gary.chang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221027052707.14605-2-pkshih@realtek.com
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Revision tags: v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74 |
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3b66519b |
| 14-Oct-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
wifi: rtw89: phy: add dummy C2H handler to avoid warning message
The C2H class 2 function 3 is to report retry count of low rate, but driver doesn't implement yet, so add a dummy case to avoid messa
wifi: rtw89: phy: add dummy C2H handler to avoid warning message
The C2H class 2 function 3 is to report retry count of low rate, but driver doesn't implement yet, so add a dummy case to avoid message:
rtw89_8852be 0000:03:00.0: c2h class 2 not support
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221014060237.29050-4-pkshih@realtek.com
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Revision tags: v5.15.73, v6.0.1, v5.15.72 |
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6b069898 |
| 05-Oct-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
wifi: rtw89: 8852b: add chip_ops::set_channel
set_channel is main function to configure channel and bandwidth for all layers, namely MAC, BB and RF. Additionally, MAC layer enables CCK rate checking
wifi: rtw89: 8852b: add chip_ops::set_channel
set_channel is main function to configure channel and bandwidth for all layers, namely MAC, BB and RF. Additionally, MAC layer enables CCK rate checking to avoid wrong rate from driver. BB layer configures SCO (Sample Clock Offset) for CCK, TX gain error/offset, and reset baseband hardware circuit after all configurations done.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221005083212.45683-7-pkshih@realtek.com
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6e5125bc |
| 05-Oct-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
wifi: rtw89: make generic functions to convert subband gain index
The gain tables use different domain index, so we need to convert the index from subband of chandef. Since these conversion function
wifi: rtw89: make generic functions to convert subband gain index
The gain tables use different domain index, so we need to convert the index from subband of chandef. Since these conversion functions can share with 8852b, make generic functions for further use.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20221005083212.45683-6-pkshih@realtek.com
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Revision tags: v6.0, v5.15.71 |
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#
9b43bd1a |
| 28-Sep-2022 |
Zong-Zhe Yang <kevin_yang@realtek.com> |
wifi: rtw89: phy: make generic txpwr setting functions
Previously, we thought control registers or setting things for TX power series may change according to chip. So, setting functions are implemen
wifi: rtw89: phy: make generic txpwr setting functions
Previously, we thought control registers or setting things for TX power series may change according to chip. So, setting functions are implemented chip by chip. However, until now, the functions keep the same among chips, at least 8852A, 8852C, and 8852B. There is a sufficient number of chips to share generic setting functions. So, we now remake them including TX power by rate, TX power offset, TX power limit, and TX power limit RU as generic ones in phy.c.
Besides, there are some code refinements in the generic ones, but almost all of the logic doesn't change.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220928084336.34981-5-pkshih@realtek.com
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Revision tags: v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66 |
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#
7dbdf655 |
| 08-Sep-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
wifi: rtw89: support TX diversity for 1T2R chipset
Check RSSI strength to decide which path is better, and then set TX path accordingly.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-
wifi: rtw89: support TX diversity for 1T2R chipset
Check RSSI strength to decide which path is better, and then set TX path accordingly.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220908074140.39776-6-pkshih@realtek.com
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Revision tags: v5.15.65, v5.15.64, v5.15.63 |
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9bea5761 |
| 24-Aug-2022 |
Cheng-Chieh Hsieh <cj.hsieh@realtek.com> |
wifi: rtw89: enlarge the CFO tracking boundary
The calibration value of XTAL offset may be too large in some wifi modules, that the CFO tracking mechanism under the existing tracking boundary can no
wifi: rtw89: enlarge the CFO tracking boundary
The calibration value of XTAL offset may be too large in some wifi modules, that the CFO tracking mechanism under the existing tracking boundary can not adjust the CFO to the tolerable range. So we enlarge it.
Signed-off-by: Cheng-Chieh Hsieh <cj.hsieh@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220824061425.13764-1-pkshih@realtek.com
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Revision tags: v5.15.62, v5.15.61, v5.15.60 |
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07ef5f2f |
| 09-Aug-2022 |
Zong-Zhe Yang <kevin_yang@realtek.com> |
wifi: rtw89: txpwr: concentrate channel related control to top
For future support on multiple channels, it would be disturbing if we still allow scattered leaf functions of TX power to query and man
wifi: rtw89: txpwr: concentrate channel related control to top
For future support on multiple channels, it would be disturbing if we still allow scattered leaf functions of TX power to query and manage channel related control by themselves.
So, query rtw89_chan only on top functions. Then, pass it via functions to make sure that the values coming from the same struct rtw89_chan.
Besides, fix rtw8852a_set_txpwr_offset() from rtw8852a_set_txpwr_ctrl() to rtw8852a_set_txpwr(). TX power offset should consider current band, so move it to chip_ops::set_txpwr() which will be called every time that channel is set.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-6-pkshih@realtek.com
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3e5831ca |
| 09-Aug-2022 |
Zong-Zhe Yang <kevin_yang@realtek.com> |
wifi: rtw89: introduce rtw89_chan for channel stuffs
Introduce struct rtw89_chan ahead to encapsulate stuffs from struct rtw89_channel_params. These stuffs have a clone in HAL and are used throughou
wifi: rtw89: introduce rtw89_chan for channel stuffs
Introduce struct rtw89_chan ahead to encapsulate stuffs from struct rtw89_channel_params. These stuffs have a clone in HAL and are used throughout driver. After multiple channels support, it's expected that each channel instance has a configuration of them. So, we refine them with struct rtw89_chan by precise type first, and will re-arrange HAL by struct rtw89_chan in the following as well.
(No logic has changed.)
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220809104952.61355-3-pkshih@realtek.com
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Revision tags: v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46 |
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#
bc013052 |
| 08-Jun-2022 |
Eric Huang <echuang@realtek.com> |
rtw89: add new state to CFO state machine for UL-OFDMA
Add an new state, RTW89_PHY_DCFO_STATE_HOLD, to keep CFO acceleration after CFO_PERIOD_CNT if the traffic is UL-OFDMA, which is calculated base
rtw89: add new state to CFO state machine for UL-OFDMA
Add an new state, RTW89_PHY_DCFO_STATE_HOLD, to keep CFO acceleration after CFO_PERIOD_CNT if the traffic is UL-OFDMA, which is calculated based on RX trigger frame counter.
Signed-off-by: Eric Huang <echuang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220608113224.11193-4-pkshih@realtek.com
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Revision tags: v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41 |
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9d9a9edc |
| 15-May-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
rtw89: add ieee80211::sta_rc_update ops
When peer's NSS, rate or bandwidth is changed, we update RA(rate adaptive) mask to ensure transmitting packets properly.
Signed-off-by: Ping-Ke Shih <pkshih@
rtw89: add ieee80211::sta_rc_update ops
When peer's NSS, rate or bandwidth is changed, we update RA(rate adaptive) mask to ensure transmitting packets properly.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220516005215.5878-2-pkshih@realtek.com
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Revision tags: v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35 |
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1b00e923 |
| 14-Apr-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
rtw89: 8852c: add set channel of BB part
BB does many settings during setting channel. First is to configure CCK for 2G channels, and then basic channel and bandwidth settings with a encoded channel
rtw89: 8852c: add set channel of BB part
BB does many settings during setting channel. First is to configure CCK for 2G channels, and then basic channel and bandwidth settings with a encoded channel index that will report to driver when we receive packets. Configure spur elimination to avoid spur of CSI and NBI tones in certain frequencies. Also, it initializes BT grant to arrange path sharing with BT according to band. Finally, reset TSSI and BB hardware to ensure it stays in initial state.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220414062027.62638-12-pkshih@realtek.com
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c7845551 |
| 14-Apr-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
rtw89: 8852c: phy: configure TSSI bandedge
TSSI is used to manage TX power with thermal value as a factor. This patch is to configure bandedge to TX proper waveform.
Signed-off-by: Ping-Ke Shih <pk
rtw89: 8852c: phy: configure TSSI bandedge
TSSI is used to manage TX power with thermal value as a factor. This patch is to configure bandedge to TX proper waveform.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220414062027.62638-5-pkshih@realtek.com
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c6badab2 |
| 14-Apr-2022 |
Zong-Zhe Yang <kevin_yang@realtek.com> |
rtw89: 8852c: add TX power track tables
TX power track tables are used to do TX power compensation according to thermal value. In order to work in existing and new chip, add new 6G entries, and chan
rtw89: 8852c: add TX power track tables
TX power track tables are used to do TX power compensation according to thermal value. In order to work in existing and new chip, add new 6G entries, and change type from u8 to s8.
Internal version table is HALRF_027_00_031.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220414062027.62638-4-pkshih@realtek.com
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Revision tags: v5.15.34, v5.15.33, v5.15.32, v5.15.31, v5.17, v5.15.30 |
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#
2a5f2b32 |
| 17-Mar-2022 |
Ping-Ke Shih <pkshih@realtek.com> |
rtw89: add config_rf_reg_v1 to configure RF parameter tables
The format of RF parameter is changed; it doesn't encode delay parameters into table, but the delay coding becomes regular pair of regist
rtw89: add config_rf_reg_v1 to configure RF parameter tables
The format of RF parameter is changed; it doesn't encode delay parameters into table, but the delay coding becomes regular pair of register address and value.
To help firmware to recover RF register settings, we need to download these parameters to firmware. For v1 format, only download partial parameters (ignore them with addr < 0x100).
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220317055543.40514-6-pkshih@realtek.com
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#
84d0e33e |
| 17-Mar-2022 |
Chung-Hsuan Hung <hsuan8331@realtek.com> |
rtw89: 8852c: add read/write rf register function
Using encoded address which BIT(16) is used to discriminate which region is going to access. Illustrate the calling flow as below
rtw89_phy_write_r
rtw89: 8852c: add read/write rf register function
Using encoded address which BIT(16) is used to discriminate which region is going to access. Illustrate the calling flow as below
rtw89_phy_write_rf_v1() -+-> rtw89_phy_write_rf() // old interface +-> rtw89_phy_write_rf_a() // new interface
Signed-off-by: Chung-Hsuan Hung <hsuan8331@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220317055543.40514-5-pkshih@realtek.com
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Revision tags: v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25 |
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a9e06f2e |
| 17-Feb-2022 |
Yi-Tang Chiu <chiuyitang@realtek.com> |
rtw89: Limit the CFO boundaries of x'tal value
Set the boundaries of x'tal value to avoid extremely adjusted results, causing severely unexpected CFO.
Signed-off-by: Yi-Tang Chiu <chiuyitang@realte
rtw89: Limit the CFO boundaries of x'tal value
Set the boundaries of x'tal value to avoid extremely adjusted results, causing severely unexpected CFO.
Signed-off-by: Yi-Tang Chiu <chiuyitang@realtek.com> Signed-off-by: Yuan-Han Zhang <yuanhan1020@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220218034537.9338-1-pkshih@realtek.com
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Revision tags: v5.15.24, v5.15.23 |
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#
0701a424 |
| 11-Feb-2022 |
Zong-Zhe Yang <kevin_yang@realtek.com> |
rtw89: refine naming of rfk helpers with prefix
Since these macro in rfk helpers are common now, a common naming should be better. So, apply RTW89_ as prefix to them, and modify the use correspondly
rtw89: refine naming of rfk helpers with prefix
Since these macro in rfk helpers are common now, a common naming should be better. So, apply RTW89_ as prefix to them, and modify the use correspondly. No logic is changed at all.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220211075953.40421-3-pkshih@realtek.com
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db7fa61a |
| 11-Feb-2022 |
Zong-Zhe Yang <kevin_yang@realtek.com> |
rtw89: make rfk helpers common across chips
These rfk helpers are also useful for the chip which is under planning. So, move them to common code to avoid duplicate stuff in the future.
Signed-off-b
rtw89: make rfk helpers common across chips
These rfk helpers are also useful for the chip which is under planning. So, move them to common code to avoid duplicate stuff in the future.
Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220211075953.40421-2-pkshih@realtek.com
show more ...
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