net: ipa: a few last IPA register cleanups

Some last cleanups for the existing IPA register definitions:
- Remove the definition of IPA_REG_ENABLED_PIPES_OFFSET, because
it is not used.
- Us

net: ipa: a few last IPA register cleanups

Some last cleanups for the existing IPA register definitions:
- Remove the definition of IPA_REG_ENABLED_PIPES_OFFSET, because
it is not used.
- Use "IPA_" instead of "BAM_" as the prefix on fields associated
with the FLAVOR_0 register. We use GSI (not BAM), but the
fields apply to both GSI and BAM.
- Get rid of the definition of IPA_CS_RSVD; it is never used.
- Add two missing field mask definitions for the INIT_DEAGGR
endpoint register.
- Eliminate a few of the defined sequencer types, because they
are unused. We can add them back when needed.
- Add a field mask to indicate which bit causes an interrupt on
the microcontroller.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: move definition of enum ipa_irq_id

Move the definition of the ipa_irq_id enumerated type out of
"ipa_interrupt.h" and into "ipa_reg.h", and flesh out its set of
defined values. Each inter

net: ipa: move definition of enum ipa_irq_id

Move the definition of the ipa_irq_id enumerated type out of
"ipa_interrupt.h" and into "ipa_reg.h", and flesh out its set of
defined values. Each interrupt id indicates a particular type of
IPA interrupt that can be signaled. Their numeric values define bit
positions in the IPA_IRQ_* registers, so should their definitions
should accompany the definition of those register offsets.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: rearrange a few IPA register definitions

Move a few things around in "ipa_reg.h":
- Move the definition of ipa_reg_state_aggr_active_offset() down
a bit in the file so definitions ar

net: ipa: rearrange a few IPA register definitions

Move a few things around in "ipa_reg.h":
- Move the definition of ipa_reg_state_aggr_active_offset() down
a bit in the file so definitions are ordered by offset (for
the lowest supported IPA version) like all other definitions.
- Move the definition TIMER_FREQUENCY to be immediately above
the definition of ipa_aggr_granularity_val() where it's used.
- Move each register field value enumerated type definition to
immediately follow the definitions of the register and field
it is associated with.
No code functionality is modified by this patch.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: fix up IPA register comments

Revise or add comments in "ipa_reg.h" for to provide more
information, and to improve clarity and consistency.
- Always provide a comment to define when a re

net: ipa: fix up IPA register comments

Revise or add comments in "ipa_reg.h" for to provide more
information, and to improve clarity and consistency.
- Always provide a comment to define when a register or field is
supported (or not) for certain versions of IPA hardware.
- Try to be specific about *which* or *how many* definitions
a comment refers to.
- Move comments stating that ipa->available defines the valid
bits in various registers *above* the register offset
definition, to avoid some checkpatch.pl warnings.
No code is changed by this patch.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: define enumerated types consistently

Consistently define numeric values for enumerated type members using
hexidecimal (rather than decimal) format values. Align the values
assigned in the

net: ipa: define enumerated types consistently

Consistently define numeric values for enumerated type members using
hexidecimal (rather than decimal) format values. Align the values
assigned in the same column in each file.

Only assign values where they really matter, for example don't
assign IPA_ENDPOINT_AP_MODEM_TX the value 0.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: fix BCR register field definitions

The backward compatibility register field masks are defined using
single-bit masks defined with BIT(x) rather than GENMASK(x, x).
Change this one set of

net: ipa: fix BCR register field definitions

The backward compatibility register field masks are defined using
single-bit masks defined with BIT(x) rather than GENMASK(x, x).
Change this one set of definitions to follow the GENMASK() pattern
used everywhere else. Add a few missing field definitions for this
register as well.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: use _FMASK consistently

Several IPA register field masks are defined without the "_FMASK"
suffix naming convention. Rename these, so all field masks are
consistently named.

Signed-off-by

net: ipa: use _FMASK consistently

Several IPA register field masks are defined without the "_FMASK"
suffix naming convention. Rename these, so all field masks are
consistently named.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: fix two inconsistent IPA register names

Rename two suspend IRQ registers so they follow the IPA_REG_IRQ_xxx
naming convention used elsewhere.

Signed-off-by: Alex Elder <elder@linaro.org>

net: ipa: fix two inconsistent IPA register names

Rename two suspend IRQ registers so they follow the IPA_REG_IRQ_xxx
naming convention used elsewhere.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: make filter/routing hash enable register variable

For IPA v3.5.1, the IPA filter/routing hash enable register actually
does exist, but it is at offset 0x8c into the IPA register space.
For

net: ipa: make filter/routing hash enable register variable

For IPA v3.5.1, the IPA filter/routing hash enable register actually
does exist, but it is at offset 0x8c into the IPA register space.
For newer versions of IPA it is at offset 0x148.

Define a new inline function ipa_reg_filt_rout_hash_en_offset() to
return the appropriate value for a given version of IPA hardware.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: share field mask values for IPA hash registers

The IPA filter/routing hash enable register and filter/routing hash
flush register each have four single-bit fields representing the
four has

net: ipa: share field mask values for IPA hash registers

The IPA filter/routing hash enable register and filter/routing hash
flush register each have four single-bit fields representing the
four hashed tables to be enabled or flushed. The field positions
are identical, so just use a single set of field masks to represent
the fields for both registers.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: distinguish between resource group types

The number of resource groups supported by the hardware can be
different for source and destination resources. Determine the
number supported for

net: ipa: distinguish between resource group types

The number of resource groups supported by the hardware can be
different for source and destination resources. Determine the
number supported for each using separate functions. Make the
functions inline end move their definitions into "ipa_reg.h",
because they determine whether certain register definitions are
valid. Pass just the IPA hardware version as argument.

IPA_RESOURCE_GROUP_COUNT represents the maximum number of resource
groups the driver supports for any hardware version. Change that
symbol to be two separate constants, one for source and the other
for destination resource groups. Rename them to end with "_MAX"
rather than "_COUNT", to reflect their true purpose.

Tested-by: Sujit Kautkar <sujitka@chromium.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: fix resource group field mask definition

The mask for the RSRC_GRP field in the INIT_RSRC_GRP endpoint
initialization register is incorrectly defined for IPA v4.2 (where
it is only one bit

net: ipa: fix resource group field mask definition

The mask for the RSRC_GRP field in the INIT_RSRC_GRP endpoint
initialization register is incorrectly defined for IPA v4.2 (where
it is only one bit wide). So we need to fix this.

The fix is not straightforward, however. Field masks are passed to
functions like u32_encode_bits(), and for that they must be constant.

To address this, we define a new inline function that returns the
*encoded* value to use for a given RSRC_GRP field, which depends on
the IPA version. The caller can then use something like this, to
assign a given endpoint resource id 1:

u32 offset = IPA_REG_ENDP_INIT_RSRC_GRP_N_OFFSET(endpoint_id);
u32 val = rsrc_grp_encoded(ipa->version, 1);

iowrite32(val, ipa->reg_virt + offset);

The next patch requires this fix.

Tested-by: Sujit Kautkar <sujitka@chromium.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

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net: ipa: fix two comments

In ipa_uc_response_hdlr() a comment uses the wrong function name
when it describes where a clock reference is taken. Fix this.

Also fix the comment in ipa_uc_response_hd

net: ipa: fix two comments

In ipa_uc_response_hdlr() a comment uses the wrong function name
when it describes where a clock reference is taken. Fix this.

Also fix the comment in ipa_uc_response_hdlr() to correctly refer to
ipa_uc_setup(), which is where the clock reference described here is
taken.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

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net: ipa: clarify endpoint register macro constraints

A handful of registers are valid only for RX endpoints, and some
others are valid only for TX endpoints. For these endpoints, add
a comment abo

net: ipa: clarify endpoint register macro constraints

A handful of registers are valid only for RX endpoints, and some
others are valid only for TX endpoints. For these endpoints, add
a comment above their defined offset macro that indicates the
endpoints to which they apply.

Extend the endpoint parameter naming convention as well, to make
these constraints more explicit.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

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net: ipa: rework ipa_aggr_granularity_val()

The timer used for aggregation makes use of an internal 32 KHz clock.
The granularity of the timer is programmed by a field whose value is
computed by ipa

net: ipa: rework ipa_aggr_granularity_val()

The timer used for aggregation makes use of an internal 32 KHz clock.
The granularity of the timer is programmed by a field whose value is
computed by ipa_aggr_granularity_val(). Redefine the way that value
is computed by using a new TIMER_FREQUENCY constant representing the
underlying clock frequency.

Add two BUILD_BUG_ON() calls to ensure the value used is valid.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

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net: ipa: program upper nibbles of sequencer type

The upper two nibbles of the sequencer type were not used for
SDM845, and were assumed to be 0. But for SC7180 they are used, and
so they must be p

net: ipa: program upper nibbles of sequencer type

The upper two nibbles of the sequencer type were not used for
SDM845, and were assumed to be 0. But for SC7180 they are used, and
so they must be programmed by ipa_endpoint_init_seq(). Fix this bug.

IPA_SEQ_PKT_PROCESS_NO_DEC_NO_UCP_DMAP doesn't have a descriptive
comment, so add one.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

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soc: qcom: ipa: main code

This patch includes three source files that represent some basic "main
program" code for the IPA driver. They are:
- "ipa.h" defines the top-level IPA structure which re

soc: qcom: ipa: main code

This patch includes three source files that represent some basic "main
program" code for the IPA driver. They are:
- "ipa.h" defines the top-level IPA structure which represents an IPA
device throughout the code.
- "ipa_main.c" contains the platform driver probe function, along with
some general code used during initialization.
- "ipa_reg.h" defines the offsets of the 32-bit registers used for the
IPA device, along with masks that define the position and width of
fields within these registers.
- "version.h" defines some symbolic IPA version numbers.

Each file includes some documentation that provides a little more
overview of how the code is organized and used.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: fix two comments

In ipa_uc_response_hdlr() a comment uses the wrong function name
when it describes where a clock reference is taken. Fix this.

Also fix the comment i

net: ipa: fix two comments

In ipa_uc_response_hdlr() a comment uses the wrong function name
when it describes where a clock reference is taken. Fix this.

Also fix the comment in ipa_uc_response_hdlr() to correctly refer to
ipa_uc_setup(), which is where the clock reference described here is
taken.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: clarify endpoint register macro constraints

A handful of registers are valid only for RX endpoints, and some
others are valid only for TX endpoints. For these endpoints, add

net: ipa: clarify endpoint register macro constraints

A handful of registers are valid only for RX endpoints, and some
others are valid only for TX endpoints. For these endpoints, add
a comment above their defined offset macro that indicates the
endpoints to which they apply.

Extend the endpoint parameter naming convention as well, to make
these constraints more explicit.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: rework ipa_aggr_granularity_val()

The timer used for aggregation makes use of an internal 32 KHz clock.
The granularity of the timer is programmed by a field whose value is

net: ipa: rework ipa_aggr_granularity_val()

The timer used for aggregation makes use of an internal 32 KHz clock.
The granularity of the timer is programmed by a field whose value is
computed by ipa_aggr_granularity_val(). Redefine the way that value
is computed by using a new TIMER_FREQUENCY constant representing the
underlying clock frequency.

Add two BUILD_BUG_ON() calls to ensure the value used is valid.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: program upper nibbles of sequencer type

The upper two nibbles of the sequencer type were not used for
SDM845, and were assumed to be 0. But for SC7180 they are used, and
s

net: ipa: program upper nibbles of sequencer type

The upper two nibbles of the sequencer type were not used for
SDM845, and were assumed to be 0. But for SC7180 they are used, and
so they must be programmed by ipa_endpoint_init_seq(). Fix this bug.

IPA_SEQ_PKT_PROCESS_NO_DEC_NO_UCP_DMAP doesn't have a descriptive
comment, so add one.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

soc: qcom: ipa: main code

This patch includes three source files that represent some basic "main
program" code for the IPA driver. They are:
- "ipa.h" defines the top-level IPA st

soc: qcom: ipa: main code

This patch includes three source files that represent some basic "main
program" code for the IPA driver. They are:
- "ipa.h" defines the top-level IPA structure which represents an IPA
device throughout the code.
- "ipa_main.c" contains the platform driver probe function, along with
some general code used during initialization.
- "ipa_reg.h" defines the offsets of the 32-bit registers used for the
IPA device, along with masks that define the position and width of
fields within these registers.
- "version.h" defines some symbolic IPA version numbers.

Each file includes some documentation that provides a little more
overview of how the code is organized and used.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...