net: ipa: introduce IPA register IDs

Create a new ipa_reg_id enumerated type, which identifies each IPA
register with a symbolic identifier. Use short names, but in some
cases (such as "BCR") add "

net: ipa: introduce IPA register IDs

Create a new ipa_reg_id enumerated type, which identifies each IPA
register with a symbolic identifier. Use short names, but in some
cases (such as "BCR") add "IPA_" to the name to help avoid name
conflicts.

Create two functions that indicate register validity. The first
concisely indicates whether a register is valid for a given version
of IPA, and if so, whether it is defined. The second indicates
whether a register is valid for TX or RX endpoints.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: tidy up register enum definitions

Update a few enumerated type definitions in "ipa_reg.h" so that the
values assigned to each member align on the same column. Where a
"TX" or "RX" (or bot

net: ipa: tidy up register enum definitions

Update a few enumerated type definitions in "ipa_reg.h" so that the
values assigned to each member align on the same column. Where a
"TX" or "RX" (or both) comment is present, move that annotation into
a separate comment between the member name and its value.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: define BCR values using an enum

The backward compatibility register (BCR) has a set of bit flags
that indicate ways in which the IPA hardware should operate in a
backward compatible way.

net: ipa: define BCR values using an enum

The backward compatibility register (BCR) has a set of bit flags
that indicate ways in which the IPA hardware should operate in a
backward compatible way. The register is not supported starting
with IPA v4.5, and where it is supported, defined bits all have the
same numeric value.

Redefine these flags using an enumerated type, with each member's
value representing the bit position that encodes it in the BCR.
This replaces all of the single-bit field masks previously defined.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: fix two symbol names

All field mask symbols are defined with a "_FMASK" suffix, but
EOT_COAL_GRANULARITY and DRBIP_ACL_ENABLE are defined without one.
Fix that.

Signed-off-by: Alex Elder

net: ipa: fix two symbol names

All field mask symbols are defined with a "_FMASK" suffix, but
EOT_COAL_GRANULARITY and DRBIP_ACL_ENABLE are defined without one.
Fix that.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: update sequencer definition constraints

Starting with IPA v4.5, replication is done differently from before,
and as a result the "replication" portion of the how the sequencer
is specified

net: ipa: update sequencer definition constraints

Starting with IPA v4.5, replication is done differently from before,
and as a result the "replication" portion of the how the sequencer
is specified must be zero.

Add a check for the configuration data failing that requirement, and
only update the sesquencer type value when it's supported.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: Fix comment typo

The double `is' is duplicated in the comment, remove one.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: Davi

net: ipa: Fix comment typo

The double `is' is duplicated in the comment, remove one.

Signed-off-by: Jason Wang <wangborong@cdjrlc.com>
Reviewed-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: use WARN_ON() rather than assertions

I've added commented assertions to record certain properties that
can be assumed to hold in certain places in the IPA code. Convert
these into real WA

net: ipa: use WARN_ON() rather than assertions

I've added commented assertions to record certain properties that
can be assumed to hold in certain places in the IPA code. Convert
these into real WARN_ON() calls so the assertions are actually
checked, using the standard WARN_ON() mechanism.

Where errors can be returned, return an error if a warning is
triggered.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: add support for inline checksum offload

Starting with IPA v4.5, IP payload checksum offload is implemented
differently.

Prior to v4.5, the IPA hardware appends an rmnet_map_dl_csum_traile

net: ipa: add support for inline checksum offload

Starting with IPA v4.5, IP payload checksum offload is implemented
differently.

Prior to v4.5, the IPA hardware appends an rmnet_map_dl_csum_trailer
structure to each packet if checksum offload is enabled in the
download direction (modem->AP). In the upload direction (AP->modem)
a rmnet_map_ul_csum_header structure is prepended before each sent
packet.

Starting with IPA v4.5, checksum offload is implemented using a
single new rmnet_map_v5_csum_header structure which sits between
the QMAP header and the packet data. The same header structure
is used in both directions.

The new header contains a header type (CSUM_OFFLOAD); a checksum
flag; and a flag indicating whether any other headers follow this
one. The checksum flag indicates whether the hardware should
compute (and insert) the checksum on a sent packet. On a received
packet the checksum flag indicates whether the hardware confirms the
checksum value in the payload is correct.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: store BCR register values in config data

The backward compatibility register value is a platform-specific
property that is not stored in the platform data. Create a data
field where this

net: ipa: store BCR register values in config data

The backward compatibility register value is a platform-specific
property that is not stored in the platform data. Create a data
field where this can be represented, and get rid ipa_reg_bcr_val().

This register is not present starting with IPA v4.5.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: support more than 6 resource groups

IPA versions 3.0 and 3.1 support up to 8 resource groups. There is
some interest in supporting these older versions of the hardware, so
update the reso

net: ipa: support more than 6 resource groups

IPA versions 3.0 and 3.1 support up to 8 resource groups. There is
some interest in supporting these older versions of the hardware, so
update the resource configuration code to program resource limits
for these groups if specified.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: introduce ipa_resource.c

Separate the IPA resource-related code into a new source file,
"ipa_resource.c", and matching header file "ipa_resource.h".

Signed-off-by: Alex Elder <elder@linar

net: ipa: introduce ipa_resource.c

Separate the IPA resource-related code into a new source file,
"ipa_resource.c", and matching header file "ipa_resource.h".

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: support IPA interrupt addresses for IPA v4.7

Starting with IPA v4.7, registers related to IPA interrupts are
located at a fixed offset 0x1000 above than the addresses used for
earlier vers

net: ipa: support IPA interrupt addresses for IPA v4.7

Starting with IPA v4.7, registers related to IPA interrupts are
located at a fixed offset 0x1000 above than the addresses used for
earlier versions. Define and use functions to provide the offset to
use for these registers based on IPA version.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: update component config register

IPA version 4.9 and later use a different layout of some fields
found in the COMP_CFG register.

Define arbitration_lock_disable_encoded(), and use it to e

net: ipa: update component config register

IPA version 4.9 and later use a different layout of some fields
found in the COMP_CFG register.

Define arbitration_lock_disable_encoded(), and use it to encode a
value into the ATOMIC_FETCHER_ARB_LOCK_DIS field based on the IPA
version.

And define full_flush_rsc_closure_en_encoded() to encode a value
into the FULL_FLUSH_WAIT_RSC_CLOSE_EN field based on the IPA
version.

The values of these fields are neither modified nor extracted by
current code, but this patch makes this possible for all supported
versions.

Fix a mistaken comment above ipa_hardware_config_comp() intended to
describe the purpose for the register.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: update IPA register comments

Add and update IPA register definitions. Extend these definitions
to incorporate a fairly small number of new symbols (register
offsets and fields) to support

net: ipa: update IPA register comments

Add and update IPA register definitions. Extend these definitions
to incorporate a fairly small number of new symbols (register
offsets and fields) to support IPA v3.0, v3.1, v3.5, v4.0, v4.1,
v4.7, 4.9, and v4.11, and have the comments reflect when they are
valid. None of the added symbols require changes elsewhere in the
code.

Update rsrc_grp_encoded() to support these other IPA versions.

Add kerneldoc comments for the IPA IRQ numbers and sequencer type.

Fix a few spots where the version check should be less restrictive
(missed by an earlier patch).

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: move ipa_aggr_granularity_val()

We only use ipa_aggr_granularity_val() inside "ipa_main.c", so it
doesn't really need to be defined in a header file. It makes some
sense to be grouped wit

net: ipa: move ipa_aggr_granularity_val()

We only use ipa_aggr_granularity_val() inside "ipa_main.c", so it
doesn't really need to be defined in a header file. It makes some
sense to be grouped with the register definitions, but it is unlike
the other inline functions now defined in "ipa_reg.h". So move it
into "ipa_main.c" where it's used. TIMER_FREQUENCY is used only
by that function, so move that definition as well.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: limit local processing context address

Not all of the bits of the LOCAL_PKT_PROC_CNTXT register are valid.
Until IPA v4.5, there are 17 valid bits (though the bottom three
must be zero).

net: ipa: limit local processing context address

Not all of the bits of the LOCAL_PKT_PROC_CNTXT register are valid.
Until IPA v4.5, there are 17 valid bits (though the bottom three
must be zero). Starting with IPA v4.5, 18 bits are valid.

Introduce proc_cntxt_base_addr_encoded() to encode the base address
for use in the register using only the valid bits.

Shorten the name of the register (omit "_BASE") to avoid the need to
wrap the line in the one place it's used.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: define the ENDP_INIT_NAT register

Define the ENDP_INIT_NAT register for setting up the NAT
configuration for an endpoint. We aren't using NAT at this
time, so explicitly set the type to B

net: ipa: define the ENDP_INIT_NAT register

Define the ENDP_INIT_NAT register for setting up the NAT
configuration for an endpoint. We aren't using NAT at this
time, so explicitly set the type to BYPASS for all endpoints.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: sequencer type is for TX endpoints only

We only program the sequencer type for TX endpoints. So move the
definition of the sequencer type fields into the TX-specific portion
of the endpoi

net: ipa: sequencer type is for TX endpoints only

We only program the sequencer type for TX endpoints. So move the
definition of the sequencer type fields into the TX-specific portion
of the endpoint configuration data. There's no need to maintain
this in the IPA structure; we can extract it from the configuration
data it points to in the one spot it's needed.

We previously specified the sequencer type for RX endpoints with
INVALID values. These are no longer needed, so get rid of them.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: split sequencer type in two

An IPA endpoint has a sequencer that must be configured based on how
the endpoint is to be used. Currently the IPA code programs the
sequencer type by splittin

net: ipa: split sequencer type in two

An IPA endpoint has a sequencer that must be configured based on how
the endpoint is to be used. Currently the IPA code programs the
sequencer type by splitting a value into four 4-bit nibbles. Doing
that doesn't really add much value, and regardless, a better way of
splitting the sequencer type is into two halves--the lower byte
describing how normal packet processing is handled, and the next
byte describing information about processing replicas.

So split the sequencer type into two sub-parts: the sequencer type
and the replication sequencer type. Define the values supported for
the "main" sequencer type, and define the values supported for the
replication part separately.

In addition, the sequencer type names are quite verbose, encoding
what the type includes, but also what it *excludes*. Rename the
sequencer types in a way that mainly describes the number of passes
that a packet takes through the IPA processing pipeline, and how
many of those passes end by supplying the processed packet to the
microprocessor.

The result expands the supported types beyond what is required for
now, but simplifies the way these are defined.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

show more ...

net: ipa: avoid field overflow

It's possible that the length passed to ipa_header_size_encoded()
is larger than what can be represented by the HDR_LEN field alone
(starting with IPA v4.5). If we at

net: ipa: avoid field overflow

It's possible that the length passed to ipa_header_size_encoded()
is larger than what can be represented by the HDR_LEN field alone
(starting with IPA v4.5). If we attempted that, u32_encode_bits()
would trigger a build-time error.

Avoid this problem by masking off high-order bits of the value
encoded as the lower portion of the header length.

The same sort of problem exists in ipa_metadata_offset_encoded(),
so implement the same fix there.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: set up IPA v4.5 Qtime configuration

IPA v4.5 introduces a new unified timer architecture driven on the
19.2 MHz SoC crystal oscillator (XO). It is independent of the IPA
core clock and av

net: ipa: set up IPA v4.5 Qtime configuration

IPA v4.5 introduces a new unified timer architecture driven on the
19.2 MHz SoC crystal oscillator (XO). It is independent of the IPA
core clock and avoids some duplication.

Lower-resolution time stamps are derived from this by using only the
high-order bits of the 19.2 MHz Qtime clock. And timers are derived
from this based on "pulse generators" configured to fire at a fixed
rate based on the Qtime clock.

This patch introduces ipa_qtime_config(), which configures the Qtime
mechanism for use. It also adds to the IPA register definitions
related to timers and time stamping.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: update IPA aggregation registers for IPA v4.5

IPA v4.5 significantly changes the format of the configuration
register used for endpoint aggregation. The AGGR_BYTE_LIMIT field
is now large

net: ipa: update IPA aggregation registers for IPA v4.5

IPA v4.5 significantly changes the format of the configuration
register used for endpoint aggregation. The AGGR_BYTE_LIMIT field
is now larger, and the positions of other fields are shifted. This
complicates the way we have to access this register because functions
like u32_encode_bits() require their field mask argument to be constant.

A further complication is that we want to know the maximum value
representable by at least one of these fields, and that too requires
a constant field mask.

This patch adds support for IPA v4.5 endpoint aggregation registers
in a way that continues to support "legacy" IPA hardware. It does
so in a way that keeps field masks constant.

First, for each variable field mask, we define an inline function
whose return value is either the legacy value or the IPA v4.5 value.

Second, we define functions for these fields that encode a value
to use in each field based on the IPA version (this approach is
already used elsewhere). The field mask provided is supplied by
the function mentioned above.

Finally, for the aggregation byte limit fields where we want to
know the maximum representable value, we define a function that
returns that maximum, computed from the appropriate field mask.

We can no longer verify at build time that our buffer size is
in the range that can be represented by the aggregation byte
limit field. So remove the test done by a BUILD_BUG_ON() call
in ipa_endpoint_validate_build(), and implement a comparable check
at the top of ipa_endpoint_data_valid().

Doing that makes ipa_endpoint_validate_build() contain a single
line BUILD_BUG_ON() call, so just remove that function and move
the remaining line into ipa_endpoint_data_valid().

One final note: the aggregation time limit value for IPA v4.5 needs
to be computed differently. That is handled in an upcoming patch.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: add support to code for IPA v4.5

Update the IPA code to make use of the updated IPA v4.5 register
definitions. Generally what this patch does is, if IPA v4.5
hardware is in use:
- Ensur

net: ipa: add support to code for IPA v4.5

Update the IPA code to make use of the updated IPA v4.5 register
definitions. Generally what this patch does is, if IPA v4.5
hardware is in use:
- Ensure new registers or fields in IPA v4.5 are updated where
required
- Ensure registers or fields not supported in IPA v4.5 are not
examined when read, or are set to 0 when written
It does this while preserving the existing functionality for IPA
versions lower than v4.5.

The values to program for QSB_MAX_READS and QSB_MAX_WRITES and the
source and destination resource counts are updated to be correct for
all versions through v4.5 as well.

Note that IPA_RESOURCE_GROUP_SRC_MAX and IPA_RESOURCE_GROUP_DST_MAX
already reflect that 5 is an acceptable number of resources (which
IPA v4.5 implements).

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: add new most-significant bits to registers

IPA v4.5 adds a few fields to the endpoint header and extended
header configuration registers that represent new high-order bits
for certain offs

net: ipa: add new most-significant bits to registers

IPA v4.5 adds a few fields to the endpoint header and extended
header configuration registers that represent new high-order bits
for certain offsets and sizes. Add code to incorporate these upper
bits into the registers for IPA v4.5.

This includes creating ipa_header_size_encoded(), which handles
encoding the metadata offset field for use in the ENDP_INIT_HDR
register in a way appropriate for the hardware version. This and
ipa_metadata_offset_encoded() ensure the mask argument passed to
u32_encode_bits() is constant.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...

net: ipa: update IPA registers for IPA v4.5

Update "ipa_reg.h" so that register definitions support IPA hardware
version 4.5, in addition to versions 3.5.1 through v4.2. Most of
the register defini

net: ipa: update IPA registers for IPA v4.5

Update "ipa_reg.h" so that register definitions support IPA hardware
version 4.5, in addition to versions 3.5.1 through v4.2. Most of
the register definitions are the same, but in some cases fields are
added, changed, or eliminated.

Updates for a few IPA v4.5 registers are more complex, and adding
those definition will be deferred to separate patches. This patch
only updates the register offset and field definitions, and adds
informational comments.

The only code change avoids accessing the backward compatibility
register for IPA version 4.5 in ipa_hardware_config(). Other IPA
v4.5-specific code changes will come later.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

show more ...