arm64: dts: imx8m: drop interrupt-affinity for pmu

i.MX8M use PPI for pmu, interrupt-affinity is not needed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8m: Replace deprecated fsl,usbphy DT props with phys

The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells. No functional change.

Signed-o

arm64: dts: imx8m: Replace deprecated fsl,usbphy DT props with phys

The fsl,usbphy DT property is deprecated, replace it with phys DT
property and specify #phy-cells. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
To: linux-arm-kernel@lists.infradead.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add "fsl,imx8mq-fec" compatible string for FEC

Add "fsl,imx8mq-fec" compatible string for FEC to support new feature
(IEEE 802.3az EEE standard).

Signed-off-by: Joakim Zhang <qia

arm64: dts: imx8m: add "fsl,imx8mq-fec" compatible string for FEC

Add "fsl,imx8mq-fec" compatible string for FEC to support new feature
(IEEE 802.3az EEE standard).

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

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arm64: dts: imx8mn: specify dma-ranges

DMA addressing capabilities on i.MX8MN are limited by the interconnect,
same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let
the kernel know abo

arm64: dts: imx8mn: specify dma-ranges

DMA addressing capabilities on i.MX8MN are limited by the interconnect,
same as on i.MX8MQ. Add dma-ranges to the the peripheral bus to let
the kernel know about this.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Add spba1 bus

The i.MX8MN has an SPBA bus which covers much of the audio, but
there is a second SPBA bus which covers many of the serial interfaces
like SPI and UARTs currently m

arm64: dts: imx8mn: Add spba1 bus

The i.MX8MN has an SPBA bus which covers much of the audio, but
there is a second SPBA bus which covers many of the serial interfaces
like SPI and UARTs currently missing from the device tree. The reference
manual calls the bus handling the audio peripherals SPBA2, and the bus
handling the serial peripherals is called SPBA1.

Rename the existing spba bus to spba2 and add spba1.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Reorder flexspi clock-names entry

Reorder flexspi clock-names entry to make it compliant with bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn

arm64: dts: imx8mn: Reorder flexspi clock-names entry

Reorder flexspi clock-names entry to make it compliant with bindings.

Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Add fspi node

The i.MX8M Nano has the same Flexspi controller used in the i.MX8M
Mini. Add the node and disable it by default.

Signed-off-by: Adam Ford <aford173@gmail.com>
Sig

arm64: dts: imx8mn: Add fspi node

The i.MX8M Nano has the same Flexspi controller used in the i.MX8M
Mini. Add the node and disable it by default.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add fsl,stop-mode property for FEC

Add fsl,stop-mode property for FEC to enable stop mode.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawngu

arm64: dts: imx8m: add fsl,stop-mode property for FEC

Add fsl,stop-mode property for FEC to enable stop mode.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add mac address for FEC

Add mac address in efuse, so that FEC driver can parse it from nvmem
cell.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo

arm64: dts: imx8m: add mac address for FEC

Add mac address in efuse, so that FEC driver can parse it from nvmem
cell.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: correct assigned clocks for FEC

CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
S

arm64: dts: imx8m: correct assigned clocks for FEC

CLK_ENET_TIMER assigned clocks twice, should be a typo, correct to
CLK_ENET_PHY_REF clock.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID

In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" no

arm64: dts: imx8m: add NVMEM provider and consumer to read soc unique ID

In order to be able to use NVMEM APIs to read soc unique ID, add the
nvmem data cell and name for nvmem-cells to the "soc" node, and add a
nvmem node which provides soc unique ID to efuse@30350000.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add SoC ID compatible

Add compatible string to .dtsi files for binding of imx8_soc_info and
device.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <a

arm64: dts: imx8m: add SoC ID compatible

Add compatible string to .dtsi files for binding of imx8_soc_info and
device.

Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Configure clock rate for audio plls

Configure clock rate for audio plls. audio pll1 is used
as parent clock for clocks that is multiple of 8kHz.
audio pll2 is used as parent cloc

arm64: dts: imx8mn: Configure clock rate for audio plls

Configure clock rate for audio plls. audio pll1 is used
as parent clock for clocks that is multiple of 8kHz.
audio pll2 is used as parent clock for clocks that is
multiple of 11kHz.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Fix duplicate node name

Error log:
sysfs: cannot create duplicate filename '/bus/platform/devices/30000000.bus'

The spba bus name is duplicate with aips bus name.
Refine spba bu

arm64: dts: imx8mn: Fix duplicate node name

Error log:
sysfs: cannot create duplicate filename '/bus/platform/devices/30000000.bus'

The spba bus name is duplicate with aips bus name.
Refine spba bus name to fix this issue.

Fixes: 970406eaef3a ("arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter")
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Add node for SPDIF

The i.MX8M Nano can support SPDIF which is compatible to the
IP used on the i.MX35.

Add the node.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by

arm64: dts: imx8mn: Add node for SPDIF

The i.MX8M Nano can support SPDIF which is compatible to the
IP used on the i.MX35.

Add the node.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Add support for micfil

The i.MX8M Nano has supports the MICFIL digital interface.
It's a 16-bit audio signal from a PDM microphone bitstream.
The driver is already in the kernel,

arm64: dts: imx8mn: Add support for micfil

The i.MX8M Nano has supports the MICFIL digital interface.
It's a 16-bit audio signal from a PDM microphone bitstream.
The driver is already in the kernel, but the node is missing.

Add the micfil node.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: Add SAI nodes

The i.MX8M Nano has several SAI nodes available to it.
Enable them.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter

The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.

O

arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter

The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.

On the vendor kernel, they put this on a spba-bus for SDMA support.

Add the node for the spba-bus with the easrc node inside.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: freescale: Add pmu support on imx8mn

Add PMU node to enable pmu support on imx8mn.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-

arm64: dts: freescale: Add pmu support on imx8mn

Add PMU node to enable pmu support on imx8mn.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8mn: adjust GIC CPU mask to match number of CPUs

i.MX 8M Nano has four Cortex-A CPUs, not six. Using higher value is
harmless but adjust it to match real HW.

Signed-off-by: Krzyszto

arm64: dts: imx8mn: adjust GIC CPU mask to match number of CPUs

i.MX 8M Nano has four Cortex-A CPUs, not six. Using higher value is
harmless but adjust it to match real HW.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts imx8mn: Remove non-existent USB OTG2

According to the i.MX8MN TRM, there is only one OTG port. The
address for OTG2 is reserved on Nano.

This patch removes the non-existent OTG2, usbphy

arm64: dts imx8mn: Remove non-existent USB OTG2

According to the i.MX8MN TRM, there is only one OTG port. The
address for OTG2 is reserved on Nano.

This patch removes the non-existent OTG2, usbphynop2, and the usbmisc2
nodes.

Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: Add the ENET PPS interrupt

The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per
Second). Add support for it.

Suggested-by: Rogerio Nunes <rogerio.nunes@nxp.co

arm64: dts: imx8m: Add the ENET PPS interrupt

The i.MX8M SoCs have a fourth ENET interrupt dedicated to PPS (Pulse Per
Second). Add support for it.

Suggested-by: Rogerio Nunes <rogerio.nunes@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: add mu node

Add mu node to let A53 could communicate with M Core.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn

arm64: dts: imx8m: add mu node

Add mu node to let A53 could communicate with M Core.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs

Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".

arm64: dts: imx8m: change ocotp node name on i.MX8M SoCs

Change OCOTP node name from ocotp-ctrl to efuse to be compliant with
yaml schema, it requires the nodename to be one of "eeprom|efuse|nvram".

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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arm64: dts: imx8m: assign clocks for A53

Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/clk-imx8m*.c, the

arm64: dts: imx8m: assign clocks for A53

Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and
assign IMX8M*_CLK_A53_CORE's parent to arm pll out as what
is done in drivers/clk/imx/clk-imx8m*.c, then we could remove
the settings in driver which triggers lockdep warning.

Reported-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

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