History log of /openbmc/linux/arch/arm/mach-imx/common.h (Results 26 – 50 of 204)
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Revision tags: openbmc-20151104-1, v4.3, openbmc-20151102-1, openbmc-20151028-1, v4.3-rc1, v4.2, v4.2-rc8, v4.2-rc7, v4.2-rc6
# ee4a5f83 04-Aug-2015 Anson Huang <b20788@freescale.com>

ARM: imx: add suspend/resume support for i.mx6ul

This patch adds suspend function for i.MX6UL, it supports
"standby" and "mem" mode, for "standby" mode, SoC will
enter STOP mode only, while for "mem

ARM: imx: add suspend/resume support for i.mx6ul

This patch adds suspend function for i.MX6UL, it supports
"standby" and "mem" mode, for "standby" mode, SoC will
enter STOP mode only, while for "mem" mode, SoC will
enter STOP mode and DDR IO will be set to low power
mode.

As i.MX6UL contains a "Cortex-A7" ARM core which has no
PL310, so we need to avoid any PL310 operations during
suspend/resume, also, we need to flush Cortex-A7's inernal
L2 cache before suspend.

Signed-off-by: Anson Huang <b20788@freescale.com>

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Revision tags: v4.2-rc5, v4.2-rc4, v4.2-rc3, v4.2-rc2, v4.2-rc1, v4.1, v4.1-rc8, v4.1-rc7, v4.1-rc6, v4.1-rc5, v4.1-rc4
# 1579c7b9 12-May-2015 Martin Fuzzey <mfuzzey@parkeon.com>

ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.

In order to save power the DDR pins should be put into high
impedance when in suspend to RAM.

This requires manually requesting se

ARM: imx53: Set DDR pins to high impedance when in suspend to RAM.

In order to save power the DDR pins should be put into high
impedance when in suspend to RAM.

This requires manually requesting self refresh (rather than using the
automatic mode implemented by the CCM / ESDCTL), followed by
reconfiguring the IOMUXC.

Of course the code to do this cannot itself run from DDR so the
code is copied to and executed from internal memory.

In my tests using a custom i.MX53 board with LPDDR2 RAM
this reduced the suspend power consumption from 200mW to 60mW.

Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v4.1-rc3, v4.1-rc2
# d0185d96 29-Apr-2015 Shenwei Wang <shenwei.wang@freescale.com>

ARM: imx: Remove the duplicated function declaration

Removed the duplicated function declaration of mxc_timer_init
which was already declared in drivers/clk/imx/clk.h.

Signed-off-by: Shenwei Wang <

ARM: imx: Remove the duplicated function declaration

Removed the duplicated function declaration of mxc_timer_init
which was already declared in drivers/clk/imx/clk.h.

Signed-off-by: Shenwei Wang <shenwei.wang@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# 35e2916f 29-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier

Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_i

ARM: imx6: initialize CCM_CLPCR_LPM into RUN mode earlier

Commit 4631960d26da ("ARM: imx6: set initial power mode in pm function")
moves imx6_set_lpm() from clock init function into
imx6_pm_common_init(). This causes a hang when cpuidle support is
enabled. The reason for that is ARM core clock is shut down
unexpectedly by WAIT mode. It happens with the following call stack:

cpuidle_register_governor()
cpuidle_switch_governor()
cpuidle_uninstall_idle_handler()
synchronize_sched()
wait_rcu_gp()
wait_for_completion()

When wait_for_completion() is called as above, all cores are idle/WFI.
Hence, the reset value of CCM_CLPCR_LPM - WAIT mode, will trigger a
hardware shutdown of the ARM core clock.

To fix the regression, we need to ensure that CCM_CLPCR_LPM is
initialized into RUN mode earlier than cpuidle governor registration,
which is a postcore_initcall. This patch creates function
imx6_pm_ccm_init() to map CCM block and initialize CCM_CLPCR_LPM into
RUN mode, and have the function called from machine .init_irq hook,
which should be early enough.

Reported-by: Kevin Hilman <khilman@kernel.org>
Fixes: 8fb76a07e2cb ("ARM: imx6: set initial power mode in pm function")
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v4.1-rc1
# f0b478b5 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: let pm code map CCM block on its own

We are about to move imx6 clock driver into drivers/clk, so let's get
imx6 pm code map CCM block on its own rather than relying on clock
driver to do

ARM: imx6: let pm code map CCM block on its own

We are about to move imx6 clock driver into drivers/clk, so let's get
imx6 pm code map CCM block on its own rather than relying on clock
driver to do the mapping.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# 8fb76a07 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx6: set initial power mode in pm function

Rather than setting initial low-power mode in every single i.MX6 clock
initialization function, we should really do that in pm code. Let's
move imx6

ARM: imx6: set initial power mode in pm function

Rather than setting initial low-power mode in every single i.MX6 clock
initialization function, we should really do that in pm code. Let's
move imx6q_set_lpm(WAIT_CLOCKED) call into imx6_pm_common_init().

While at it, let's rename the function to imx6_set_lpm() since it's
actually common for all i.MX6 SoCs.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# f3a9249d 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx5: let pm code map CCM block on its own

We are about to move imx5 clock driver into drivers/clk, so let's get
imx5 pm code map CCM block on its own rather than relying on clock
driver to do

ARM: imx5: let pm code map CCM block on its own

We are about to move imx5 clock driver into drivers/clk, so let's get
imx5 pm code map CCM block on its own rather than relying on clock
driver to do the mapping.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# 9bbef187 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx: move revision definitions and declarations into a header

The revision definitions and declarations are widely used by clock
drivers. As a step of moving clock drivers out of arch/arm/mach

ARM: imx: move revision definitions and declarations into a header

The revision definitions and declarations are widely used by clock
drivers. As a step of moving clock drivers out of arch/arm/mach-imx,
let's create header include/soc/imx/revision.h to accommodate them.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# 6c529c49 25-Apr-2015 Shawn Guo <shawn.guo@linaro.org>

ARM: imx: use dynamic mapping for timer

Pass physical address of timer block to mxc_timer_init() call, which in
turn does dynamic mapping within the function. Thus, we can avoid using
static mappin

ARM: imx: use dynamic mapping for timer

Pass physical address of timer block to mxc_timer_init() call, which in
turn does dynamic mapping within the function. Thus, we can avoid using
static mapping in clock drivers.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v4.0, v4.0-rc7, v4.0-rc6, v4.0-rc5, v4.0-rc4
# 14517564 13-Mar-2015 Marc Zyngier <marc.zyngier@arm.com>

ARM: imx6: Warn when an old DT is detected

Now that the GPC has been converted to be a full blown irqchip
(and not a mole on the side of the GIC), booting a new kernel
with an old DT is likely to re

ARM: imx6: Warn when an old DT is detected

Now that the GPC has been converted to be a full blown irqchip
(and not a mole on the side of the GIC), booting a new kernel
with an old DT is likely to result in a rough ride for the user.

This patch makes sure such a situation is promptly detected and
the user made aware that a DT update is in order.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v4.0-rc3, v4.0-rc2
# b923ff6a 23-Feb-2015 Marc Zyngier <marc.zyngier@arm.com>

ARM: imx6: convert GPC to stacked domains

IMX6 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.

ARM: imx6: convert GPC to stacked domains

IMX6 has been (ab)using the gic_arch_extn to provide
wakeup from suspend, and it makes a lot of sense to convert
this code to use stacked domains instead.

This patch does just this, updating the DT files to actually
reflect what the HW provides.

BIG FAT WARNING: because the DTs were so far lying by not
exposing the fact that the GPC block is actually the first
interrupt controller in the chain, kernels with this patch
applied wont have any suspend-resume facility when booted
with old DTs, and old kernels with updated DTs won't even boot.

Tested-by: Stefan Agner <stefan@agner.ch>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# 6869a22f 13-Mar-2015 Fabio Estevam <fabio.estevam@freescale.com>

ARM: mx25: Remove static memory mapping

We use dynamic memory mapping when using dt, so remove all the static mappings.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sha

ARM: mx25: Remove static memory mapping

We use dynamic memory mapping when using dt, so remove all the static mappings.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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# d8a3beea 13-Mar-2015 Fabio Estevam <fabio.estevam@freescale.com>

ARM: mx25: Remove mx25_clocks_init()

mx25_clocks_init() is only used to register the clocks for non-dt platforms.

As mx25 has been converted to a dt-only platform, we can safely remove it.

Signed-

ARM: mx25: Remove mx25_clocks_init()

mx25_clocks_init() is only used to register the clocks for non-dt platforms.

As mx25 has been converted to a dt-only platform, we can safely remove it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v4.0-rc1, v3.19, v3.19-rc7, v3.19-rc6, v3.19-rc5, v3.19-rc4, v3.19-rc3, v3.19-rc2, v3.19-rc1
# 05136f08 16-Dec-2014 Anson Huang <b20788@freescale.com>

ARM: imx: support arm power off in cpuidle for i.mx6sx

This patch introduces an independent cpuidle driver for
i.MX6SX, and supports arm power off in idle, totally
3 levels of cpuidle are supported

ARM: imx: support arm power off in cpuidle for i.mx6sx

This patch introduces an independent cpuidle driver for
i.MX6SX, and supports arm power off in idle, totally
3 levels of cpuidle are supported as below:

1. ARM WFI;
2. SOC in WAIT mode;
3. SOC in WAIT mode + ARM power off.

ARM power off can save at least 5mW power.

This patch also replaces imx6q_enable_rbc with imx6_enable_rbc.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v3.18
# 65bb688a 02-Dec-2014 Marc Zyngier <marc.zyngier@arm.com>

ARM: imx6: fix bogus use of irq_get_irq_data

The imx6 PM code seems to be quite creative in its use of irq_data,
using something that is very much a hardware interrupt number where
we expect a virtu

ARM: imx6: fix bogus use of irq_get_irq_data

The imx6 PM code seems to be quite creative in its use of irq_data,
using something that is very much a hardware interrupt number where
we expect a virtual one. Yes, it worked so far, but that's only
luck, and it will definitely explode in 3.19.

Fix it by using a pair of helper functions that deal with the
actual hardware.

Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

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Revision tags: v3.18-rc7, v3.18-rc6, v3.18-rc5, v3.18-rc4, v3.18-rc3
# 4e3fea4a 31-Oct-2014 Jingchang Lu <b35083@freescale.com>

ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.

ARM: imx: Add Freescale LS1021A SMP support

Freescale LS1021A SoCs deploy two cortex-A7 processors,
this adds bring-up support for the secondary core.

Signed-off-by: Jingchang Lu <b35083@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v3.18-rc2, v3.18-rc1, v3.17, v3.17-rc7, v3.17-rc6
# ec336b28 16-Sep-2014 Anson Huang <b20788@freescale.com>

ARM: imx: replace cpu type check with ddr type check

As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3,
we used cpu type to decide how to do these settings in suspend
before which is N

ARM: imx: replace cpu type check with ddr type check

As the DDR/IO and MMDC setting are different on LPDDR2 and DDR3,
we used cpu type to decide how to do these settings in suspend
before which is NOT flexible, take i.MX6SL for example, although
it has LPDDR2 on EVK board, but users can also use DDR3 on other
boards, so it is better to read the DDR type from MMDC then decide
how to do related settings.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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# 08ae9646 31-Oct-2014 Jingchang Lu <jingchang.lu@freescale.com>

ARM: imx: clean up machine mxc_arch_reset_init_dt reset init

System restart mechanism has been changed with the introduction
of "kernel restart handler call chain support". The imx2 watchdog
based r

ARM: imx: clean up machine mxc_arch_reset_init_dt reset init

System restart mechanism has been changed with the introduction
of "kernel restart handler call chain support". The imx2 watchdog
based restart handler has been moved to the driver, and these
restart can be removed from the machine layer.

This patch cleans up the device tree version machine reset init with
mxc_arch_reset_init_dt and removes corresponding .restart handler,
for the .init_machine that can be handled by system default after
removing the mxc_arch_reset_init_dt, the .init_machine is also removed.

Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>

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Revision tags: v3.17-rc5, v3.17-rc4, v3.17-rc3
# ee295d7f 31-Aug-2014 Shawn Guo <shawn.guo@freescale.com>

ARM: imx: remove imx_scu_standby_enable()

With commit c716483c3db1 ("ARM: 8122/1: smp_scu: enable SCU standby
support"), the STANDBY bit of SCU is handled by core function
scu_enable(). So imx_scu_

ARM: imx: remove imx_scu_standby_enable()

With commit c716483c3db1 ("ARM: 8122/1: smp_scu: enable SCU standby
support"), the STANDBY bit of SCU is handled by core function
scu_enable(). So imx_scu_standby_enable() can be removed now.

Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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Revision tags: v3.17-rc2, v3.17-rc1, v3.16, v3.16-rc7, v3.16-rc6, v3.16-rc5
# fd4959d8 13-Jul-2014 Alexander Shiyan <shc_work@mail.ru>

ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets

This patch uses clocksource_of_init() call for DT targets.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.

ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targets

This patch uses clocksource_of_init() call for DT targets.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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# e57e4ab5 07-Jul-2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>

ARM: i.MX: allow disabling supervisor protect via DT

The i.MX SoCs allow to setup fine grained access rights to peripherals on the
AIPS bus.
This is done via the Peripheral Access Register (PAR) in

ARM: i.MX: allow disabling supervisor protect via DT

The i.MX SoCs allow to setup fine grained access rights to peripherals on the
AIPS bus.
This is done via the Peripheral Access Register (PAR) in e.g. the i.MX21
or in later SoC versions the Off-Platform Peripheral Access Control Register
(OPACR), e.g. i.MX53.
Under certain circumstances this leads to problems in which bus masters are
not granted their access rights to peripherals.
To be able to disable these restrictions on DT platforms, add a helper function
that looks for AIPS nodes in the DT and disables them for every compatible node
it finds.
The compatible has to be declared in the mach-specific entry file, where this
helper function should then be called.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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Revision tags: v3.16-rc4, v3.16-rc3
# e9db15e3 25-Jun-2014 Denis Carikli <denis@eukrea.com>

ARM: i.MX25 clk: Use of_clk_init() for DT case

Replace .init_time() hook with of_clk_init() for DT targets.

Based on:
d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case

Signed-off-by: Denis

ARM: i.MX25 clk: Use of_clk_init() for DT case

Replace .init_time() hook with of_clk_init() for DT targets.

Based on:
d4347ee ARM: i.MX27 clk: Use of_clk_init() for DT case

Signed-off-by: Denis Carikli <denis@eukrea.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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# 80c0ecdc 23-Jun-2014 Anson Huang <b20788@freescale.com>

ARM: imx: add standby mode support for suspend

Add standby mode support for suspend, to enter standby mode:

echo standby > /sys/power/state;

Use UART or RTC alarm to wake up system, when system en

ARM: imx: add standby mode support for suspend

Add standby mode support for suspend, to enter standby mode:

echo standby > /sys/power/state;

Use UART or RTC alarm to wake up system, when system enters
standby mode, SOC will enter STOP mode with ARM core kept
power on and 24M XTAL on.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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# dfea953a 23-Jun-2014 Anson Huang <b20788@freescale.com>

ARM: imx: mem bit must be cleared before entering DSM mode

According to hardware design, mem bit must be clear before
entering DSM mode, as ARM core will be power gated in DSM mode.

Signed-off-by:

ARM: imx: mem bit must be cleared before entering DSM mode

According to hardware design, mem bit must be clear before
entering DSM mode, as ARM core will be power gated in DSM mode.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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Revision tags: v3.16-rc2
# ff843d62 20-Jun-2014 Anson Huang <b20788@freescale.com>

ARM: imx: add suspend support for i.mx6sx

Add suspend support for i.MX6SX.

To enter suspend, echo mem > /sys/power/state.
To exit suspend, using RTC alarm or enable debug UART wakeup.

Signed-off-b

ARM: imx: add suspend support for i.mx6sx

Add suspend support for i.MX6SX.

To enter suspend, echo mem > /sys/power/state.
To exit suspend, using RTC alarm or enable debug UART wakeup.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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