1 /* 2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved. 3 */ 4 5 /* 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #ifndef __ASM_ARCH_MXC_COMMON_H__ 12 #define __ASM_ARCH_MXC_COMMON_H__ 13 14 #include <linux/reboot.h> 15 16 struct irq_data; 17 struct platform_device; 18 struct pt_regs; 19 struct clk; 20 struct device_node; 21 enum mxc_cpu_pwr_mode; 22 struct of_device_id; 23 24 void mx1_map_io(void); 25 void mx21_map_io(void); 26 void mx27_map_io(void); 27 void mx31_map_io(void); 28 void mx35_map_io(void); 29 void imx1_init_early(void); 30 void imx21_init_early(void); 31 void imx27_init_early(void); 32 void imx31_init_early(void); 33 void imx35_init_early(void); 34 void mxc_init_irq(void __iomem *); 35 void tzic_init_irq(void); 36 void mx1_init_irq(void); 37 void mx21_init_irq(void); 38 void mx27_init_irq(void); 39 void mx31_init_irq(void); 40 void mx35_init_irq(void); 41 void imx1_soc_init(void); 42 void imx21_soc_init(void); 43 void imx27_soc_init(void); 44 void imx31_soc_init(void); 45 void imx35_soc_init(void); 46 void epit_timer_init(void __iomem *base, int irq); 47 void mxc_timer_init(unsigned long, int); 48 int mx1_clocks_init(unsigned long fref); 49 int mx21_clocks_init(unsigned long lref, unsigned long fref); 50 int mx27_clocks_init(unsigned long fref); 51 int mx31_clocks_init(unsigned long fref); 52 int mx35_clocks_init(void); 53 int mx31_clocks_init_dt(void); 54 struct platform_device *mxc_register_gpio(char *name, int id, 55 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 56 void mxc_set_cpu_type(unsigned int type); 57 void mxc_restart(enum reboot_mode, const char *); 58 void mxc_arch_reset_init(void __iomem *); 59 int mx51_revision(void); 60 int mx53_revision(void); 61 void imx_set_aips(void __iomem *); 62 void imx_aips_allow_unprivileged_access(const char *compat); 63 int mxc_device_init(void); 64 void imx_set_soc_revision(unsigned int rev); 65 unsigned int imx_get_soc_revision(void); 66 void imx_init_revision_from_anatop(void); 67 struct device *imx_soc_device_init(void); 68 void imx6_enable_rbc(bool enable); 69 void imx_gpc_check_dt(void); 70 void imx_gpc_set_arm_power_in_lpm(bool power_off); 71 void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); 72 void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); 73 74 enum mxc_cpu_pwr_mode { 75 WAIT_CLOCKED, /* wfi only */ 76 WAIT_UNCLOCKED, /* WAIT */ 77 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ 78 STOP_POWER_ON, /* just STOP */ 79 STOP_POWER_OFF, /* STOP + SRPG */ 80 }; 81 82 enum mx3_cpu_pwr_mode { 83 MX3_RUN, 84 MX3_WAIT, 85 MX3_DOZE, 86 MX3_SLEEP, 87 }; 88 89 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); 90 void imx_print_silicon_rev(const char *cpu, int srev); 91 92 void imx_enable_cpu(int cpu, bool enable); 93 void imx_set_cpu_jump(int cpu, void *jump_addr); 94 u32 imx_get_cpu_arg(int cpu); 95 void imx_set_cpu_arg(int cpu, u32 arg); 96 #ifdef CONFIG_SMP 97 void v7_secondary_startup(void); 98 void imx_scu_map_io(void); 99 void imx_smp_prepare(void); 100 #else 101 static inline void imx_scu_map_io(void) {} 102 static inline void imx_smp_prepare(void) {} 103 #endif 104 void imx_src_init(void); 105 void imx_gpc_pre_suspend(bool arm_power_off); 106 void imx_gpc_post_resume(void); 107 void imx_gpc_mask_all(void); 108 void imx_gpc_restore_all(void); 109 void imx_gpc_hwirq_mask(unsigned int hwirq); 110 void imx_gpc_hwirq_unmask(unsigned int hwirq); 111 void imx_anatop_init(void); 112 void imx_anatop_pre_suspend(void); 113 void imx_anatop_post_resume(void); 114 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 115 void imx6q_set_int_mem_clk_lpm(bool enable); 116 void imx6sl_set_wait_clk(bool enter); 117 int imx_mmdc_get_ddr_type(void); 118 119 void imx_cpu_die(unsigned int cpu); 120 int imx_cpu_kill(unsigned int cpu); 121 122 #ifdef CONFIG_SUSPEND 123 void v7_cpu_resume(void); 124 void imx6_suspend(void __iomem *ocram_vbase); 125 #else 126 static inline void v7_cpu_resume(void) {} 127 static inline void imx6_suspend(void __iomem *ocram_vbase) {} 128 #endif 129 130 void imx6q_pm_init(void); 131 void imx6dl_pm_init(void); 132 void imx6sl_pm_init(void); 133 void imx6sx_pm_init(void); 134 void imx6q_pm_set_ccm_base(void __iomem *base); 135 136 #ifdef CONFIG_PM 137 void imx51_pm_init(void); 138 void imx53_pm_init(void); 139 void imx5_pm_set_ccm_base(void __iomem *base); 140 #else 141 static inline void imx51_pm_init(void) {} 142 static inline void imx53_pm_init(void) {} 143 static inline void imx5_pm_set_ccm_base(void __iomem *base) {} 144 #endif 145 146 #ifdef CONFIG_NEON 147 int mx51_neon_fixup(void); 148 #else 149 static inline int mx51_neon_fixup(void) { return 0; } 150 #endif 151 152 #ifdef CONFIG_CACHE_L2X0 153 void imx_init_l2cache(void); 154 #else 155 static inline void imx_init_l2cache(void) {} 156 #endif 157 158 extern struct smp_operations imx_smp_ops; 159 extern struct smp_operations ls1021a_smp_ops; 160 161 #endif 162