1 /* 2 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved. 3 */ 4 5 /* 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #ifndef __ASM_ARCH_MXC_COMMON_H__ 12 #define __ASM_ARCH_MXC_COMMON_H__ 13 14 #include <linux/reboot.h> 15 16 struct irq_data; 17 struct platform_device; 18 struct pt_regs; 19 struct clk; 20 struct device_node; 21 enum mxc_cpu_pwr_mode; 22 struct of_device_id; 23 24 void mx1_map_io(void); 25 void mx21_map_io(void); 26 void mx25_map_io(void); 27 void mx27_map_io(void); 28 void mx31_map_io(void); 29 void mx35_map_io(void); 30 void imx1_init_early(void); 31 void imx21_init_early(void); 32 void imx25_init_early(void); 33 void imx27_init_early(void); 34 void imx31_init_early(void); 35 void imx35_init_early(void); 36 void mxc_init_irq(void __iomem *); 37 void tzic_init_irq(void); 38 void mx1_init_irq(void); 39 void mx21_init_irq(void); 40 void mx25_init_irq(void); 41 void mx27_init_irq(void); 42 void mx31_init_irq(void); 43 void mx35_init_irq(void); 44 void imx1_soc_init(void); 45 void imx21_soc_init(void); 46 void imx25_soc_init(void); 47 void imx27_soc_init(void); 48 void imx31_soc_init(void); 49 void imx35_soc_init(void); 50 void epit_timer_init(void __iomem *base, int irq); 51 void mxc_timer_init(void __iomem *, int); 52 int mx1_clocks_init(unsigned long fref); 53 int mx21_clocks_init(unsigned long lref, unsigned long fref); 54 int mx25_clocks_init(void); 55 int mx27_clocks_init(unsigned long fref); 56 int mx31_clocks_init(unsigned long fref); 57 int mx35_clocks_init(void); 58 int mx31_clocks_init_dt(void); 59 struct platform_device *mxc_register_gpio(char *name, int id, 60 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 61 void mxc_set_cpu_type(unsigned int type); 62 void mxc_restart(enum reboot_mode, const char *); 63 void mxc_arch_reset_init(void __iomem *); 64 int mx51_revision(void); 65 int mx53_revision(void); 66 void imx_set_aips(void __iomem *); 67 void imx_aips_allow_unprivileged_access(const char *compat); 68 int mxc_device_init(void); 69 void imx_set_soc_revision(unsigned int rev); 70 unsigned int imx_get_soc_revision(void); 71 void imx_init_revision_from_anatop(void); 72 struct device *imx_soc_device_init(void); 73 void imx6_enable_rbc(bool enable); 74 void imx_gpc_set_arm_power_in_lpm(bool power_off); 75 void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw); 76 void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw); 77 78 enum mxc_cpu_pwr_mode { 79 WAIT_CLOCKED, /* wfi only */ 80 WAIT_UNCLOCKED, /* WAIT */ 81 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */ 82 STOP_POWER_ON, /* just STOP */ 83 STOP_POWER_OFF, /* STOP + SRPG */ 84 }; 85 86 enum mx3_cpu_pwr_mode { 87 MX3_RUN, 88 MX3_WAIT, 89 MX3_DOZE, 90 MX3_SLEEP, 91 }; 92 93 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode); 94 void imx_print_silicon_rev(const char *cpu, int srev); 95 96 void imx_enable_cpu(int cpu, bool enable); 97 void imx_set_cpu_jump(int cpu, void *jump_addr); 98 u32 imx_get_cpu_arg(int cpu); 99 void imx_set_cpu_arg(int cpu, u32 arg); 100 #ifdef CONFIG_SMP 101 void v7_secondary_startup(void); 102 void imx_scu_map_io(void); 103 void imx_smp_prepare(void); 104 #else 105 static inline void imx_scu_map_io(void) {} 106 static inline void imx_smp_prepare(void) {} 107 #endif 108 void imx_src_init(void); 109 void imx_gpc_init(void); 110 void imx_gpc_pre_suspend(bool arm_power_off); 111 void imx_gpc_post_resume(void); 112 void imx_gpc_mask_all(void); 113 void imx_gpc_restore_all(void); 114 void imx_gpc_hwirq_mask(unsigned int hwirq); 115 void imx_gpc_hwirq_unmask(unsigned int hwirq); 116 void imx_anatop_init(void); 117 void imx_anatop_pre_suspend(void); 118 void imx_anatop_post_resume(void); 119 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode); 120 void imx6q_set_int_mem_clk_lpm(bool enable); 121 void imx6sl_set_wait_clk(bool enter); 122 int imx_mmdc_get_ddr_type(void); 123 124 void imx_cpu_die(unsigned int cpu); 125 int imx_cpu_kill(unsigned int cpu); 126 127 #ifdef CONFIG_SUSPEND 128 void v7_cpu_resume(void); 129 void imx6_suspend(void __iomem *ocram_vbase); 130 #else 131 static inline void v7_cpu_resume(void) {} 132 static inline void imx6_suspend(void __iomem *ocram_vbase) {} 133 #endif 134 135 void imx6q_pm_init(void); 136 void imx6dl_pm_init(void); 137 void imx6sl_pm_init(void); 138 void imx6sx_pm_init(void); 139 void imx6q_pm_set_ccm_base(void __iomem *base); 140 141 #ifdef CONFIG_PM 142 void imx51_pm_init(void); 143 void imx53_pm_init(void); 144 void imx5_pm_set_ccm_base(void __iomem *base); 145 #else 146 static inline void imx51_pm_init(void) {} 147 static inline void imx53_pm_init(void) {} 148 static inline void imx5_pm_set_ccm_base(void __iomem *base) {} 149 #endif 150 151 #ifdef CONFIG_NEON 152 int mx51_neon_fixup(void); 153 #else 154 static inline int mx51_neon_fixup(void) { return 0; } 155 #endif 156 157 #ifdef CONFIG_CACHE_L2X0 158 void imx_init_l2cache(void); 159 #else 160 static inline void imx_init_l2cache(void) {} 161 #endif 162 163 extern struct smp_operations imx_smp_ops; 164 extern struct smp_operations ls1021a_smp_ops; 165 166 #endif 167