1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de> 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/clock/bcm-nsp.h> 7*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 8*724ba675SRob Herring#include <dt-bindings/input/input.h> 9*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 10*724ba675SRob Herring#include <dt-bindings/interrupt-controller/arm-gic.h> 11*724ba675SRob Herring 12*724ba675SRob Herring/ { 13*724ba675SRob Herring interrupt-parent = <&gic>; 14*724ba675SRob Herring #address-cells = <1>; 15*724ba675SRob Herring #size-cells = <1>; 16*724ba675SRob Herring 17*724ba675SRob Herring chipcommon-a-bus@18000000 { 18*724ba675SRob Herring compatible = "simple-bus"; 19*724ba675SRob Herring ranges = <0x00000000 0x18000000 0x00001000>; 20*724ba675SRob Herring #address-cells = <1>; 21*724ba675SRob Herring #size-cells = <1>; 22*724ba675SRob Herring 23*724ba675SRob Herring uart0: serial@300 { 24*724ba675SRob Herring compatible = "ns16550"; 25*724ba675SRob Herring reg = <0x0300 0x100>; 26*724ba675SRob Herring interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 27*724ba675SRob Herring clocks = <&iprocslow>; 28*724ba675SRob Herring status = "disabled"; 29*724ba675SRob Herring }; 30*724ba675SRob Herring 31*724ba675SRob Herring uart1: serial@400 { 32*724ba675SRob Herring compatible = "ns16550"; 33*724ba675SRob Herring reg = <0x0400 0x100>; 34*724ba675SRob Herring interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 35*724ba675SRob Herring clocks = <&iprocslow>; 36*724ba675SRob Herring pinctrl-names = "default"; 37*724ba675SRob Herring pinctrl-0 = <&pinmux_uart1>; 38*724ba675SRob Herring status = "disabled"; 39*724ba675SRob Herring }; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring mpcore-bus@19000000 { 43*724ba675SRob Herring compatible = "simple-bus"; 44*724ba675SRob Herring ranges = <0x00000000 0x19000000 0x00023000>; 45*724ba675SRob Herring #address-cells = <1>; 46*724ba675SRob Herring #size-cells = <1>; 47*724ba675SRob Herring 48*724ba675SRob Herring scu@20000 { 49*724ba675SRob Herring compatible = "arm,cortex-a9-scu"; 50*724ba675SRob Herring reg = <0x20000 0x100>; 51*724ba675SRob Herring }; 52*724ba675SRob Herring 53*724ba675SRob Herring timer@20200 { 54*724ba675SRob Herring compatible = "arm,cortex-a9-global-timer"; 55*724ba675SRob Herring reg = <0x20200 0x100>; 56*724ba675SRob Herring interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; 57*724ba675SRob Herring clocks = <&periph_clk>; 58*724ba675SRob Herring }; 59*724ba675SRob Herring 60*724ba675SRob Herring timer@20600 { 61*724ba675SRob Herring compatible = "arm,cortex-a9-twd-timer"; 62*724ba675SRob Herring reg = <0x20600 0x20>; 63*724ba675SRob Herring interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | 64*724ba675SRob Herring IRQ_TYPE_EDGE_RISING)>; 65*724ba675SRob Herring clocks = <&periph_clk>; 66*724ba675SRob Herring }; 67*724ba675SRob Herring 68*724ba675SRob Herring gic: interrupt-controller@21000 { 69*724ba675SRob Herring compatible = "arm,cortex-a9-gic"; 70*724ba675SRob Herring #interrupt-cells = <3>; 71*724ba675SRob Herring #address-cells = <0>; 72*724ba675SRob Herring interrupt-controller; 73*724ba675SRob Herring reg = <0x21000 0x1000>, 74*724ba675SRob Herring <0x20100 0x100>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring 77*724ba675SRob Herring L2: cache-controller@22000 { 78*724ba675SRob Herring compatible = "arm,pl310-cache"; 79*724ba675SRob Herring reg = <0x22000 0x1000>; 80*724ba675SRob Herring cache-unified; 81*724ba675SRob Herring arm,shared-override; 82*724ba675SRob Herring prefetch-data = <1>; 83*724ba675SRob Herring prefetch-instr = <1>; 84*724ba675SRob Herring cache-level = <2>; 85*724ba675SRob Herring }; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring axi@18000000 { 89*724ba675SRob Herring compatible = "brcm,bus-axi"; 90*724ba675SRob Herring reg = <0x18000000 0x1000>; 91*724ba675SRob Herring ranges = <0x00000000 0x18000000 0x00100000>; 92*724ba675SRob Herring #address-cells = <1>; 93*724ba675SRob Herring #size-cells = <1>; 94*724ba675SRob Herring 95*724ba675SRob Herring #interrupt-cells = <1>; 96*724ba675SRob Herring interrupt-map-mask = <0x000fffff 0xffff>; 97*724ba675SRob Herring interrupt-map = 98*724ba675SRob Herring /* ChipCommon */ 99*724ba675SRob Herring <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 100*724ba675SRob Herring 101*724ba675SRob Herring /* Switch Register Access Block */ 102*724ba675SRob Herring <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>, 103*724ba675SRob Herring <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 104*724ba675SRob Herring <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, 105*724ba675SRob Herring <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, 106*724ba675SRob Herring <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, 107*724ba675SRob Herring <0x00007000 5 &gic GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, 108*724ba675SRob Herring <0x00007000 6 &gic GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, 109*724ba675SRob Herring <0x00007000 7 &gic GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 110*724ba675SRob Herring <0x00007000 8 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, 111*724ba675SRob Herring <0x00007000 9 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, 112*724ba675SRob Herring <0x00007000 10 &gic GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, 113*724ba675SRob Herring <0x00007000 11 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, 114*724ba675SRob Herring <0x00007000 12 &gic GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, 115*724ba675SRob Herring 116*724ba675SRob Herring /* PCIe Controller 0 */ 117*724ba675SRob Herring <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 118*724ba675SRob Herring <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, 119*724ba675SRob Herring <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 120*724ba675SRob Herring <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 121*724ba675SRob Herring <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 122*724ba675SRob Herring <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 123*724ba675SRob Herring 124*724ba675SRob Herring /* PCIe Controller 1 */ 125*724ba675SRob Herring <0x00013000 0 &gic GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 126*724ba675SRob Herring <0x00013000 1 &gic GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>, 127*724ba675SRob Herring <0x00013000 2 &gic GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>, 128*724ba675SRob Herring <0x00013000 3 &gic GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, 129*724ba675SRob Herring <0x00013000 4 &gic GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 130*724ba675SRob Herring <0x00013000 5 &gic GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 131*724ba675SRob Herring 132*724ba675SRob Herring /* PCIe Controller 2 */ 133*724ba675SRob Herring <0x00014000 0 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 134*724ba675SRob Herring <0x00014000 1 &gic GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, 135*724ba675SRob Herring <0x00014000 2 &gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>, 136*724ba675SRob Herring <0x00014000 3 &gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>, 137*724ba675SRob Herring <0x00014000 4 &gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 138*724ba675SRob Herring <0x00014000 5 &gic GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>, 139*724ba675SRob Herring 140*724ba675SRob Herring /* USB 2.0 Controller */ 141*724ba675SRob Herring <0x00021000 0 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>, 142*724ba675SRob Herring 143*724ba675SRob Herring /* USB 3.0 Controller */ 144*724ba675SRob Herring <0x00023000 0 &gic GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>, 145*724ba675SRob Herring 146*724ba675SRob Herring /* Ethernet Controller 0 */ 147*724ba675SRob Herring <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, 148*724ba675SRob Herring 149*724ba675SRob Herring /* Ethernet Controller 1 */ 150*724ba675SRob Herring <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 151*724ba675SRob Herring 152*724ba675SRob Herring /* Ethernet Controller 2 */ 153*724ba675SRob Herring <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 154*724ba675SRob Herring 155*724ba675SRob Herring /* Ethernet Controller 3 */ 156*724ba675SRob Herring <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, 157*724ba675SRob Herring 158*724ba675SRob Herring /* NAND Controller */ 159*724ba675SRob Herring <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>, 160*724ba675SRob Herring <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, 161*724ba675SRob Herring <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>, 162*724ba675SRob Herring <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 163*724ba675SRob Herring <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 164*724ba675SRob Herring <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>, 165*724ba675SRob Herring <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 166*724ba675SRob Herring <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 167*724ba675SRob Herring 168*724ba675SRob Herring chipcommon: chipcommon@0 { 169*724ba675SRob Herring reg = <0x00000000 0x1000>; 170*724ba675SRob Herring 171*724ba675SRob Herring gpio-controller; 172*724ba675SRob Herring #gpio-cells = <2>; 173*724ba675SRob Herring interrupt-controller; 174*724ba675SRob Herring #interrupt-cells = <2>; 175*724ba675SRob Herring }; 176*724ba675SRob Herring 177*724ba675SRob Herring pcie0: pcie@12000 { 178*724ba675SRob Herring reg = <0x00012000 0x1000>; 179*724ba675SRob Herring 180*724ba675SRob Herring #address-cells = <3>; 181*724ba675SRob Herring #size-cells = <2>; 182*724ba675SRob Herring }; 183*724ba675SRob Herring 184*724ba675SRob Herring pcie1: pcie@13000 { 185*724ba675SRob Herring reg = <0x00013000 0x1000>; 186*724ba675SRob Herring 187*724ba675SRob Herring #address-cells = <3>; 188*724ba675SRob Herring #size-cells = <2>; 189*724ba675SRob Herring }; 190*724ba675SRob Herring 191*724ba675SRob Herring pcie2: pcie@14000 { 192*724ba675SRob Herring reg = <0x00014000 0x1000>; 193*724ba675SRob Herring 194*724ba675SRob Herring #address-cells = <3>; 195*724ba675SRob Herring #size-cells = <2>; 196*724ba675SRob Herring }; 197*724ba675SRob Herring 198*724ba675SRob Herring usb2: usb2@21000 { 199*724ba675SRob Herring reg = <0x00021000 0x1000>; 200*724ba675SRob Herring 201*724ba675SRob Herring #address-cells = <1>; 202*724ba675SRob Herring #size-cells = <1>; 203*724ba675SRob Herring ranges; 204*724ba675SRob Herring 205*724ba675SRob Herring interrupt-parent = <&gic>; 206*724ba675SRob Herring 207*724ba675SRob Herring ehci: usb@21000 { 208*724ba675SRob Herring compatible = "generic-ehci"; 209*724ba675SRob Herring reg = <0x00021000 0x1000>; 210*724ba675SRob Herring interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 211*724ba675SRob Herring phys = <&usb2_phy>; 212*724ba675SRob Herring 213*724ba675SRob Herring #address-cells = <1>; 214*724ba675SRob Herring #size-cells = <0>; 215*724ba675SRob Herring 216*724ba675SRob Herring ehci_port1: port@1 { 217*724ba675SRob Herring reg = <1>; 218*724ba675SRob Herring #trigger-source-cells = <0>; 219*724ba675SRob Herring }; 220*724ba675SRob Herring 221*724ba675SRob Herring ehci_port2: port@2 { 222*724ba675SRob Herring reg = <2>; 223*724ba675SRob Herring #trigger-source-cells = <0>; 224*724ba675SRob Herring }; 225*724ba675SRob Herring }; 226*724ba675SRob Herring 227*724ba675SRob Herring ohci: usb@22000 { 228*724ba675SRob Herring compatible = "generic-ohci"; 229*724ba675SRob Herring reg = <0x00022000 0x1000>; 230*724ba675SRob Herring interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; 231*724ba675SRob Herring 232*724ba675SRob Herring #address-cells = <1>; 233*724ba675SRob Herring #size-cells = <0>; 234*724ba675SRob Herring 235*724ba675SRob Herring ohci_port1: port@1 { 236*724ba675SRob Herring reg = <1>; 237*724ba675SRob Herring #trigger-source-cells = <0>; 238*724ba675SRob Herring }; 239*724ba675SRob Herring 240*724ba675SRob Herring ohci_port2: port@2 { 241*724ba675SRob Herring reg = <2>; 242*724ba675SRob Herring #trigger-source-cells = <0>; 243*724ba675SRob Herring }; 244*724ba675SRob Herring }; 245*724ba675SRob Herring }; 246*724ba675SRob Herring 247*724ba675SRob Herring usb3: usb3@23000 { 248*724ba675SRob Herring reg = <0x00023000 0x1000>; 249*724ba675SRob Herring 250*724ba675SRob Herring #address-cells = <1>; 251*724ba675SRob Herring #size-cells = <1>; 252*724ba675SRob Herring ranges; 253*724ba675SRob Herring 254*724ba675SRob Herring interrupt-parent = <&gic>; 255*724ba675SRob Herring 256*724ba675SRob Herring xhci: usb@23000 { 257*724ba675SRob Herring compatible = "generic-xhci"; 258*724ba675SRob Herring reg = <0x00023000 0x1000>; 259*724ba675SRob Herring interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; 260*724ba675SRob Herring phys = <&usb3_phy>; 261*724ba675SRob Herring phy-names = "usb"; 262*724ba675SRob Herring 263*724ba675SRob Herring #address-cells = <1>; 264*724ba675SRob Herring #size-cells = <0>; 265*724ba675SRob Herring 266*724ba675SRob Herring xhci_port1: port@1 { 267*724ba675SRob Herring reg = <1>; 268*724ba675SRob Herring #trigger-source-cells = <0>; 269*724ba675SRob Herring }; 270*724ba675SRob Herring }; 271*724ba675SRob Herring }; 272*724ba675SRob Herring 273*724ba675SRob Herring gmac0: ethernet@24000 { 274*724ba675SRob Herring reg = <0x24000 0x800>; 275*724ba675SRob Herring }; 276*724ba675SRob Herring 277*724ba675SRob Herring gmac1: ethernet@25000 { 278*724ba675SRob Herring reg = <0x25000 0x800>; 279*724ba675SRob Herring }; 280*724ba675SRob Herring 281*724ba675SRob Herring gmac2: ethernet@26000 { 282*724ba675SRob Herring reg = <0x26000 0x800>; 283*724ba675SRob Herring }; 284*724ba675SRob Herring 285*724ba675SRob Herring gmac3: ethernet@27000 { 286*724ba675SRob Herring reg = <0x27000 0x800>; 287*724ba675SRob Herring }; 288*724ba675SRob Herring }; 289*724ba675SRob Herring 290*724ba675SRob Herring pwm: pwm@18002000 { 291*724ba675SRob Herring compatible = "brcm,iproc-pwm"; 292*724ba675SRob Herring reg = <0x18002000 0x28>; 293*724ba675SRob Herring clocks = <&osc>; 294*724ba675SRob Herring #pwm-cells = <3>; 295*724ba675SRob Herring status = "disabled"; 296*724ba675SRob Herring }; 297*724ba675SRob Herring 298*724ba675SRob Herring mdio: mdio@18003000 { 299*724ba675SRob Herring compatible = "brcm,iproc-mdio"; 300*724ba675SRob Herring reg = <0x18003000 0x8>; 301*724ba675SRob Herring #size-cells = <0>; 302*724ba675SRob Herring #address-cells = <1>; 303*724ba675SRob Herring }; 304*724ba675SRob Herring 305*724ba675SRob Herring rng: rng@18004000 { 306*724ba675SRob Herring compatible = "brcm,bcm5301x-rng"; 307*724ba675SRob Herring reg = <0x18004000 0x14>; 308*724ba675SRob Herring }; 309*724ba675SRob Herring 310*724ba675SRob Herring srab: ethernet-switch@18007000 { 311*724ba675SRob Herring compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab"; 312*724ba675SRob Herring reg = <0x18007000 0x1000>; 313*724ba675SRob Herring 314*724ba675SRob Herring status = "disabled"; 315*724ba675SRob Herring 316*724ba675SRob Herring ports { 317*724ba675SRob Herring #address-cells = <1>; 318*724ba675SRob Herring #size-cells = <0>; 319*724ba675SRob Herring 320*724ba675SRob Herring port@0 { 321*724ba675SRob Herring reg = <0>; 322*724ba675SRob Herring }; 323*724ba675SRob Herring 324*724ba675SRob Herring port@1 { 325*724ba675SRob Herring reg = <1>; 326*724ba675SRob Herring }; 327*724ba675SRob Herring 328*724ba675SRob Herring port@2 { 329*724ba675SRob Herring reg = <2>; 330*724ba675SRob Herring }; 331*724ba675SRob Herring 332*724ba675SRob Herring port@3 { 333*724ba675SRob Herring reg = <3>; 334*724ba675SRob Herring }; 335*724ba675SRob Herring 336*724ba675SRob Herring port@4 { 337*724ba675SRob Herring reg = <4>; 338*724ba675SRob Herring }; 339*724ba675SRob Herring 340*724ba675SRob Herring port@5 { 341*724ba675SRob Herring reg = <5>; 342*724ba675SRob Herring ethernet = <&gmac0>; 343*724ba675SRob Herring }; 344*724ba675SRob Herring 345*724ba675SRob Herring port@7 { 346*724ba675SRob Herring reg = <7>; 347*724ba675SRob Herring ethernet = <&gmac1>; 348*724ba675SRob Herring }; 349*724ba675SRob Herring 350*724ba675SRob Herring port@8 { 351*724ba675SRob Herring reg = <8>; 352*724ba675SRob Herring ethernet = <&gmac2>; 353*724ba675SRob Herring 354*724ba675SRob Herring fixed-link { 355*724ba675SRob Herring speed = <1000>; 356*724ba675SRob Herring full-duplex; 357*724ba675SRob Herring }; 358*724ba675SRob Herring }; 359*724ba675SRob Herring }; 360*724ba675SRob Herring }; 361*724ba675SRob Herring 362*724ba675SRob Herring uart2: serial@18008000 { 363*724ba675SRob Herring compatible = "ns16550a"; 364*724ba675SRob Herring reg = <0x18008000 0x20>; 365*724ba675SRob Herring clocks = <&iprocslow>; 366*724ba675SRob Herring interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 367*724ba675SRob Herring reg-shift = <2>; 368*724ba675SRob Herring status = "disabled"; 369*724ba675SRob Herring }; 370*724ba675SRob Herring 371*724ba675SRob Herring dmu-bus@1800c000 { 372*724ba675SRob Herring compatible = "simple-bus"; 373*724ba675SRob Herring ranges = <0 0x1800c000 0x1000>; 374*724ba675SRob Herring #address-cells = <1>; 375*724ba675SRob Herring #size-cells = <1>; 376*724ba675SRob Herring 377*724ba675SRob Herring cru-bus@100 { 378*724ba675SRob Herring compatible = "brcm,ns-cru", "simple-mfd"; 379*724ba675SRob Herring reg = <0x100 0x1a4>; 380*724ba675SRob Herring ranges; 381*724ba675SRob Herring #address-cells = <1>; 382*724ba675SRob Herring #size-cells = <1>; 383*724ba675SRob Herring 384*724ba675SRob Herring usb2_phy: phy@164 { 385*724ba675SRob Herring compatible = "brcm,ns-usb2-phy"; 386*724ba675SRob Herring reg = <0x164 0x4>; 387*724ba675SRob Herring brcm,syscon-clkset = <&cru_clkset>; 388*724ba675SRob Herring clocks = <&genpll BCM_NSP_GENPLL_USB_PHY_REF_CLK>; 389*724ba675SRob Herring clock-names = "phy-ref-clk"; 390*724ba675SRob Herring #phy-cells = <0>; 391*724ba675SRob Herring }; 392*724ba675SRob Herring 393*724ba675SRob Herring cru_clkset: syscon@180 { 394*724ba675SRob Herring compatible = "brcm,cru-clkset", "syscon"; 395*724ba675SRob Herring reg = <0x180 0x4>; 396*724ba675SRob Herring }; 397*724ba675SRob Herring 398*724ba675SRob Herring pinctrl: pinctrl@1c0 { 399*724ba675SRob Herring compatible = "brcm,bcm4708-pinmux"; 400*724ba675SRob Herring reg = <0x1c0 0x24>; 401*724ba675SRob Herring reg-names = "cru_gpio_control"; 402*724ba675SRob Herring 403*724ba675SRob Herring spi-pins { 404*724ba675SRob Herring groups = "spi_grp"; 405*724ba675SRob Herring function = "spi"; 406*724ba675SRob Herring }; 407*724ba675SRob Herring 408*724ba675SRob Herring pinmux_i2c: i2c-pins { 409*724ba675SRob Herring groups = "i2c_grp"; 410*724ba675SRob Herring function = "i2c"; 411*724ba675SRob Herring }; 412*724ba675SRob Herring 413*724ba675SRob Herring pinmux_pwm: pwm-pins { 414*724ba675SRob Herring groups = "pwm0_grp", "pwm1_grp", 415*724ba675SRob Herring "pwm2_grp", "pwm3_grp"; 416*724ba675SRob Herring function = "pwm"; 417*724ba675SRob Herring }; 418*724ba675SRob Herring 419*724ba675SRob Herring pinmux_uart1: uart1-pins { 420*724ba675SRob Herring groups = "uart1_grp"; 421*724ba675SRob Herring function = "uart1"; 422*724ba675SRob Herring }; 423*724ba675SRob Herring }; 424*724ba675SRob Herring 425*724ba675SRob Herring thermal: thermal@2c0 { 426*724ba675SRob Herring compatible = "brcm,ns-thermal"; 427*724ba675SRob Herring reg = <0x2c0 0x10>; 428*724ba675SRob Herring #thermal-sensor-cells = <0>; 429*724ba675SRob Herring }; 430*724ba675SRob Herring }; 431*724ba675SRob Herring }; 432*724ba675SRob Herring 433*724ba675SRob Herring nand_controller: nand-controller@18028000 { 434*724ba675SRob Herring compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand"; 435*724ba675SRob Herring reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>; 436*724ba675SRob Herring reg-names = "nand", "iproc-idm", "iproc-ext"; 437*724ba675SRob Herring interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; 438*724ba675SRob Herring 439*724ba675SRob Herring #address-cells = <1>; 440*724ba675SRob Herring #size-cells = <0>; 441*724ba675SRob Herring 442*724ba675SRob Herring brcm,nand-has-wp; 443*724ba675SRob Herring }; 444*724ba675SRob Herring 445*724ba675SRob Herring thermal-zones { 446*724ba675SRob Herring cpu_thermal: cpu-thermal { 447*724ba675SRob Herring polling-delay-passive = <0>; 448*724ba675SRob Herring polling-delay = <1000>; 449*724ba675SRob Herring coefficients = <(-556) 418000>; 450*724ba675SRob Herring thermal-sensors = <&thermal>; 451*724ba675SRob Herring 452*724ba675SRob Herring trips { 453*724ba675SRob Herring cpu-crit { 454*724ba675SRob Herring temperature = <125000>; 455*724ba675SRob Herring hysteresis = <0>; 456*724ba675SRob Herring type = "critical"; 457*724ba675SRob Herring }; 458*724ba675SRob Herring }; 459*724ba675SRob Herring 460*724ba675SRob Herring cooling-maps { 461*724ba675SRob Herring }; 462*724ba675SRob Herring }; 463*724ba675SRob Herring }; 464*724ba675SRob Herring}; 465