1 /* 2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210 3 * 4 * Copyright (c) 2010-2010 Analog Devices Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 */ 11 #include <linux/types.h> 12 #include <linux/mutex.h> 13 #include <linux/device.h> 14 #include <linux/spi/spi.h> 15 #include <linux/slab.h> 16 #include <linux/sysfs.h> 17 #include <linux/delay.h> 18 #include <linux/gpio.h> 19 #include <linux/module.h> 20 21 #include <linux/iio/iio.h> 22 #include <linux/iio/sysfs.h> 23 #include "ad2s1210.h" 24 25 #define DRV_NAME "ad2s1210" 26 27 #define AD2S1210_DEF_CONTROL 0x7E 28 29 #define AD2S1210_MSB_IS_HIGH 0x80 30 #define AD2S1210_MSB_IS_LOW 0x7F 31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20 32 #define AD2S1210_ENABLE_HYSTERESIS 0x10 33 #define AD2S1210_SET_ENRES1 0x08 34 #define AD2S1210_SET_ENRES0 0x04 35 #define AD2S1210_SET_RES1 0x02 36 #define AD2S1210_SET_RES0 0x01 37 38 #define AD2S1210_SET_ENRESOLUTION (AD2S1210_SET_ENRES1 | \ 39 AD2S1210_SET_ENRES0) 40 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0) 41 42 #define AD2S1210_REG_POSITION 0x80 43 #define AD2S1210_REG_VELOCITY 0x82 44 #define AD2S1210_REG_LOS_THRD 0x88 45 #define AD2S1210_REG_DOS_OVR_THRD 0x89 46 #define AD2S1210_REG_DOS_MIS_THRD 0x8A 47 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B 48 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C 49 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D 50 #define AD2S1210_REG_LOT_LOW_THRD 0x8E 51 #define AD2S1210_REG_EXCIT_FREQ 0x91 52 #define AD2S1210_REG_CONTROL 0x92 53 #define AD2S1210_REG_SOFT_RESET 0xF0 54 #define AD2S1210_REG_FAULT 0xFF 55 56 /* pin SAMPLE, A0, A1, RES0, RES1, is controlled by driver */ 57 #define AD2S1210_SAA 3 58 #define AD2S1210_PN (AD2S1210_SAA + AD2S1210_RES) 59 60 #define AD2S1210_MIN_CLKIN 6144000 61 #define AD2S1210_MAX_CLKIN 10240000 62 #define AD2S1210_MIN_EXCIT 2000 63 #define AD2S1210_MAX_EXCIT 20000 64 #define AD2S1210_MIN_FCW 0x4 65 #define AD2S1210_MAX_FCW 0x50 66 67 /* default input clock on serial interface */ 68 #define AD2S1210_DEF_CLKIN 8192000 69 /* clock period in nano second */ 70 #define AD2S1210_DEF_TCK (1000000000 / AD2S1210_DEF_CLKIN) 71 #define AD2S1210_DEF_EXCIT 10000 72 73 enum ad2s1210_mode { 74 MOD_POS = 0, 75 MOD_VEL, 76 MOD_CONFIG, 77 MOD_RESERVED, 78 }; 79 80 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 }; 81 82 struct ad2s1210_state { 83 const struct ad2s1210_platform_data *pdata; 84 struct mutex lock; 85 struct spi_device *sdev; 86 unsigned int fclkin; 87 unsigned int fexcit; 88 bool hysteresis; 89 bool old_data; 90 u8 resolution; 91 enum ad2s1210_mode mode; 92 u8 rx[2] ____cacheline_aligned; 93 u8 tx[2] ____cacheline_aligned; 94 }; 95 96 static const int ad2s1210_mode_vals[4][2] = { 97 [MOD_POS] = { 0, 0 }, 98 [MOD_VEL] = { 0, 1 }, 99 [MOD_CONFIG] = { 1, 0 }, 100 }; 101 102 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode, 103 struct ad2s1210_state *st) 104 { 105 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]); 106 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]); 107 st->mode = mode; 108 } 109 110 /* write 1 bytes (address or data) to the chip */ 111 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data) 112 { 113 int ret; 114 115 ad2s1210_set_mode(MOD_CONFIG, st); 116 st->tx[0] = data; 117 ret = spi_write(st->sdev, st->tx, 1); 118 if (ret < 0) 119 return ret; 120 st->old_data = true; 121 122 return 0; 123 } 124 125 /* read value from one of the registers */ 126 static int ad2s1210_config_read(struct ad2s1210_state *st, 127 unsigned char address) 128 { 129 struct spi_transfer xfer = { 130 .len = 2, 131 .rx_buf = st->rx, 132 .tx_buf = st->tx, 133 }; 134 int ret = 0; 135 136 ad2s1210_set_mode(MOD_CONFIG, st); 137 st->tx[0] = address | AD2S1210_MSB_IS_HIGH; 138 st->tx[1] = AD2S1210_REG_FAULT; 139 ret = spi_sync_transfer(st->sdev, &xfer, 1); 140 if (ret < 0) 141 return ret; 142 st->old_data = true; 143 144 return st->rx[1]; 145 } 146 147 static inline 148 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st) 149 { 150 int ret; 151 unsigned char fcw; 152 153 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin); 154 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) { 155 dev_err(&st->sdev->dev, "ad2s1210: FCW out of range\n"); 156 return -ERANGE; 157 } 158 159 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ); 160 if (ret < 0) 161 return ret; 162 163 return ad2s1210_config_write(st, fcw); 164 } 165 166 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st) 167 { 168 return ad2s1210_resolution_value[ 169 (gpio_get_value(st->pdata->res[0]) << 1) | 170 gpio_get_value(st->pdata->res[1])]; 171 } 172 173 static const int ad2s1210_res_pins[4][2] = { 174 { 0, 0 }, {0, 1}, {1, 0}, {1, 1} 175 }; 176 177 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st) 178 { 179 gpio_set_value(st->pdata->res[0], 180 ad2s1210_res_pins[(st->resolution - 10) / 2][0]); 181 gpio_set_value(st->pdata->res[1], 182 ad2s1210_res_pins[(st->resolution - 10) / 2][1]); 183 } 184 185 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st) 186 { 187 int ret; 188 189 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET); 190 if (ret < 0) 191 return ret; 192 193 return ad2s1210_config_write(st, 0x0); 194 } 195 196 static ssize_t ad2s1210_show_fclkin(struct device *dev, 197 struct device_attribute *attr, 198 char *buf) 199 { 200 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 201 202 return sprintf(buf, "%u\n", st->fclkin); 203 } 204 205 static ssize_t ad2s1210_store_fclkin(struct device *dev, 206 struct device_attribute *attr, 207 const char *buf, 208 size_t len) 209 { 210 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 211 unsigned int fclkin; 212 int ret; 213 214 ret = kstrtouint(buf, 10, &fclkin); 215 if (ret) 216 return ret; 217 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) { 218 dev_err(dev, "ad2s1210: fclkin out of range\n"); 219 return -EINVAL; 220 } 221 222 mutex_lock(&st->lock); 223 st->fclkin = fclkin; 224 225 ret = ad2s1210_update_frequency_control_word(st); 226 if (ret < 0) 227 goto error_ret; 228 ret = ad2s1210_soft_reset(st); 229 error_ret: 230 mutex_unlock(&st->lock); 231 232 return ret < 0 ? ret : len; 233 } 234 235 static ssize_t ad2s1210_show_fexcit(struct device *dev, 236 struct device_attribute *attr, 237 char *buf) 238 { 239 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 240 241 return sprintf(buf, "%u\n", st->fexcit); 242 } 243 244 static ssize_t ad2s1210_store_fexcit(struct device *dev, 245 struct device_attribute *attr, 246 const char *buf, size_t len) 247 { 248 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 249 unsigned int fexcit; 250 int ret; 251 252 ret = kstrtouint(buf, 10, &fexcit); 253 if (ret < 0) 254 return ret; 255 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) { 256 dev_err(dev, 257 "ad2s1210: excitation frequency out of range\n"); 258 return -EINVAL; 259 } 260 mutex_lock(&st->lock); 261 st->fexcit = fexcit; 262 ret = ad2s1210_update_frequency_control_word(st); 263 if (ret < 0) 264 goto error_ret; 265 ret = ad2s1210_soft_reset(st); 266 error_ret: 267 mutex_unlock(&st->lock); 268 269 return ret < 0 ? ret : len; 270 } 271 272 static ssize_t ad2s1210_show_control(struct device *dev, 273 struct device_attribute *attr, 274 char *buf) 275 { 276 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 277 int ret; 278 279 mutex_lock(&st->lock); 280 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 281 mutex_unlock(&st->lock); 282 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret); 283 } 284 285 static ssize_t ad2s1210_store_control(struct device *dev, 286 struct device_attribute *attr, 287 const char *buf, size_t len) 288 { 289 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 290 unsigned char udata; 291 unsigned char data; 292 int ret; 293 294 ret = kstrtou8(buf, 16, &udata); 295 if (ret) 296 return -EINVAL; 297 298 mutex_lock(&st->lock); 299 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); 300 if (ret < 0) 301 goto error_ret; 302 data = udata & AD2S1210_MSB_IS_LOW; 303 ret = ad2s1210_config_write(st, data); 304 if (ret < 0) 305 goto error_ret; 306 307 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 308 if (ret < 0) 309 goto error_ret; 310 if (ret & AD2S1210_MSB_IS_HIGH) { 311 ret = -EIO; 312 dev_err(dev, 313 "ad2s1210: write control register fail\n"); 314 goto error_ret; 315 } 316 st->resolution 317 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; 318 if (st->pdata->gpioin) { 319 data = ad2s1210_read_resolution_pin(st); 320 if (data != st->resolution) 321 dev_warn(dev, "ad2s1210: resolution settings not match\n"); 322 } else { 323 ad2s1210_set_resolution_pin(st); 324 } 325 ret = len; 326 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS); 327 328 error_ret: 329 mutex_unlock(&st->lock); 330 return ret; 331 } 332 333 static ssize_t ad2s1210_show_resolution(struct device *dev, 334 struct device_attribute *attr, 335 char *buf) 336 { 337 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 338 339 return sprintf(buf, "%d\n", st->resolution); 340 } 341 342 static ssize_t ad2s1210_store_resolution(struct device *dev, 343 struct device_attribute *attr, 344 const char *buf, size_t len) 345 { 346 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 347 unsigned char data; 348 unsigned char udata; 349 int ret; 350 351 ret = kstrtou8(buf, 10, &udata); 352 if (ret || udata < 10 || udata > 16) { 353 dev_err(dev, "ad2s1210: resolution out of range\n"); 354 return -EINVAL; 355 } 356 mutex_lock(&st->lock); 357 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 358 if (ret < 0) 359 goto error_ret; 360 data = ret; 361 data &= ~AD2S1210_SET_RESOLUTION; 362 data |= (udata - 10) >> 1; 363 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); 364 if (ret < 0) 365 goto error_ret; 366 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW); 367 if (ret < 0) 368 goto error_ret; 369 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 370 if (ret < 0) 371 goto error_ret; 372 data = ret; 373 if (data & AD2S1210_MSB_IS_HIGH) { 374 ret = -EIO; 375 dev_err(dev, "ad2s1210: setting resolution fail\n"); 376 goto error_ret; 377 } 378 st->resolution 379 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION]; 380 if (st->pdata->gpioin) { 381 data = ad2s1210_read_resolution_pin(st); 382 if (data != st->resolution) 383 dev_warn(dev, "ad2s1210: resolution settings not match\n"); 384 } else { 385 ad2s1210_set_resolution_pin(st); 386 } 387 ret = len; 388 error_ret: 389 mutex_unlock(&st->lock); 390 return ret; 391 } 392 393 /* read the fault register since last sample */ 394 static ssize_t ad2s1210_show_fault(struct device *dev, 395 struct device_attribute *attr, char *buf) 396 { 397 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 398 int ret; 399 400 mutex_lock(&st->lock); 401 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT); 402 mutex_unlock(&st->lock); 403 404 return ret ? ret : sprintf(buf, "0x%x\n", ret); 405 } 406 407 static ssize_t ad2s1210_clear_fault(struct device *dev, 408 struct device_attribute *attr, 409 const char *buf, 410 size_t len) 411 { 412 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 413 int ret; 414 415 mutex_lock(&st->lock); 416 gpio_set_value(st->pdata->sample, 0); 417 /* delay (2 * tck + 20) nano seconds */ 418 udelay(1); 419 gpio_set_value(st->pdata->sample, 1); 420 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT); 421 if (ret < 0) 422 goto error_ret; 423 gpio_set_value(st->pdata->sample, 0); 424 gpio_set_value(st->pdata->sample, 1); 425 error_ret: 426 mutex_unlock(&st->lock); 427 428 return ret < 0 ? ret : len; 429 } 430 431 static ssize_t ad2s1210_show_reg(struct device *dev, 432 struct device_attribute *attr, 433 char *buf) 434 { 435 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 436 struct iio_dev_attr *iattr = to_iio_dev_attr(attr); 437 int ret; 438 439 mutex_lock(&st->lock); 440 ret = ad2s1210_config_read(st, iattr->address); 441 mutex_unlock(&st->lock); 442 443 return ret < 0 ? ret : sprintf(buf, "%d\n", ret); 444 } 445 446 static ssize_t ad2s1210_store_reg(struct device *dev, 447 struct device_attribute *attr, 448 const char *buf, size_t len) 449 { 450 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev)); 451 unsigned char data; 452 int ret; 453 struct iio_dev_attr *iattr = to_iio_dev_attr(attr); 454 455 ret = kstrtou8(buf, 10, &data); 456 if (ret) 457 return -EINVAL; 458 mutex_lock(&st->lock); 459 ret = ad2s1210_config_write(st, iattr->address); 460 if (ret < 0) 461 goto error_ret; 462 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW); 463 error_ret: 464 mutex_unlock(&st->lock); 465 return ret < 0 ? ret : len; 466 } 467 468 static int ad2s1210_read_raw(struct iio_dev *indio_dev, 469 struct iio_chan_spec const *chan, 470 int *val, 471 int *val2, 472 long m) 473 { 474 struct ad2s1210_state *st = iio_priv(indio_dev); 475 bool negative; 476 int ret = 0; 477 u16 pos; 478 s16 vel; 479 480 mutex_lock(&st->lock); 481 gpio_set_value(st->pdata->sample, 0); 482 /* delay (6 * tck + 20) nano seconds */ 483 udelay(1); 484 485 switch (chan->type) { 486 case IIO_ANGL: 487 ad2s1210_set_mode(MOD_POS, st); 488 break; 489 case IIO_ANGL_VEL: 490 ad2s1210_set_mode(MOD_VEL, st); 491 break; 492 default: 493 ret = -EINVAL; 494 break; 495 } 496 if (ret < 0) 497 goto error_ret; 498 ret = spi_read(st->sdev, st->rx, 2); 499 if (ret < 0) 500 goto error_ret; 501 502 switch (chan->type) { 503 case IIO_ANGL: 504 pos = be16_to_cpup((__be16 *)st->rx); 505 if (st->hysteresis) 506 pos >>= 16 - st->resolution; 507 *val = pos; 508 ret = IIO_VAL_INT; 509 break; 510 case IIO_ANGL_VEL: 511 negative = st->rx[0] & 0x80; 512 vel = be16_to_cpup((__be16 *)st->rx); 513 vel >>= 16 - st->resolution; 514 if (vel & 0x8000) { 515 negative = (0xffff >> st->resolution) << st->resolution; 516 vel |= negative; 517 } 518 *val = vel; 519 ret = IIO_VAL_INT; 520 break; 521 default: 522 mutex_unlock(&st->lock); 523 return -EINVAL; 524 } 525 526 error_ret: 527 gpio_set_value(st->pdata->sample, 1); 528 /* delay (2 * tck + 20) nano seconds */ 529 udelay(1); 530 mutex_unlock(&st->lock); 531 return ret; 532 } 533 534 static IIO_DEVICE_ATTR(fclkin, S_IRUGO | S_IWUSR, 535 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0); 536 static IIO_DEVICE_ATTR(fexcit, S_IRUGO | S_IWUSR, 537 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0); 538 static IIO_DEVICE_ATTR(control, S_IRUGO | S_IWUSR, 539 ad2s1210_show_control, ad2s1210_store_control, 0); 540 static IIO_DEVICE_ATTR(bits, S_IRUGO | S_IWUSR, 541 ad2s1210_show_resolution, ad2s1210_store_resolution, 0); 542 static IIO_DEVICE_ATTR(fault, S_IRUGO | S_IWUSR, 543 ad2s1210_show_fault, ad2s1210_clear_fault, 0); 544 545 static IIO_DEVICE_ATTR(los_thrd, S_IRUGO | S_IWUSR, 546 ad2s1210_show_reg, ad2s1210_store_reg, 547 AD2S1210_REG_LOS_THRD); 548 static IIO_DEVICE_ATTR(dos_ovr_thrd, S_IRUGO | S_IWUSR, 549 ad2s1210_show_reg, ad2s1210_store_reg, 550 AD2S1210_REG_DOS_OVR_THRD); 551 static IIO_DEVICE_ATTR(dos_mis_thrd, S_IRUGO | S_IWUSR, 552 ad2s1210_show_reg, ad2s1210_store_reg, 553 AD2S1210_REG_DOS_MIS_THRD); 554 static IIO_DEVICE_ATTR(dos_rst_max_thrd, S_IRUGO | S_IWUSR, 555 ad2s1210_show_reg, ad2s1210_store_reg, 556 AD2S1210_REG_DOS_RST_MAX_THRD); 557 static IIO_DEVICE_ATTR(dos_rst_min_thrd, S_IRUGO | S_IWUSR, 558 ad2s1210_show_reg, ad2s1210_store_reg, 559 AD2S1210_REG_DOS_RST_MIN_THRD); 560 static IIO_DEVICE_ATTR(lot_high_thrd, S_IRUGO | S_IWUSR, 561 ad2s1210_show_reg, ad2s1210_store_reg, 562 AD2S1210_REG_LOT_HIGH_THRD); 563 static IIO_DEVICE_ATTR(lot_low_thrd, S_IRUGO | S_IWUSR, 564 ad2s1210_show_reg, ad2s1210_store_reg, 565 AD2S1210_REG_LOT_LOW_THRD); 566 567 static const struct iio_chan_spec ad2s1210_channels[] = { 568 { 569 .type = IIO_ANGL, 570 .indexed = 1, 571 .channel = 0, 572 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 573 }, { 574 .type = IIO_ANGL_VEL, 575 .indexed = 1, 576 .channel = 0, 577 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), 578 } 579 }; 580 581 static struct attribute *ad2s1210_attributes[] = { 582 &iio_dev_attr_fclkin.dev_attr.attr, 583 &iio_dev_attr_fexcit.dev_attr.attr, 584 &iio_dev_attr_control.dev_attr.attr, 585 &iio_dev_attr_bits.dev_attr.attr, 586 &iio_dev_attr_fault.dev_attr.attr, 587 &iio_dev_attr_los_thrd.dev_attr.attr, 588 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr, 589 &iio_dev_attr_dos_mis_thrd.dev_attr.attr, 590 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr, 591 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr, 592 &iio_dev_attr_lot_high_thrd.dev_attr.attr, 593 &iio_dev_attr_lot_low_thrd.dev_attr.attr, 594 NULL, 595 }; 596 597 static const struct attribute_group ad2s1210_attribute_group = { 598 .attrs = ad2s1210_attributes, 599 }; 600 601 static int ad2s1210_initial(struct ad2s1210_state *st) 602 { 603 unsigned char data; 604 int ret; 605 606 mutex_lock(&st->lock); 607 if (st->pdata->gpioin) 608 st->resolution = ad2s1210_read_resolution_pin(st); 609 else 610 ad2s1210_set_resolution_pin(st); 611 612 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL); 613 if (ret < 0) 614 goto error_ret; 615 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION); 616 data |= (st->resolution - 10) >> 1; 617 ret = ad2s1210_config_write(st, data); 618 if (ret < 0) 619 goto error_ret; 620 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL); 621 if (ret < 0) 622 goto error_ret; 623 624 if (ret & AD2S1210_MSB_IS_HIGH) { 625 ret = -EIO; 626 goto error_ret; 627 } 628 629 ret = ad2s1210_update_frequency_control_word(st); 630 if (ret < 0) 631 goto error_ret; 632 ret = ad2s1210_soft_reset(st); 633 error_ret: 634 mutex_unlock(&st->lock); 635 return ret; 636 } 637 638 static const struct iio_info ad2s1210_info = { 639 .read_raw = ad2s1210_read_raw, 640 .attrs = &ad2s1210_attribute_group, 641 .driver_module = THIS_MODULE, 642 }; 643 644 static int ad2s1210_setup_gpios(struct ad2s1210_state *st) 645 { 646 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT; 647 struct gpio ad2s1210_gpios[] = { 648 { st->pdata->sample, GPIOF_DIR_IN, "sample" }, 649 { st->pdata->a[0], flags, "a0" }, 650 { st->pdata->a[1], flags, "a1" }, 651 { st->pdata->res[0], flags, "res0" }, 652 { st->pdata->res[0], flags, "res1" }, 653 }; 654 655 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); 656 } 657 658 static void ad2s1210_free_gpios(struct ad2s1210_state *st) 659 { 660 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT; 661 struct gpio ad2s1210_gpios[] = { 662 { st->pdata->sample, GPIOF_DIR_IN, "sample" }, 663 { st->pdata->a[0], flags, "a0" }, 664 { st->pdata->a[1], flags, "a1" }, 665 { st->pdata->res[0], flags, "res0" }, 666 { st->pdata->res[0], flags, "res1" }, 667 }; 668 669 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios)); 670 } 671 672 static int ad2s1210_probe(struct spi_device *spi) 673 { 674 struct iio_dev *indio_dev; 675 struct ad2s1210_state *st; 676 int ret; 677 678 if (!spi->dev.platform_data) 679 return -EINVAL; 680 681 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 682 if (!indio_dev) 683 return -ENOMEM; 684 st = iio_priv(indio_dev); 685 st->pdata = spi->dev.platform_data; 686 ret = ad2s1210_setup_gpios(st); 687 if (ret < 0) 688 return ret; 689 690 spi_set_drvdata(spi, indio_dev); 691 692 mutex_init(&st->lock); 693 st->sdev = spi; 694 st->hysteresis = true; 695 st->mode = MOD_CONFIG; 696 st->resolution = 12; 697 st->fexcit = AD2S1210_DEF_EXCIT; 698 699 indio_dev->dev.parent = &spi->dev; 700 indio_dev->info = &ad2s1210_info; 701 indio_dev->modes = INDIO_DIRECT_MODE; 702 indio_dev->channels = ad2s1210_channels; 703 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels); 704 indio_dev->name = spi_get_device_id(spi)->name; 705 706 ret = iio_device_register(indio_dev); 707 if (ret) 708 goto error_free_gpios; 709 710 st->fclkin = spi->max_speed_hz; 711 spi->mode = SPI_MODE_3; 712 spi_setup(spi); 713 ad2s1210_initial(st); 714 715 return 0; 716 717 error_free_gpios: 718 ad2s1210_free_gpios(st); 719 return ret; 720 } 721 722 static int ad2s1210_remove(struct spi_device *spi) 723 { 724 struct iio_dev *indio_dev = spi_get_drvdata(spi); 725 726 iio_device_unregister(indio_dev); 727 ad2s1210_free_gpios(iio_priv(indio_dev)); 728 729 return 0; 730 } 731 732 static const struct spi_device_id ad2s1210_id[] = { 733 { "ad2s1210" }, 734 {} 735 }; 736 MODULE_DEVICE_TABLE(spi, ad2s1210_id); 737 738 static struct spi_driver ad2s1210_driver = { 739 .driver = { 740 .name = DRV_NAME, 741 }, 742 .probe = ad2s1210_probe, 743 .remove = ad2s1210_remove, 744 .id_table = ad2s1210_id, 745 }; 746 module_spi_driver(ad2s1210_driver); 747 748 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>"); 749 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver"); 750 MODULE_LICENSE("GPL v2"); 751