Home
last modified time | relevance | path

Searched refs:CP0_SRSConf0_rw_bitmask (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/target/mips/
H A Dcpu.c233 env->CP0_SRSConf0_rw_bitmask = env->cpu_model->CP0_SRSConf0_rw_bitmask; in mips_cpu_reset_hold()
H A Dinternal.h69 int32_t CP0_SRSConf0_rw_bitmask; member
H A Dcpu.h703 int32_t CP0_SRSConf0_rw_bitmask; member
H A Dcpu-defs.c.inc300 .CP0_SRSConf0_rw_bitmask = 0x3fffffff,
/openbmc/qemu/target/mips/tcg/sysemu/
H A Dcp0_helper.c1027 env->CP0_SRSConf0 |= arg1 & env->CP0_SRSConf0_rw_bitmask; in helper_mtc0_srsconf0()